<feed xmlns='http://www.w3.org/2005/Atom'>
<title>starfive-tech/u-boot.git/arch/arm/cpu, branch rtthread_AMP</title>
<subtitle>StarFive Tech U-Boot for VisionFive (JH7110) boards (mirror)</subtitle>
<id>https://git.radix-linux.su/starfive-tech/u-boot.git/atom?h=rtthread_AMP</id>
<link rel='self' href='https://git.radix-linux.su/starfive-tech/u-boot.git/atom?h=rtthread_AMP'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/starfive-tech/u-boot.git/'/>
<updated>2021-08-18T10:25:15+00:00</updated>
<entry>
<title>armv8: fsl : create bootcmd and mcinitcmd as per boot source</title>
<updated>2021-08-18T10:25:15+00:00</updated>
<author>
<name>Wasim Khan</name>
<email>wasim.khan@nxp.com</email>
</author>
<published>2021-08-02T08:34:52+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/starfive-tech/u-boot.git/commit/?id=b62c174e861bddc3c7131045ed018556645cecb9'/>
<id>urn:sha1:b62c174e861bddc3c7131045ed018556645cecb9</id>
<content type='text'>
NXP platforms expect custom bootcmd and mcinitcmd to be
updated as per boot source with default environment.
Check env variable fsl_bootcmd_mcinitcmd_set to prepare
bootcmd and mcinitcmd

Fixes: cbf77d201870 (armv8: fsl-layerscape: Fix automatic
setting of bootmcd with TF-A)

Signed-off-by: Wasim Khan &lt;wasim.khan@nxp.com&gt;
Reviewed-by: Priyanka Jain &lt;priyanka.jain@nxp.com&gt;
</content>
</entry>
<entry>
<title>arm: Finish migration of HAS_FSL_XHCI_USB</title>
<updated>2021-08-18T10:25:15+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2021-07-21T22:53:20+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/starfive-tech/u-boot.git/commit/?id=a968e9adac7e239d03a759805ccb36bd3152c07e'/>
<id>urn:sha1:a968e9adac7e239d03a759805ccb36bd3152c07e</id>
<content type='text'>
This symbol was largely migrated, except for one case.  Update it.

Cc: Priyanka Jain &lt;priyanka.jain@nxp.com&gt;
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
Reviewed-by: Priyanka Jain &lt;priyanka.jain@nxp.com&gt;
</content>
</entry>
<entry>
<title>global: Convert simple_strtoul() with decimal to dectoul()</title>
<updated>2021-08-02T17:32:14+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2021-07-24T15:03:30+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/starfive-tech/u-boot.git/commit/?id=0b1284eb52578e15ec611adc5fee1a9ae68dadea'/>
<id>urn:sha1:0b1284eb52578e15ec611adc5fee1a9ae68dadea</id>
<content type='text'>
It is a pain to have to specify the value 10 in each call. Add a new
dectoul() function and update the code to use it.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>global: Convert simple_strtoul() with hex to hextoul()</title>
<updated>2021-08-02T17:32:14+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2021-07-24T15:03:29+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/starfive-tech/u-boot.git/commit/?id=7e5f460ec457fe310156e399198a41eb0ce1e98c'/>
<id>urn:sha1:7e5f460ec457fe310156e399198a41eb0ce1e98c</id>
<content type='text'>
It is a pain to have to specify the value 16 in each call. Add a new
hextoul() function and update the code to use it.

Add a proper comment to simple_strtoul() while we are here.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>arm64: Update memcpy_{from, to}io() helpers</title>
<updated>2021-07-28T23:30:22+00:00</updated>
<author>
<name>Patrice Chotard</name>
<email>patrice.chotard@foss.st.com</email>
</author>
<published>2021-07-19T09:21:51+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/starfive-tech/u-boot.git/commit/?id=268f6ac1f95c1734e7eea369e93062e52c4aa04a'/>
<id>urn:sha1:268f6ac1f95c1734e7eea369e93062e52c4aa04a</id>
<content type='text'>
At early U-Boot stage, before relocation, MMU is not yet configured
and disabled. DDR may not be configured with the correct memory
attributes (can be configured in MT_DEVICE instead of MT_MEMORY).

In this case, usage of memcpy_{from, to}io() may leads to synchronous
abort in AARCH64 in case the normal memory address is not 64Bits aligned.

To avoid such situation, forbid usage of normal memory cast to (u64 *) in
case MMU is not enabled.

Signed-off-by: Patrice Chotard &lt;patrice.chotard@foss.st.com&gt;
Reviewed-by: Patrick Delaunay &lt;patrick.delaunay@foss.st.com&gt;
Cc: mark.kettenis@xs4all.nl
Signed-off-by: Patrick Delaunay &lt;patrick.delaunay@foss.st.com&gt;
</content>
</entry>
<entry>
<title>i2c: Rename SPL/TPL_I2C_SUPPORT to I2C</title>
<updated>2021-07-28T18:29:37+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2021-07-11T03:14:36+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/starfive-tech/u-boot.git/commit/?id=975e7cf301b9641517a1173e2a1047ac0ed20daf'/>
<id>urn:sha1:975e7cf301b9641517a1173e2a1047ac0ed20daf</id>
<content type='text'>
Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Heiko Schocher &lt;hs@denx.de&gt;
</content>
</entry>
<entry>
<title>i2c: Rename CONFIG_SYS_I2C to CONFIG_SYS_I2C_LEGACY</title>
<updated>2021-07-28T18:29:37+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2021-07-11T03:14:32+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/starfive-tech/u-boot.git/commit/?id=69d9eda4da13ecabb8002fce0dded4bba3bff9f9'/>
<id>urn:sha1:69d9eda4da13ecabb8002fce0dded4bba3bff9f9</id>
<content type='text'>
It is quite confusing that CONFIG_SYS_I2C selects the legacy I2C and
CONFIG_DM_I2C selects the current I2C. The deadline to migrate I2C is less
than a year away.

Also we want to have a CONFIG_I2C for U-Boot proper just like we have
CONFIG_SPL_I2C for SPL, so we can simplify the Makefile rules.

Rename this symbol so it is clear it is going away.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Heiko Schocher &lt;hs@denx.de&gt;
</content>
</entry>
<entry>
<title>armv8: Initialize CNTFRQ if at highest exception level</title>
<updated>2021-07-23T22:53:46+00:00</updated>
<author>
<name>Peter Hoyes</name>
<email>Peter.Hoyes@arm.com</email>
</author>
<published>2021-07-12T14:04:21+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/starfive-tech/u-boot.git/commit/?id=c48fec6e7c6ba173f42c9e8b70c001862e048220'/>
<id>urn:sha1:c48fec6e7c6ba173f42c9e8b70c001862e048220</id>
<content type='text'>
CNTFRQ_EL0 is only writable from the highest supported exception
level on the platform. For Armv8-A, this is typically EL3, but
technically EL2 and EL3 are optional so it may need to be
initialized at EL2 or EL1. For Armv8-R, the highest exception
level is always EL2.

This patch moves the initialization outside of the switch_el
block and uses a new macro branch_if_not_highest_el which
dynamically detects whether it is at the highest supported
exception level.

Linux's docs state that CNTFRQ_EL0 should be initialized by the
bootloader. If not set, the the U-Boot prompt countdown hangs.

Signed-off-by: Peter Hoyes &lt;Peter.Hoyes@arm.com&gt;
</content>
</entry>
<entry>
<title>arm: armv8: Fix warning about redeclaring global functions as weak</title>
<updated>2021-07-09T16:15:41+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2021-06-29T23:33:04+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/starfive-tech/u-boot.git/commit/?id=f7b845bfe0621d04f5f32caa14a5aaca799c904e'/>
<id>urn:sha1:f7b845bfe0621d04f5f32caa14a5aaca799c904e</id>
<content type='text'>
As seen with clang-12:
warning: __asm_invalidate_l3_dcache changed binding to STB_WEAK

As we indeed use ENTRY and then declare the function weak manually.  Use
the WEAK declarative from &lt;linux/linkage.h&gt; instead.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>armv8: Handle EL2 Host mode</title>
<updated>2021-07-09T15:36:12+00:00</updated>
<author>
<name>Mark Kettenis</name>
<email>kettenis@openbsd.org</email>
</author>
<published>2021-02-10T19:14:55+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/starfive-tech/u-boot.git/commit/?id=bfb798461af42ac628e22cbf5a0576fa156e8787'/>
<id>urn:sha1:bfb798461af42ac628e22cbf5a0576fa156e8787</id>
<content type='text'>
On implementations that support VHE, the layout of the CPTR_EL2
register depends on whether HCR_EL2.E2H is set.  If the bit is
set, CPTR_EL2 uses the same layout as CPACR_EL1 and can in fact
be accessed through that register.  In that case, jump to the
EL1 code to enable access to the FP/SIMD registers.  This allows
U-Boot to run on systems that pass control to U-Boot in EL2 with
EL2 Host mode enabled such as machines using Apple's M1 SoC.

Signed-off-by: Mark Kettenis &lt;kettenis@openbsd.org&gt;
Acked-by: Marc Zyngier &lt;maz@kernel.org&gt;
</content>
</entry>
</feed>
