<feed xmlns='http://www.w3.org/2005/Atom'>
<title>starfive-tech/u-boot.git/arch/arm/Kconfig, branch rtthread_AMP</title>
<subtitle>StarFive Tech U-Boot for VisionFive (JH7110) boards (mirror)</subtitle>
<id>https://git.radix-linux.su/starfive-tech/u-boot.git/atom?h=rtthread_AMP</id>
<link rel='self' href='https://git.radix-linux.su/starfive-tech/u-boot.git/atom?h=rtthread_AMP'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/starfive-tech/u-boot.git/'/>
<updated>2021-09-13T22:23:13+00:00</updated>
<entry>
<title>pci: Drop DM_PCI</title>
<updated>2021-09-13T22:23:13+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2021-08-02T00:54:44+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/starfive-tech/u-boot.git/commit/?id=3232bdf0b30b057ace64f192bc55a0bed4199770'/>
<id>urn:sha1:3232bdf0b30b057ace64f192bc55a0bed4199770</id>
<content type='text'>
This option has not effect now. Drop it, using PCI instead where needed.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>Merge tag 'xilinx-for-v2021.10-rc3' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze</title>
<updated>2021-08-27T12:33:02+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2021-08-27T12:33:02+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/starfive-tech/u-boot.git/commit/?id=b9cb74a5aa256fc34a1b2b9dd847a985b91f34f6'/>
<id>urn:sha1:b9cb74a5aa256fc34a1b2b9dd847a985b91f34f6</id>
<content type='text'>
Xilinx changes for v2021.10-rc3

xilinx:
- Disable CONFIG_ARCH_FIXUP_FDT_MEMORY
- Print information about cpu via soc drivers and enable DISPLAY_CPUINFO
- Wire infrastructure for DTB_RESELECT and MULTI_DTB_FIT

zynq:
- Wire single QSPI
- Use power-source instead of io-standard properties
- Enable nor on zc770-xm012

zynqmp:
- Change handling around multi_boot()
- Setup offset for u-boot.itb in spi
- Generate run time dfu_alt_info for capsule update
- Use explicit values for enums (zynqmp_firmware.h)
- Enable RTC/SHA1/BUTTON/BUTTON_GPIO command
- Disable WDT driver by default
- Bind usb/scsi via preboot because of EFI
- DT updates/fixes
- Add soc driver
- Fix SPL SPI boot mode

versal:
- Add soc driver

sdhci:
- Update tap delay programming for zynq_sdhci driver

cmd:
- Fix RTC uclass handling in date command
- Update pwm help message
- Update reset help message

watchdog:
- Fix wwdt compilation

rtc:
- Deal with seq alias in rtc uclass
- Add zynqmp RTC driver

fdt:
- Add kernel-doc for fdt_fixup_memory_banks()
</content>
</entry>
<entry>
<title>soc: xilinx: versal: Add soc_xilinx_versal driver</title>
<updated>2021-08-26T06:08:11+00:00</updated>
<author>
<name>T Karthik Reddy</name>
<email>t.karthik.reddy@xilinx.com</email>
</author>
<published>2021-08-10T12:50:19+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/starfive-tech/u-boot.git/commit/?id=42e20f52d9a4c76f4740ef6310edaa820028e070'/>
<id>urn:sha1:42e20f52d9a4c76f4740ef6310edaa820028e070</id>
<content type='text'>
soc_xilinx_versal driver allows identification of family &amp; revision
of versal SoC. This driver is selected by CONFIG_SOC_XILINX_VERSAL.
Probe this driver using platdata U_BOOT_DEVICE structure which is
defined at mach-versal/cpu.c.
Add this config to xilinx_versal_virt_defconfig &amp;
xilinx_versal_mini_ospi_defconfig file to select this driver.

Signed-off-by: T Karthik Reddy &lt;t.karthik.reddy@xilinx.com&gt;
Reviewed-by: Ashok Reddy Soma &lt;ashok.reddy.soma@xilinx.com&gt;
Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</content>
</entry>
<entry>
<title>soc: xilinx: zynqmp: Add soc_xilinx_zynqmp driver</title>
<updated>2021-08-26T06:08:11+00:00</updated>
<author>
<name>T Karthik Reddy</name>
<email>t.karthik.reddy@xilinx.com</email>
</author>
<published>2021-08-10T12:50:18+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/starfive-tech/u-boot.git/commit/?id=a890a53ad2cdda973959947619245832203cd7f3'/>
<id>urn:sha1:a890a53ad2cdda973959947619245832203cd7f3</id>
<content type='text'>
soc_xilinx_zynqmp driver allows identification of family &amp; revision
of zynqmp SoC. This driver is selected by CONFIG_SOC_XILINX_ZYNQMP.
Add this config to xilinx_zynqmp_virt_defconfig file.
Probe this driver using platdata U_BOOT_DEVICE structure which is
specified in mach-zynqmp/cpu.c.

Signed-off-by: T Karthik Reddy &lt;t.karthik.reddy@xilinx.com&gt;
Reviewed-by: Ashok Reddy Soma &lt;ashok.reddy.soma@xilinx.com&gt;
Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</content>
</entry>
<entry>
<title>rockchip: Fix u-boot-rockchip.bin build</title>
<updated>2021-08-12T01:34:07+00:00</updated>
<author>
<name>Johan Gunnarsson</name>
<email>johan.gunnarsson@gmail.com</email>
</author>
<published>2021-07-25T14:25:58+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/starfive-tech/u-boot.git/commit/?id=475bb949ed191bc00e08781a56a4a1e83fd76242'/>
<id>urn:sha1:475bb949ed191bc00e08781a56a4a1e83fd76242</id>
<content type='text'>
Currently there are a few arm32 rockchip board configs that don't
generate u-boot-rockchip.bin when running make because CONFIG_BINMAN
is not enabled. This patch changes CONFIG_ARCH_ROCKCHIP to also select
CONFIG_BINMAN if CONFIG_SPL and !CONFIG_ARM64.

Example builds that don't generate u-boot-rockchip.bin without this
patch:

export ARCH=arm
export CROSS_COMPILE=/usr/bin/arm-linux-gnueabihf-
make kylin-rk3036_defconfig
make

export ARCH=arm
export CROSS_COMPILE=/usr/bin/arm-linux-gnueabihf-
make rock_defconfig
make

export ARCH=arm
export CROSS_COMPILE=/usr/bin/arm-linux-gnueabihf-
make tinker-rk3288_defconfig
make

Signed-off-by: Johan Gunnarsson &lt;johan.gunnarsson@gmail.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</content>
</entry>
<entry>
<title>arm: imx: add i.MX8ULP basic Kconfig option</title>
<updated>2021-08-09T12:46:50+00:00</updated>
<author>
<name>Peng Fan</name>
<email>peng.fan@nxp.com</email>
</author>
<published>2021-08-07T08:00:30+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/starfive-tech/u-boot.git/commit/?id=19b990b4f756a6f0b661b2a3ba3f67228be773f4'/>
<id>urn:sha1:19b990b4f756a6f0b661b2a3ba3f67228be773f4</id>
<content type='text'>
Add i.MX8ULP related basic Kconfig option, which will be used later.

Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
</content>
</entry>
<entry>
<title>Merge https://source.denx.de/u-boot/custodians/u-boot-samsung</title>
<updated>2021-08-03T13:07:01+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2021-08-03T13:07:01+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/starfive-tech/u-boot.git/commit/?id=b91c70433386d133c842729c5d9b109cdcc79399'/>
<id>urn:sha1:b91c70433386d133c842729c5d9b109cdcc79399</id>
<content type='text'>
</content>
</entry>
<entry>
<title>Rename GPIO_SUPPORT to GPIO</title>
<updated>2021-07-28T18:29:36+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2021-07-11T03:14:30+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/starfive-tech/u-boot.git/commit/?id=83061dbd1c893a9abd1b2566785e100448e3f6a3'/>
<id>urn:sha1:83061dbd1c893a9abd1b2566785e100448e3f6a3</id>
<content type='text'>
Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>Rename SPL_WATCHDOG_SUPPORT to SPL_WATCHDOG</title>
<updated>2021-07-28T18:27:54+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2021-07-11T03:14:28+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/starfive-tech/u-boot.git/commit/?id=078111b9c04764114c04f70969e84a01ffb487c0'/>
<id>urn:sha1:078111b9c04764114c04f70969e84a01ffb487c0</id>
<content type='text'>
Rename this option so that CONFIG_IS_ENABLED can be used with it.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>Rename SPL_POWER_SUPPORT to SPL_POWER</title>
<updated>2021-07-28T18:27:54+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2021-07-11T03:14:24+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/starfive-tech/u-boot.git/commit/?id=933b2f09cbbb7b01af415d204b712b3f93c04dde'/>
<id>urn:sha1:933b2f09cbbb7b01af415d204b712b3f93c04dde</id>
<content type='text'>
Rename this option so that CONFIG_IS_ENABLED can be used with it.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Jaehoon Chung &lt;jh80.chung@samsung.com&gt;
</content>
</entry>
</feed>
