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2023-06-23lib: sbi: check A2 register in ecall_dbcn_handler.Gianluca Guida1-2/+5
Do not ignore register A2 (high bits of physical address) in the dbcn handler (RV64). Signed-off-by: Gianluca Guida <gianluca@rivosinc.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2023-06-15platform/lib: Set no-map attribute on all PMP regionsAlexandre Ghiti1-39/+10
This reverts commit 6966ad0abe70 ("platform/lib: Allow the OS to map the regions that are protected by PMP"). It was thought at the time of this commit that allowing the kernel to map PMP protected regions was safe but it is actually not: for example, the hibernation process will try to access any linear mapping page and then will fault on such mapped PMP regions [1]. Another issue is that the device tree specification [2] states that a !no-map region must be declared as EfiBootServicesData/Code in the EFI memory map which would make the PMP protected regions reclaimable by the kernel. And to circumvent this, RISC-V edk2 diverges from the DT specification to declare those regions as EfiReserved. The no-map attribute was removed to allow the kernel to use hugepages larger than 2MB to map the linear mapping to improve the performance but actually a recent talk from Mike Rapoport [3] stated that the performance benefit was marginal. For all those reasons, let's mark all the PMP protected regions as "no-map". [1] https://lore.kernel.org/linux-riscv/CAAYs2=gQvkhTeioMmqRDVGjdtNF_vhB+vm_1dHJxPNi75YDQ_Q@mail.gmail.com/ [2] "3.5.4 /reserved-memory and UEFI" https://github.com/devicetree-org/devicetree-specification/releases/download/v0.4-rc1/devicetree-specification-v0.4-rc1.pdf [3] https://lwn.net/Articles/931406/ Signed-off-by: Alexandre Ghiti <alexghiti@rivosinc.com> Reviewed-by: Atish Patra <atishp@rivosinc.com> Reviewed-by: Xiang W <wxjstz@126.com>
2023-06-06lib: utils/irqchip: Use scratch space to save per-HART IMSIC pointerAnup Patel2-17/+70
Instead of using a global array indexed by hartid, we should use scratch space to save per-HART IMSIC pointer and IMSIC file number. Signed-off-by: Anup Patel <apatel@ventanamicro.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
2023-06-05lib: utils/irqchip: Don't check hartid in imsic_update_hartid_table()Anup Patel1-3/+0
The imsic_map_hartid_to_data() already checks hartid before using so we don't need to check in imsic_update_hartid_table(). Signed-off-by: Anup Patel <apatel@ventanamicro.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
2023-06-05lib: utils/irqchip: Use scratch space to save per-HART PLIC pointerAnup Patel1-22/+66
Instead of using a global array indexed by hartid, we should use scratch space to save per-HART PLIC pointer and PLIC context numbers. Signed-off-by: Anup Patel <apatel@ventanamicro.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
2023-06-05lib: utils/timer: Use scratch space to save per-HART MTIMER pointerAnup Patel1-15/+61
Instead of using a global array indexed by hartid, we should use scratch space to save per-HART MTIMER pointer. Signed-off-by: Anup Patel <apatel@ventanamicro.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
2023-06-05lib: utils/ipi: Use scratch space to save per-HART MSWI pointerAnup Patel1-10/+33
Instead of using a global array indexed by hartid, we should use scratch space to save per-HART MSWI pointer. Signed-off-by: Anup Patel <apatel@ventanamicro.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
2023-06-05lib: utils/fdt: Use heap in FDT domain parsingAnup Patel1-42/+71
Let's use heap allocation in FDT domain parsing instead of using a fixed size global array. Signed-off-by: Anup Patel <apatel@ventanamicro.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
2023-06-05lib: utils/timer: Use heap in ACLINT MTIMER driverAnup Patel1-17/+30
Let's use heap allocation in ACLINT MTIMER driver instead of using a fixed size global array. Signed-off-by: Anup Patel <apatel@ventanamicro.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
2023-06-05lib: utils/irqchip: Use heap in PLIC, APLIC and IMSIC driversAnup Patel3-46/+42
Let's use heap allocation in PLIC, APLIC, and IMSIC irqchip drivers instead of using a fixed size global array. Signed-off-by: Anup Patel <apatel@ventanamicro.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
2023-06-05lib: utils/ipi: Use heap in ACLINT MSWI driverAnup Patel1-11/+10
Let's use heap allocation in ACLINT MSWI driver instead of using a fixed size global array. Signed-off-by: Anup Patel <apatel@ventanamicro.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
2023-06-05lib: utils/i2c: Use heap in DesignWare and SiFive I2C driversAnup Patel2-27/+20
Let's use heap allocation in DesignWare and SiFive I2C drivers instead of using a fixed size global array. Signed-off-by: Anup Patel <apatel@ventanamicro.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
2023-06-05lib: utils/gpio: Use heap in SiFive and StartFive GPIO driversAnup Patel2-21/+20
Let's use heap allocation in SiFive and Starfive GPIO drivers instead of using a fixed size global array. Signed-off-by: Anup Patel <apatel@ventanamicro.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
2023-06-05lib: sbi: Use scratch space to save per-HART domain pointerAnup Patel1-11/+44
Instead of using a global array indexed by hartid, we should use scratch space to save per-HART domain pointer. Signed-off-by: Anup Patel <apatel@ventanamicro.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
2023-06-05lib: sbi: Use heap for root domain creationAnup Patel1-11/+34
Let's use heap allocation in root domain creation instead of using a fixed size global array. Signed-off-by: Anup Patel <apatel@ventanamicro.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
2023-06-05lib: sbi_pmu: Use heap for per-HART PMU stateAnup Patel1-88/+127
Instead of using a global array for per-HART PMU state, we should use heap to on-demand allocate per-HART PMU state when the HART is initialized in cold boot or warm boot path. Signed-off-by: Anup Patel <apatel@ventanamicro.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
2023-06-05lib: sbi: Print scratch size and usage at boot timeAnup Patel2-0/+16
The scratch space being a scarce resource so let us print it's size and usage at boot time. Signed-off-by: Anup Patel <apatel@ventanamicro.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
2023-06-05lib: sbi: Introduce simple heap allocatorAnup Patel3-0/+222
We provide simple heap allocator to manage the heap space provided by OpenSBI firmware and platform. Signed-off-by: Anup Patel <apatel@ventanamicro.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
2023-06-04lib: sbi: Align system suspend errors with specAndrew Jones1-6/+8
The spec says sbi_system_suspend() will return SBI_ERR_INVALID_PARAM when "sleep_type is reserved or is platform-specific and unimplemented" and SBI_ERR_NOT_SUPPORTED when sleep_type "is not reserved and is implemented, but the platform does not support it due to one or more missing dependencies." Ensure SBI_ERR_INVALID_PARAM is returned for reserved sleep types and that the system suspend driver can choose which of the two error types to return itself by returning an error from its check function rather than a boolean. Signed-off-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2023-06-04lib: utils/ipi: buffer overrun aclint_mswi_cold_initHeinrich Schuchardt1-2/+2
The parameter checks in aclint_mswi_cold_init() don't guard against a buffer overrun. mswi_hartid2data is defined as an array of SBI_HARTMASK_MAX_BITS entries. The current check allows mswi->hart_count = ACLINT_MSWI_MAX_HARTS mswi->first_hartid = SBI_HARTMASK_MAX_BITS - 1. With these values mswi_hartid2data will be accessed at index SBI_HARTMASK_MAX_BITS + SBI_HARTMASK_MAX_BITS - 2. We have to check the sum of mswi->first_hartid and mswi->hart_count. Furthermore mswi->hart_count = 0 would not make much sense. Addresses-Coverity-ID: 1529705 ("Out-of-bounds write") Fixes: 5a049fe1d6a5 ("lib: utils/ipi: Add ACLINT MSWI library") Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Xiang W <wxjstz@126.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2023-05-26lib: utils: Improve fdt_timerXiang W1-20/+21
Remove dummy driver. Optimize fdt_timer_cold_init to exit the loop early. Signed-off-by: Xiang W <wxjstz@126.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2023-05-26lib: utils: Improve fdt_ipiXiang W1-20/+21
Remove dummy driver. Optimize fdt_ipi_cold_init to exit the loop early. Signed-off-by: Xiang W <wxjstz@126.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2023-05-26lib: utils: Improve fdt_serial_initXiang W1-31/+17
A final check of all DT nodes does not necessarily find a match, so SBI_ENODEV needs to be returned. Optimize removal of current_driver. Signed-off-by: Xiang W <wxjstz@126.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2023-05-26lib: sbi: Fix return of sbi_console_initXiang W1-1/+7
console is not a required peripheral. So it should return success when the console does not exist. Signed-off-by: Xiang W <wxjstz@126.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2023-05-21lib: sbi: Remove 0/1 probe implementationsAndrew Jones4-39/+10
When a probe implementation just returns zero for not available and one for available then we don't need it, as the extension won't be registered at all if it would return zero and the Base extension probe function will already set out_val to 1 if not probe function is implemented. Currently all probe functions only return zero or one, so remove them all. Signed-off-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2023-05-21lib: sbi: Optimize probe of srst/suspXiang W2-8/+12
No need to do a fully comprehensive count, just find a supported reset or suspend type Signed-off-by: Xiang W <wxjstz@126.com> Signed-off-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2023-05-21lib: sbi: Only register available extensionsAndrew Jones6-22/+35
When an extension implements a probe function it means there's a chance that the extension is not available. Use this function in the register_extensions callback to determine if the extension should be registered at all. Where the probe implementation is simple, just open code the check. Signed-off-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2023-05-21lib: sbi: pmu: Remove unnecessary probe functionAndrew Jones1-8/+0
The absence of a probe implementation means that the extension is always available. Remove the implementation for the PMU extension, which does no checking, and indeed even has a comment saying it's always available. Signed-off-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2023-05-21lib: sbi: Narrow vendor extension rangeAndrew Jones1-4/+7
The vendor extension ID range is large, but at runtime at most a single ID will be available. Narrow the range in the register_extensions callback. After narrowing, we no longer need to check that the extension ID is correct in the other callbacks, as those callbacks will never be invoked with anything other than the single ID. Signed-off-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2023-05-21lib: sbi: Introduce register_extensions extension callbackAndrew Jones13-43/+142
Rather than registering all extensions on their behalf in sbi_ecall_init(), introduce another extension callback and invoke that instead. For now, implement each callback by simply registering the extension, which means this patch has no intended functional change. In later patches, extension callbacks will be modified to choose when to register and to possibly narrow the extension ID range prior to registering. When an extension range needs to remove IDs, leaving gaps, then multiple invocations of sbi_ecall_register_extension() may be used. In summary, later patches for current extensions and the introductions of future extensions will use the new callback to ensure that only valid extension IDs from the initial range, which are also available, will be registered. Signed-off-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2023-05-11lib: sbi: Simplify sbi_ipi_process remove gotoXiang W1-8/+5
Simplify sbi_ipi_process() by removing goto statement. Signed-off-by: Xiang W <wxjstz@126.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2023-05-11lib: sbi: Remove unnecessary semicolonXiang W14-18/+18
We have redundant semicolon at quite a few places so let's remove it. Signed-off-by: Xiang W <wxjstz@126.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2023-04-20lib: sbi: Add debug print when sbi_pmu_init failsTan En De1-1/+4
Since sbi_pmu_init is called after sbi_console_init, the sbi_printf can be called when sbi_pmu_init fails. Signed-off-by: Tan En De <ende.tan@starfivetech.com> Reviewed-by: Atish Patra <atishp@rivosinc.com>
2023-04-17lib: sbi: Don't check SBI error range for legacy console getcharAnup Patel1-1/+3
The legacy console getchar SBI call returns character value in the sbiret.error field so the "SBI_SUCCESS < ret" check in sbi_ecall_handler() results in unwanted error prints for the legacy console getchar SBI call. Let's suppress these unwanted error prints. Fixes: 67b2a408924b ("lib: sbi: sbi_ecall: Check the range of SBI error") Signed-off-by: Anup Patel <apatel@ventanamicro.com>
2023-04-17lib: sbi: Fix counter index calculation for SBI_PMU_CFG_FLAG_SKIP_MATCHAlexandre Ghiti1-2/+7
As per the SBI specification, we should "unconditionally select the first counter from the set of counters specified by the counter_idx_base and counter_idx_mask", so implement this behaviour. Suggested-by: Atish Patra <atishp@atishpatra.org> Signed-off-by: Alexandre Ghiti <alexghiti@rivosinc.com> Reviewed-by: Atish Patra <atishp@rivosinc.com>
2023-04-17lib: sbi: Do not clear active_events for cycle/instret when stoppingAlexandre Ghiti1-1/+1
Those events are enabled by default and should not be reset afterwards since when using SBI_PMU_CFG_FLAG_SKIP_MATCH, it leads to unaccessible counters after the first use. Signed-off-by: Alexandre Ghiti <alexghiti@rivosinc.com> Reviewed-by: Atish Patra <atishp@rivosinc.com>
2023-04-14lib: sbi: Optimize sbi_tlb queue waitingXiang W2-26/+25
When tlb_fifo is full, it will wait and affect the ipi update to other harts. This patch is optimized. Signed-off-by: Xiang W <wxjstz@126.com> Reviewed-by: Anup Patel <anup@brainfault.org> Tested-by: Anup Patel <anup@brainfault.org>
2023-04-13sbi: tlb: Simplify to tlb_process_count/tlb_process functionXiang W1-15/+8
tlb_process_count is only used when count=1, so refactor to tlb_process_once and add the return value to be reused in tlb_process Signed-off-by: Xiang W <wxjstz@126.com> Reviewed-by: Anup Patel <anup@brainfault.org> Tested-by: Anup Patel <anup@brainfault.org>
2023-04-13lib: sbi: Optimize sbi_ipiXiang W1-2/+32
The original sbi_ipi will be processed by hart by hart, after optimization, send ipi first and finally wait together. Signed-off-by: Xiang W <wxjstz@126.com> Reviewed-by: Anup Patel <anup@brainfault.org> Tested-by: Anup Patel <anup@brainfault.org>
2023-04-13lib: sbi: Optimize sbi_tlbXiang W1-10/+11
Originally, the process and sync of sbi_tlb need to wait for each other. Evasion by atomic addition and subtraction. Signed-off-by: Xiang W <wxjstz@126.com> Reviewed-by: Anup Patel <anup@brainfault.org> Tested-by: Anup Patel <anup@brainfault.org>
2023-04-07lib: utils: fdt_fixup: avoid buffer overrunHeinrich Schuchardt1-1/+1
fdt_reserved_memory_fixup() uses filtered_order[PMP_COUNT]. The index must not reach PMP_COUNT. Fixes: 199189bd1c17 ("lib: utils: Mark only the largest region as reserved in FDT") Addresses-Coverity-ID: 1536994 ("Out-of-bounds write") Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Xiang W <wxjstz@126.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2023-04-07lib: sbi_pmu: Align the event type offset as per SBI specificationYu Chien Peter Lin1-3/+4
The bits encoded in event_idx[19:16] indicate the event type, with an offset of 16 instead of 20. Fixes: 13d40f21d588 ("lib: sbi: Add PMU support") Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Xiang W <wxjstz@126.com>
2023-04-07lib: sbi: Print the CPPC device nameSunil V L1-0/+5
If CPPC device is registered by the platform, print its name. Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2023-04-07lib: sbi: Implement SBI CPPC extensionSunil V L4-0/+181
Implement SBI CPPC extension. This extension is only available when OpenSBI platform provides a CPPC device to generic library. Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2023-04-06lib: sbi_hart: clear mip csr during hart initMayuresh Chitale1-0/+6
If mip.SEIP bit is not cleared then on HiFive Unmatched board it causes spurious external interrupts. This breaks the boot up of HiFive Unmatched board. Hence it is required to bring the mip CSR to a known state during hart init and avoid spurious interrupts. Fixes: d9e7368 ("firmware: Not to clear all the MIP") Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2023-04-06lib: sbi_hsm: Fix sbi_hsm_hart_start() for platform with hart hotplugAnup Patel1-2/+4
It possible that a platform supports hart hotplug (i.e. both hart_start and hart_stop callbacks available) and all harts are start simultaneously at platform boot-time. In this situation, the sbi_hsm_hart_start() will call hsm_device_hart_start() for secondary harts at platform boot-time which will fail because secondary harts were already started. To fix above, we call hsm_device_hart_start() from sbi_hsm_hart_start() only when entry_count is same as init_count for the secondary hart. Signed-off-by: Anup Patel <apatel@ventanamicro.com>
2023-04-06lib: sbi: Introduce sbi_entry_count() functionAnup Patel1-7/+35
We introduce sbi_entry_count() function which counts the number of times a HART enters OpenSBI via cold-boot or warm-boot path. Signed-off-by: Anup Patel <apatel@ventanamicro.com>
2023-04-06lib: sbi: Fix how to check whether the domain contains fw_regionXiang W2-21/+10
Because firmware is split into rw/rx segments, it cannot be recorded by a root_fw_region. This problem is solved by adding a flag fw_region_inited to sbi_domain. Signed-off-by: Xiang W <wxjstz@126.com> Reviewed-by: Himanshu Chauhan <hchauhan@ventanamicro.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2023-04-06lib: sbi_scratch: Optimize the alignment code for alloc sizeXiang W1-2/+2
Signed-off-by: Xiang W <wxjstz@126.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2023-03-10lib: sbi: Clear IPIs before init_warm_startup in non-boot hartsVF2_v3.8.2VF2_v3.7.5VF2_v3.6.1VF2_v3.4.5VF2_v3.1.5VF2_v3.0.4VF2_v2.11.5VF2_6.1_v3.8.2VF2_6.1_v3.7.5JH7110_VF2_6.6_v5.12.0JH7110_VF2_6.1_v5.12.0JH7110_VF2_6.1_v5.11.4JH7110_VF2_6.1_v5.11.3JH7110_VF2_6.1_v5.10.3JH7110_VF2_6.1_v3.9.3JH7110_VF2_515_v5.12.0JH7110_VF2_515_v5.11.4JH7110_VF2_515_v5.11.3JH7110_VF2_515_v5.10.3JH7110_VF2_515_v3.9.3Evgenii Shatokhin2-2/+10
Since commit 50d4fde1c5a4 ("lib: Remove redundant sbi_platform_ipi_clear() calls"), the IPI sent from the boot hart in wake_coldboot_harts() is not cleared in the secondary harts until they reach sbi_ipi_init(). However, sbi_hsm_init() and sbi_hsm_hart_wait() are called earlier, so a secondary hart might enter sbi_hsm_hart_wait() with an already pending IPI. sbi_hsm_hart_wait() makes sure the hart leaves the loop only when it is actually ready, so a pending unrelated IPI should not cause safety issues. However, it might be inefficient on certain hardware, because it prevents "wfi" from stalling the hart even if the hardware supports this, making the hart needlessly spin in a "busy-wait" loop. This behaviour can be observed, for example, in a QEMU VM (QEMU 7.2.0) with "-machine virt" running a Linux guest. Inserting delays in sbi_hsm_hart_start() allows reproducing the issue more reliably. The comment in wait_for_coldboot() suggests that the initial IPI is needed in the warm resume path, so let us clear it before init_warm_startup() only. To do this, sbi_ipi_raw_clear() was created similar to sbi_ipi_raw_send(). Signed-off-by: Evgenii Shatokhin <e.shatokhin@yadro.com> Reviewed-by: Anup Patel <anup@brainfault.org>
generated by cgit v1.2.3 (git 2.39.0) at 2026-10-01 22:46:39 +0300