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2019-01-02include: Move RISCV_SCRATCH_xyz defines to sbi_scratch.hAnup Patel2-12/+17
The struct sbi_scratch related defines RISCV_SCRATCH_xyz should be in sbi_scratch.h so that we can keep these defines in-sync with changes in struct sbi_scratch. Signed-off-by: Anup Patel <anup.patel@wdc.com>
2019-01-02include: Replace #csr with __ASM_STR(csr) in csr_xyz() macrosAnup Patel1-5/+5
We replace #csr with __ASM_STR(csr) in all csr_xyz() macros so that we can pass CSR number instead of CSR name when GCC is not aware of CSR name. Signed-off-by: Anup Patel <anup.patel@wdc.com>
2019-01-02include: Remove redundant csr_read_n() and csr_write_n()Anup Patel1-19/+2
The patch removes redundant csr_read_n() and csr_write_n() because same thing can be achieved by using __ASM_STR() macro in csr_read() and csr_write() macros. Signed-off-by: Anup Patel <anup.patel@wdc.com>
2018-12-31lib: Redirect illegal instruction trap to S-mode when not handledAnup Patel2-3/+10
Currently, we fail with error SBI_ENOTSUPP when we are not able to handle illegal instruction trap. Instead, we should just redirect illegal instruction trap to S-mode when not handled. This redirection of illegal instruction trap will help lazy save/restore of floating point registers to work correctly in Linux kernel. Signed-off-by: Anup Patel <anup.patel@wdc.com>
2018-12-27lib: Rename target_hart parameter to hartid for PMP platform callbacksAnup Patel1-7/+7
We rename target_hart parameter of PMP platform callbacks to hartid for clarity because the parameter represents current hartid. Signed-off-by: Anup Patel <anup.patel@wdc.com>
2018-12-27lib: Simplify sbi_platform timer_init() hooksAnup Patel2-16/+7
Instead of having separate timer_init() hooks for cold and warm boot, this patch updates struct sbi_platform to have just one timer_init() hook. The type of boot (cold or warm) is now a boolean flag parameter for the updated timer_init() hook. Signed-off-by: Anup Patel <anup.patel@wdc.com>
2018-12-27lib: Simplify sbi_platform ipi_init() hooksAnup Patel2-16/+6
Instead of having separate ipi_init() hooks for cold and warm boot, this patch updates struct sbi_platform to have just one ipi_init() hook. The type of boot (cold or warm) is now a boolean flag parameter for the updated ipi_init() hook. Signed-off-by: Anup Patel <anup.patel@wdc.com>
2018-12-27lib: Simplify sbi_platform irqchip_init() hooksAnup Patel1-13/+5
Instead of having separate irqchip_init() hooks for cold and warm boot, this patch updates struct sbi_platform to have just one irqchip_init() hook. The type of boot (cold or warm) is now a boolean flag parameter for the updated irqchip_init() hook. Signed-off-by: Anup Patel <anup.patel@wdc.com>
2018-12-27lib: Simplify sbi_platform early_init() and final_init() hooksAnup Patel2-32/+14
Instead of having separate early_init() and final_init() hooks for cold and warm boot, this patch updates struct sbi_platform to have just one early_init() and one final_init() hook. The type of boot (cold or warm) is now a boolean flag parameter for the updated early_init() and final_init() hooks. Signed-off-by: Anup Patel <anup.patel@wdc.com>
2018-12-27lib: Move ECALL defines to sbi_ecall_interface.hAnup Patel1-0/+39
This patch moves all ECALL defines to sbi_ecall_interface.h so that it can be shared with firmware payloads. Signed-off-by: Anup Patel <anup.patel@wdc.com>
2018-12-26lib: Add misaligned load/store trap handlingAnup Patel1-0/+26
We generally don't get misaligned load/store traps from Linux/U-Boot compiled using GCC 8.2 or higher but this is not true with older GCC toolchains. To tackle this we add misaligned load/store trap handling adopted from BBL sources but much more simpler. (Note: BBL sources can be found at https://github.com/riscv/riscv-pk.git) Signed-off-by: Anup Patel <anup.patel@wdc.com>
2018-12-26lib: Move instruction encoding macros to riscv_encoding.hAnup Patel2-15/+117
This patch moves all instruction encoding macros to riscv_encoding.h. Signed-off-by: Anup Patel <anup.patel@wdc.com>
2018-12-22firmware: Don't depend on PLAT_HART_COUNT and PLAT_HART_STACK_SIZEAnup Patel1-0/+5
The hart_count and hart_stack_size information is already available in "struct sbi_platform" so we use that instead of depending on PLAT_HART_COUNT and PLAT_HART_STACK_SIZE. Signed-off-by: Anup Patel <anup.patel@wdc.com>
2018-12-22Introduce hart disabled parameter in platform.Atish Patra1-0/+8
As of now, uboot doesn't have support for SMP. Moreover, unleashed board has a E51 hart which doesn't not support S mode. We should only boot only 1 non-zero hart. Signed-off-by: Atish Patra <atish.patra@wdc.com>
2018-12-21Introduce HAS_MFAULTS_DELEGATION featureDamien Le Moal1-1/+5
Conditionnally delegate page fault exceptions from M mode to S mode based on the platform features. Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
2018-12-21Introduce sbi_current_hartid()Damien Le Moal1-0/+2
Use this helper instead of hardcoding csr_read(mhartid). Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
2018-12-21Cleanup and rename sbi_hart_boot_next()Damien Le Moal1-4/+4
Cleanup sbi_hart_boot_nexti() code, adding messages for clarity and rename the function to sbi_hart_switch_mode() to reflect what the function actually does. Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
2018-12-21Refine platform features controlDamien Le Moal2-12/+24
Allow a platform to report its supported features in more details. The new features defined are: * SBI_PLATFORM_HAS_PMP * SBI_PLATFORM_HAS_SCOUNTEREN * SBI_PLATFORM_HAS_MCOUNTEREN In addition, define the macro SBI_PLATFORM_DEFAULT_FEATURES as the set of features that are generally expected to be supported by a Linux capable platform. Operations touching the features controlled with these falgs are not executed if the platform does not set the corresponding feature flags. Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
2018-12-21Use wfi for coldboot finish call.Atish Patra1-1/+1
Signed-off-by: Atish Patra <atish.patra@wdc.com>
2018-12-11Initial commit.Anup Patel23-0/+1796
Signed-off-by: Anup Patel <anup.patel@wdc.com>