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2019-12-23lib: Add replacement extension and function idsAtish Patra1-22/+38
Take this opportunity to move the enums to macros as enums make sbi_ecall_interface.h unusable in assembly files. Signed-off-by: Atish Patra <atish.patra@wdc.com> Reviewed-by: Anup Patel <anup.patel@wdc.com>
2019-12-16lib: Extend trap redirection for hypervisor v0.5 specAnup Patel3-4/+3
The hypervisor v0.5 spec introduces two new CSRs for both M-mode and HS-mode which need to be considered when redirecting traps hence this patch. Signed-off-by: Anup Patel <anup.patel@wdc.com>
2019-12-16include: Extend struct sbi_trap_info for mtval2 and mtinstAnup Patel1-0/+4
We have two new trap CSRs namely mtval2 and mtinst when RISC-V hypervisor extension is available hence we extend struct sbi_trap_info accordingly. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
2019-12-16include: Add guest external interrupt related definesAnup Patel1-0/+4
With RISC-V H-extension v0.5 draft, we have special support for guest external interrupts so this patch adds related defines which were missed-out previously. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
2019-12-06include: sbi_platform: fix compilation for GCC-9Martin Pietryka1-2/+2
GCC-9 will throw a warning when using the %s format specifier with a possible NULL parameter and since -Werror is used, the compilation breaks for GCC-9. In function 'sbi_boot_prints', inlined from 'init_coldboot' at <redacted>/opensbi/lib/sbi/sbi_init.c:107:3, inlined from 'sbi_init' at <redacted>/opensbi/lib/sbi/sbi_init.c:189:3: <redacted>/opensbi/lib/sbi/sbi_init.c:56:2: error: '%s' directive argument is null [-Werror=format-overflow=] 56 | sbi_printf("Platform Name : %s\n", sbi_platform_name(plat)); | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ cc1: all warnings being treated as errors This is one way to fix this, currently there is nothing in the tree checking for `sbi_platfrom_name() == NULL` so we can just return "Unknown" instead of NULL on failure. Signed-off-by: Martin Pietryka <martin@pietryka.at> Reviewed-by: Anup Patel <anup.patel@wdc.com> Tested-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
2019-11-27lib: Add error detection for misa_extensionXiang W1-3/+11
Add assertions for misa_extension to prevent incoming illegal characters. Signed-off-by: Xiang Wang <merle@hardenedlinux.org> Reviewed-by: Anup Patel <anup.patel@wdc.com>
2019-11-26lib: Fix CPU capabilities detection functionXiang Wang2-10/+46
On some platforms, misa may not be implemented. On such a platform, reading misa will get 0. At this time, platform is required to implement a non-standard function to detect the CPU's capabilities. Therefore, this modification add interfaces for non-standard function. The MXL field of misa is always at the highest two bits, whether it is a 32-bit 64-bit or a 128-bit machine. Therefore, this modification fixes the use of a fixed offset to detect the machine length. Signed-off-by: Xiang Wang <merle@hardenedlinux.org> Signed-off-by: Anup Patel <anup.patel@wdc.com>
2019-11-21lib: Simplify trap parameters in sbi_ecall functionsAnup Patel1-18/+17
The out_tcause and out_tval parameters are not sufficient for most sbi_ecall functions because this will grow in-future when we support RISC-V hypervisor v0.5 draft. We replace these parameters with out_trap which is a pointer to struct sbi_trap_info. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
2019-11-21lib: Better naming of unpriv APIs for wider useAnup Patel3-22/+31
The unpriv APIs can be useful to external firmware and out-of-tree platform support code. This patch adds "sbi_" prefix to unpriv load/store APIs and rename struct riscv_unpriv to struct sbi_trap_info everywhere. We also place struct sbi_trap_info in sbi/sbi_trap.h so that we can use it for sbi_trap_redirect() as well. Overall, this patch will make naming of unpriv APIs consistent with other OpenSBI APIs. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
2019-11-21lib: No need to set VSSTATUS.MXR bit in get_insn()Anup Patel1-1/+1
We don't need to set VSSTATUS.MXR bit in get_insn() for unpriv instruction read because MSTATUS.MXR bit applies to both "Stage1" and "Stage2" page tables. This also allows us to remove the "virt" parameter of get_insn() function. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
2019-11-21include: Remove ilen member of struct unpriv_trapAnup Patel1-1/+0
We simplify struct unpriv_trap by removing ilen member. This can be achieved by ensuring that at all unpriv load/store instructions are 4 bytes long using GCC assembler option. Additionally, this also reduces few instructions from unpriv load/store functions. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
2019-11-15firmware: Add preferred boot HART field in struct fw_dynamic_infoAnup Patel1-4/+22
It has been reported that link address range of previous booting stage (such as U-Boot SPL) can overlap the link address rage of FW_DYNAMIC. This means self-relocation in FW_DYNAMIC can potentially corrupt previous booting stage if any of the secondary HART enter FW_DYNAMIC before primary HART. To tackle this, we add preferred boot HART field (i.e boot_hart) in struct fw_dyanmic_info. We use this field to force secondary HARTs into relocation wait loop till preferred/primary boot HART enters FW_DYNAMIC completes self-relocation. If preferred boot HART is not available then we fall back to relocation lottery approach. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
2019-11-06include: Use _UL() and _ULL() for defines in riscv_encoding.hAnup Patel1-81/+79
The riscv_encoding.h is shared with assembly sources so we use _UL() and _ULL() for register fields related defines. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
2019-11-06include: Sync-up encoding with priv v1.12-draft and hypervisor v0.5-draftAnup Patel1-92/+45
This patch sync-up encoding header with the latest privilege specifications draft v1.12 and hypervisor specifications draft v0.5. The MSTATUS.MTL and HSTATUS.STL bits are not present anymore and will be removed by another patch series for hypervisor v0.5-draft. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
2019-10-09include: Bump-up version to 0.5v0.5Anup Patel1-1/+1
This patch updates OpenSBI version to 0.5 as part of release preparation. Signed-off-by: Anup Patel <anup.patel@wdc.com>
2019-10-03lib: Provide a platform hook to implement vendor specific SBI extensions.Atish Patra2-0/+60
SBI v0.2 specification allows vendor extensions and it should be implemented in a independent of the core sbi library. Introduce a single platform callback that will let platforms handle all vendor extensions in platform specific code if they want. Signed-off-by: Atish Patra <atish.patra@wdc.com> Reviewed-by: Anup Patel <anup.patel@wdc.com>
2019-10-03lib: Implement SBI v0.2Atish Patra1-0/+14
SBI v0.2 introduces a base specification which is mandatory to implement for any SBI implementations that is not legacy. Add support for the base extension. Signed-off-by: Atish Patra <atish.patra@wdc.com> Reviewed-by: Anup Patel <anup.patel@wdc.com>
2019-10-03lib: Rename existing SBI implementation as 0.1.Atish Patra1-9/+11
Current SBI implementation is now considered as version 0.1 and will be removed/replaced with newer extension/functions in future. Rename the existing implementations accordingly to be in sync with the specification. Signed-off-by: Atish Patra <atish.patra@wdc.com> Reviewed-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Zong Li <zong.li@sifive.com>
2019-10-03lib: Align error codes as per SBI specification.Atish Patra1-4/+6
Follow the SBI specification for error codes. Signed-off-by: Atish Patra <atish.patra@wdc.com> Reviewed-by: Anup Patel <anup.patel@wdc.com>
2019-10-03Test: Move test payload related code out of interface headerAtish Patra1-25/+0
Test payload uses an SBI call and uses the macros defined in interface header which is not the correct place to have these definitions. The interface header file should be used to keep SBI specification related macros. Keep all the test payload related code in test itself. Signed-off-by: Atish Patra <atish.patra@wdc.com> Reviewed-by: Anup Patel <anup.patel@wdc.com>
2019-09-30lib: Emulate HTIMEDELTA CSR for platforms not having TIME CSRAnup Patel3-3/+14
For platforms not having TIME CSR, we trap-n-emulate TIME CSR read/write in OpenSBI. Same rationale applies to HTIMEDELTA CSR as well so we trap-n-emulate HTIMEDELTA CSR for platforms not having TIME CSR. Signed-off-by: Anup Patel <anup.patel@wdc.com>
2019-09-30include: Extend get_insn() to read instruction from VS/VU modeAnup Patel1-1/+1
Current implementation of get_insn() is not suitable for reading instruction from VS/VU mode because we have to set SSTATUS_MXR bit in VSSTATUS CSR for reading instruction from VS/VU mode. This patch extends get_insn() to read instruction from VS/VU mode. Signed-off-by: Anup Patel <anup.patel@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2019-09-30lib: Redirect WFI trapped from VS/VU mode to HS-modeAnup Patel1-0/+3
The WFI will trap as illegal instruction trap when executed in VS/VU mode so we just forward/redirect it to HS-mode so that hypervisor can deal with it appropriately. Signed-off-by: Anup Patel <anup.patel@wdc.com>
2019-09-30lib: Extend sbi_trap_redirect() for hypervisor extensionAnup Patel2-3/+35
When hypervisor extension is available, we can get traps from VS/VU modes. We should be able to force redirect some of these traps to HS-mode. In other words, we should be able forward traps from VS/VU mode to HS-mode using sbi_trap_redirect() hence this patch. Signed-off-by: Atish Patra <atish.patra@wdc.com> Signed-off-by: Anup Patel <anup.patel@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2019-09-30lib: Extend sbi_hart_switch_mode() to support hypervisor extensionAnup Patel2-1/+16
This patch extends sbi_hart_switch_mode() to support entering VS/VU modes when hypervisor extension is available. Signed-off-by: Anup Patel <anup.patel@wdc.com>
2019-09-28lib: Fix tlb flush range limit valueAtish Patra1-1/+1
Use platform defined flush range limit value only if it is non-zero. Otherwise, use the default value. Signed-off-by: Atish Patra <atish.patra@wdc.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-09-10lib: provide a platform specific tlb range flush thresholdAtish Patra2-3/+24
Currently, the tlb range flush threshold is fixed and set to 4k for all platforms. However, it should be platform specific as it completely depends upon how platform actually implements sfence instruction. Define a platform feature that allows every individual platform to set different values. If a platform doesn't define it, just use a page size as the threshold. Signed-off-by: Atish Patra <atish.patra@wdc.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Anup Patel <anup.patel@wdc.com>
2019-09-10lib: Change tlb range flush threshold to 4k page instead of 1GAtish Patra1-1/+1
In RISC-V, tlb flush happens at a page granularity. That's why OpenSBI also have a tlb range flush limit which decides the which tlb flush requests should be upgraded to full flush to avoid long delays. Currently, this is set to 1G which would result in a many sfence.vma execution in a tight loop for a large range. Change the threshold to 4k to speed things up. Signed-off-by: Atish Patra <atish.patra@wdc.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Anup Patel <anup.patel@wdc.com>
2019-08-16platform: Remove the ipi_sync method from all platforms.Atish Patra1-15/+0
OpenSBI manages outstanding TLB flush requests by queueing them in a fifo synchronously. An ipi sync which uses an atomic operation on MMIO address is no longer required. Remove the ipi sync method from platform header and all usage. Signed-off-by: Atish Patra <atish.patra@wdc.com> Reviewed-by: Anup Patel <anup.patel@wdc.com>
2019-08-16lib: Fix race conditions in tlb fifo access.Atish Patra2-5/+8
Linux kernel expects tlb flush SBI call to be completely synchronous i.e. the SBI call should only return once corresponding *fence* instruction is executed. OpenSBI manages the outstanding TLB flush requests by keeping them in a per hart based fifo. However, there are few corner cases that may lead to race conditions while updating the fifo. Currently, the caller hart waits for IPI acknowledgement via clint address which is not a very good method as synchronization on MMIO may not be supported in every platform. Moreover, the waiter doesn't have any way of identifying if the IPI is received for specific tlb flush request or any other IPI. This may lead to unpredictable behavior in supervisor/user space. Fix this by waiting on individual fifo entries rather than MMIO address. Currently, a relaxed loop is being used because wfi again involves MMIO write which would be slower compared to relaxed loop. To avoid deadlock, fifo is processed every time a hart loops for fifo enqueue or fifo sync to consume the tlb flush requests sent by other harts. Signed-off-by: Anup Patel <anup.patel@wdc.com> Signed-off-by: Atish Patra <atish.patra@wdc.com>
2019-08-16lib: Provide an atomic exchange function unsigned longAtish Patra1-0/+3
Signed-off-by: Anup Patel <anup.patel@wdc.com> Signed-off-by: Atish Patra <atish.patra@wdc.com>
2019-08-13lib: Handle traps when doing unpriv load/store in get_insn()Anup Patel1-1/+2
We can get a page/access trap when doing unpriv load/store in get_insn() function because on a SMP system Linux swapper running on HART A can unmap pages from page table used by HART B. To tackle this we extend get_insn() implementation so that if we get trap in get_insn() then we redirect it to S-mode as fetch page/access fault. Signed-off-by: Anup Patel <anup.patel@wdc.com>
2019-08-09lib: Introduce sbi_dprintf() APIAnup Patel2-0/+6
This patch introduces new sbi_dprintf() API for runtime debug prints. The sbi_dprintf() will print to console for a given HART only when SBI_SCRATCH_DEBUG_PRINTS option in enabled in sbi_scratch for this HART. We can now add debug prints using sbi_dprintf() at important places in OpenSBI sources. These debug prints will only show up when previous booting stage or compile time parameter sets the SBI_SCRATCH_DEBUG_PRINTS option in scratch space. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-07-26lib: Allow compiling without FP supportAnup Patel1-4/+2
Currently, we mandate 'F' and 'D' extension in riscv_fp.h so that misaligned load/store emulation has access to FP registers. The above is too restrictive and we should certainly allow compilation for soft-FP toolchains and explicit PLATFORM_RISCV_ISA not having 'F' and 'D' extensions. This patch extends riscv_fp.h and misaligned load/store emulation to allow compiling OpenSBI without FP support. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-07-25treewide: Use conventional names for 32-bit and 64-bitBin Meng1-1/+1
There are several places in the source tree that have: 32bit, 32 bit, 64bit, 64 bit Fix by using the conventional names with a hyphen. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Acked-by: Anup Patel <anup.patel@wdc.com>
2019-07-02include: Bump-up version to 0.4v0.4Anup Patel1-1/+1
This patch updates OpenSBI version to 0.4 as part of release preparation. Signed-off-by: Anup Patel <anup.patel@wdc.com>
2019-06-29include: Add firmware context to sbi_platformAbner Chang1-0/+4
Add firmware context field struct sbi_platform to carry firmware specific information. Signed-off-by: Abner Chang <abner.chang@hpe.com> Acked-by: Anup Patel <anup.patel@wdc.com>
2019-06-29include: Add version info to struct sbi_platformAbner Chang2-9/+39
Add version control of sbi_platform structure - Add opensbi_version, this gives information of opensbi revision on which the sbi_platform table was created. - Add platform_version field in sbi_platform structure for platform level version control. Signed-off-by: Abner Chang <abner.chang@hpe.com> Acked-by: Anup Patel <anup.patel@wdc.com>
2019-06-29include: Move callbacks in sbi_platform to separate structAbner Chang1-55/+68
Move platform opensbi functions to sbi_platform_operations structure. Both sbi_platform and sbi_platform_operations structures are maintained by platform vendors. Signed-off-by: Abner Chang <abner.chang@hpe.com> Acked-by: Anup Patel <anup.patel@wdc.com>
2019-06-29Changed plic_set_thresh() and plic_set_ie() to publicPanagiotis Peristerakis1-0/+4
Signed-off-by: Panagiotis Peristerakis <perister@ics.forth.gr>
2019-06-19utils: Remove tinyfdt.cAtish Patra1-67/+0
tinyfdt.c was originally added to provide a minimal implementation of fdt parsing. However, we have already included libfdt in OpenSBI for more complicated operations. Remove tinfdt and replace its functiolity using libfdt. Signed-off-by: Atish Patra <atish.patra@wdc.com> Acked-by: Anup Patel <anup.patel@wdc.com>
2019-06-19lib: Rename string.x to sbi_string.xAtish Patra2-39/+39
All string functions are part of libsbi. It makes more sense to rename them to sbi_string.x as the libsbi can be linked with external libraries that can have similar implementation. Signed-off-by: Atish Patra <atish.patra@wdc.com> Acked-by: Anup Patel <anup.patel@wdc.com>
2019-06-19platform: Move platform common to lib/utils.Atish Patra5-0/+166
Currently, platform/common contains platform/non-platform specific common minimal drivers and libraries. This is helpful is all platforms are built within opensbi framework. Move them to lib/utils so that any external platform code also can reuse the minimalistic drivers or other common libraries. This patch doesn't introduce any functional changes. Signed-off-by: Atish Patra <atish.patra@wdc.com> Acked-by: Anup Patel <anup.patel@wdc.com>
2019-06-19lib: Include helper libc functions directly in libsbi.Atish Patra1-0/+39
libsbi needs some of the custom libc functions. It should be directly included in libsbi instead of platform specific libraries. Signed-off-by: Atish Patra <atish.patra@wdc.com> Acked-by: Anup Patel <anup.patel@wdc.com>
2019-05-24lib: Handle page/access fault caused by unpriv load/storeAnup Patel3-6/+20
The unpriv load/store instruction from M-mode can cause page/access fault to M-mode if S-mode page table did not have mappings OR it did not have PMP access permission. To tackle this, we redirect trap back to S-mode if unpriv load/store instruction traps in M-mode. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
2019-05-24lib: Add per-HART trap info pointerAnup Patel1-1/+5
This patch adds per-HART trap info pointer which can be used to communicate trap information to sbi_trap_handler(). Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
2019-05-24include: Make unprivilege load/store functions as non-inline functionsAnup Patel1-102/+20
Currently, the unprivilege load/store functions are inline functions. We will be extending these functions to track whether a page/access fault occurs when we execute unprivilege load/store instruction. To make things simpler and debugable, we reduce number of places which can potentially generate a page/access fault by making all unprivilege load/store functions as regular (non-inline) functions. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
2019-05-24lib: Factor-out TLB management from IPI managementAnup Patel3-19/+48
This patch factor-out TLB management from IPI management to separate sources sbi_tlb.c and sbi_tlb.h. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
2019-05-24lib: Add a simple brain-dead allocator to manage extra scratch spaceAnup Patel2-17/+17
We have extra space above scratch space (sbi_scratch) which we are currently using to manage per-HART IPI data and TLB request management. In future, more parts of OpenSBI will use the extra scratch space so it will become difficult to manage extra scratch space using just defines and macros. This patch adds a simple brain-dead allocator to manage extra scratch space. This allocator never expects anything to be free-ed hence it keeps incrementing to next allocation offset until it runs-out of space. In future, we can have more sophisticated allocator which will allow us to re-claim free-ed space and also allows us to track owner of allocated space. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
2019-05-21lib: Flush everything when remote TLB flush range is too largeAnup Patel1-1/+3
On latest Linux kernel (i.e. 5.2-rc1), we get large TLB flush request for user space addresses (typically, start=x and end=-1). This is caused by Linux kernel commit a21344dfc6 ("riscv: fix sbi_remote_sfence_vma{,_asid}"). It's not practical to execute large number of sfence instructions for a large TLB flush range because it takes too much time and eventually causes CPU stall in Linux kernel. This patch addresses above issue by upgrading TLB flush range to TLB flush all whenever TLB flush range is greater than 1GB. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
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