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2023-09-24include: sbi_domain: Fix permission test macrosMayuresh Chitale1-19/+15
The macros to test permissions must perform an exact match of all the bits in the input with the desired permission bits. Otherwise, the check returns false positives in those cases where only some of the desired permissions are set in the input. Fixes: 6c202c5 ("include: sbi: Add Smepmp specific access flags for PMP entries") Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2023-09-24include: sbi: Remove sbi_hartmask_for_each_hart() macroAnup Patel2-14/+2
The sbi_hartmask_for_each_hart() macro is slow and has only one user so let us completely remove the sbi_hartmask_for_each_hart() macro. Signed-off-by: Anup Patel <apatel@ventanamicro.com>
2023-09-24lib: sbi: Maximize the use of HART index in sbi_domainAnup Patel2-29/+33
Let us maximize the use of HART index in sbi_domain because hartindex based hartmask access and sbi_scratch lookup is faster. Signed-off-by: Anup Patel <apatel@ventanamicro.com>
2023-09-24lib: sbi: Remove sbi_scratch_last_hartid() macroAnup Patel4-27/+19
The sbi_scratch_last_hartid() macro is not of much use on platforms with really sparse hartids so let us replace use of this macro with other approaches. Signed-off-by: Anup Patel <apatel@ventanamicro.com>
2023-09-24lib: sbi: Prefer hartindex over hartid in IPI frameworkAnup Patel9-38/+44
Let us prefer hartindex over hartid in IPI framework which in-turn forces IPI users to also prefer hartindex. Signed-off-by: Anup Patel <apatel@ventanamicro.com>
2023-09-24lib: sbi: Use sbi_scratch_last_hartindex() in remote TLB managmentAnup Patel1-3/+3
The sbi_hartid_to_scratch() involves translating hartid to hartindex which is expensive so let's use sbi_hartindex_to_scratch() instead. Signed-off-by: Anup Patel <apatel@ventanamicro.com>
2023-09-24lib: sbi: Extend sbi_hartmask to support both hartid and hartindexXiang W7-60/+105
Currently, the sbi_hartmask is indexed by hartid which puts a limit on hartid to be less than SBI_HARTMASK_MAX_BITS. We extend the sbi_hartmask implementation to use hartindex and support updating sbi_hartmask using hartid. This removes the limit on hartid and existing code works largely unmodified. Signed-off-by: Xiang W <wxjstz@126.com> Signed-off-by: Anup Patel <apatel@ventanamicro.com>
2023-09-24lib: sbi: Remove sbi_platform_hart_index/invalid() functionsAnup Patel4-51/+11
The hartid to hartindex mapping is now tracked in sbi_scratch so we don't need sbi_platform_hart_index() and sbi_platform_hart_invalid() functions hence let us remove them. Signed-off-by: Anup Patel <apatel@ventanamicro.com>
2023-09-24lib: sbi: Introduce HART index in sbi_scratchAnup Patel2-15/+67
We introduce HART index and related helper functions in sbi_scratch where HART index is contiguous and each HART index maps to a physical HART id such that 0 <= HART index and HART index < SBI_HARTMASK_MAX_BITS. The HART index to HART id mapping follows the index2id mapping provided by the platform. If the platform does not provide index2id mapping then identity mapping is assumed. Signed-off-by: Anup Patel <apatel@ventanamicro.com>
2023-09-22lib: sbi: Implement SET_FS_DIRTY() to make sure the mstatus FS dirty is setGreentime Hu1-3/+3
We found the mstatus.FS status is not set correctly after the SET_F64_REG() and SET_F32_REG(). We should set mstatus.FS dirty after we emulate the FPU instructions. Co-developed-by: Roy Lin <roy.lin@sifive.com> Signed-off-by: Roy Lin <roy.lin@sifive.com> Signed-off-by: Greentime Hu <greentime.hu@sifive.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2023-09-10lib: sbi: alloc tlb fifo by sbi_mallocXiang W1-3/+10
If the system is defined from tlb_fifo_num_entries, the scratch may be too small to hold the fifo, so it is alloc through the heap. Signed-off-by: Xiang W <wxjstz@126.com> Signed-off-by: Xing Xiaoguang <xiaoguang.xing@sophgo.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2023-09-10platform: Allow platforms to specify the size of tlb fifoXiang W5-4/+29
For some platforms with a particularly high number of harts, if the tlb fifo is too small, it case harts to wait. Platforms should be allowed to specify the size of the tlb fifo. Signed-off-by: Xiang W <wxjstz@126.com> Signed-off-by: Xing Xiaoguang <xiaoguang.xing@sophgo.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2023-09-10lib: sbi_pmu: keep overflow interrupt of stopped hpm counter disabledInochi Amaoto1-0/+3
After the hardware hpm counter is stopped, it should not raise any new interrupt as it is already stopped. So add the hw_counter_disable_irq callback to allow the custom pmu device to control this behavior. Signed-off-by: Inochi Amaoto <inochiama@outlook.com> Reviewed-by: Guo Ren <guoren@kernel.org> Reviewed-by: Anup Patel <anup@brainfault.org> Tested-by: Samuel Holland <samuel@sholland.org>
2023-09-10platform: generic: allwinner: fix OF process for T-HEAD c9xx pmuInochi Amaoto1-10/+15
T-HEAD c9xx pmu needs to clear OV bits of MCOUNTEROF in any condition to avoid unnecessary OF interrupts. In addition, the S-mode SCOUNTEROF only have OF bit set when the related bits of MCOUNTERWEN is set, so also configure MCOUNTERWEN to allow kernel to access valid SCOUNTEROF. Signed-off-by: Haijiao Liu <haijiao.liu@sophgo.com> Co-authored-by: Inochi Amaoto <inochiama@outlook.com> Signed-off-by: Inochi Amaoto <inochiama@outlook.com> Reviewed-by: Anup Patel <anup@brainfault.org> Tested-by: Samuel Holland <samuel@sholland.org>
2023-09-10lib: sbi_pmu: ensure update hpm counter before starting countingInochi Amaoto1-6/+8
When detecting features of PMU, the hpm counter may be written to some value, this will cause some unexpected behavior in some cases. So ensure the hpm counter is updated before starting the counter and the related interrupt. Signed-off-by: Haijiao Liu <haijiao.liu@sophgo.com> Co-authored-by: Inochi Amaoto <inochiama@outlook.com> Signed-off-by: Inochi Amaoto <inochiama@outlook.com> Reviewed-by: Anup Patel <anup@brainfault.org> Tested-by: Samuel Holland <samuel@sholland.org>
2023-09-06lib: sbi: improve the definition of SBI_IPI_EVENT_MAXXiang W2-1/+6
The previous definition had the assumption that the machine word length is equal to the word length of LONG. Remove this assumption and add a static check to prevent errors in subsequent modifications. Signed-off-by: Xiang W <wxjstz@126.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2023-09-06firmware: payload: test: Change to SBI v2.0 DBCN ecallsInochi Amaoto1-21/+32
As the the "Console Putchar" extension is already legacy and may be removed in the furture. So replace it with the SBI v2.0 "DBCN" extension. Signed-off-by: Inochi Amaoto <inochiama@outlook.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2023-08-22lib: sbi_pmu: remove mhpm_count field in hart featureInochi Amaoto5-34/+37
After supporting noncontigous hpm event and counters in opensbi, the number of hpm counters can be calculated by the mhpm_mask. So this field is unnecessary and can be removed to save some space. Signed-off-by: Inochi Amaoto <inochiama@outlook.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2023-08-22platform: generic: allwinner: correct mhpmevent countInochi Amaoto1-1/+2
Only the CSR mhpmevent 3-9,13-17 of D1 have valid function, so change the mhpm_mask to a valid value to avoid invalid usage. Due to the openc906 pmu code https://github.com/T-head-Semi/openc906/blob/main/C906_RTL_FACTORY/gen_rtl/pmu/rtl/aq_hpcp_top.v Signed-off-by: Inochi Amaoto <inochiama@outlook.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2023-08-22Makefile: Fix grep warningAndrew Jones1-1/+1
grep (at least my version, grep-3.8-3.fc38.x86_64) warns with "grep: warning: stray \ before -". Fix the warning by making the command line input to grep less ambiguous. Signed-off-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2023-08-18lib: sbi: Add support for smcntrpmfKaiwen Xue5-2/+69
This adds the support for ISA extension smcntrpmf. When some inhibit flags are set by a lower privilege mode for new CSRs added by smcntrpmf, OpenSBI sets the appropriate values correspondingly. Signed-off-by: Kaiwen Xue <kaiwenx@andrew.cmu.edu> Signed-off-by: Kaiwen Xue <kaiwenx@rivosinc.com> Reviewed-by: Anup Patel <anup@brainfault.org> Reviewed-by: Atish Patra <atishp@rivosinc.com>
2023-08-06fw_base.S: Fix assembler error with clang 16+Mitchell Horne1-4/+2
Attempting to build OpenSBI with clang 16 and the following command: $ make LLVM=1 PLATFORM=generic Results in the following error: AS platform/generic/firmware/fw_dynamic.o /tmp/fw_dynamic-d000a6.s:429:9: error: symbol '_fw_start' can not be undefined in a subtraction expression .dword _fw_rw_start - _fw_start Work around this issue by eliminating the __fw_rw_offset variable and performing the offset calculation at run-time instead. This takes advantage of the fact that the a4 register contains the value of _fw_start. Signed-off-by: Mitchell Horne <mhorne@FreeBSD.org> Reviewed-by: Anup Patel <anup@brainfault.org>
2023-08-06lib: sbi: Fix typo for finding fixed event counterKaiwen Xue1-2/+2
Cycle and instructions are hardware events instead of firmware ones. Fix the typo in the name of this function. Signed-off-by: Kaiwen Xue <kaiwenx@andrew.cmu.edu> Signed-off-by: Kaiwen Xue <kaiwenx@rivosinc.com> Reviewed-by: Anup patel <anup@brainfault.org>
2023-08-06lib: utils/fdt: Fix fdt_parse_isa_extensions() implementationAnup Patel1-43/+79
Currently, the fdt_parse_isa_extensions() tries to parse the ISA string once for each HART. This ISA string parsing can fail for secondary HARTs if the FDT memory is already overwritten by the supervisor OS. To tackle this issue, we improve the fdt_parse_isa_extensions() implementation to pre-parse ISA string for all HARTs during cold boot. Fixes: d72f5f17478d ("lib: utils: Add detection of Smepmp from ISA string in FDT") Signed-off-by: Anup Patel <apatel@ventanamicro.com> Tested-By: Mayuresh Chitale<mchitale@ventanamicro.com>
2023-08-06lib: sbi_pmu: Enable noncontigous hpm event and countersMayuresh Chitale4-19/+54
Platforms may implement hpm events/counters non contiguously but the current implementation assumes them to be always contigous. Add a bitmap that captures the hpm events/counters as implemented in the hardware and use it to set the max limit of hardware counters visible to the OS. Counters not implemented in the hardware can't be used by the OS because those wont be described in the DT. Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2023-08-06gitignore: allow gitignore to ignore most dot fileInochi Amaoto1-1/+7
Nowadays, most of the editor use files or directories begin with dot to store some settings. So let git ignore these files and directories to reduce potential mistakes. Add dot match to ignore any editor file and there are two exceptions: - .gitignore - .clang-format Signed-off-by: Inochi Amaoto <inochiama@outlook.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2023-07-31lib: utils/reset: Remove SiFive Test reset driverAnup Patel8-132/+0
The functionality of SiFive Test reset driver is easily available through Syscon reset driver so let us remove the SiFive Test driver. Signed-off-by: Anup Patel <apatel@ventanamicro.com>
2023-07-31lib: utils/reset: Add syscon based reboot and poweroffAnup Patel4-0/+177
Let us have common FDT based reset driver for syscon reboot and poweroff. The device tree bindings for syscon reboot and poweroff are already available in the Linux kernel sources. Signed-off-by: Anup Patel <apatel@ventanamicro.com> Reviewed-by: Xiang W <wxjstz@126.com>
2023-07-31lib: utils/regmap: Add simple FDT based syscon regmap driverAnup Patel4-0/+273
Let us add a simple FDT based system regmap driver which follows the device tree bindings already defined in the Linux kernel. Signed-off-by: Anup Patel <apatel@ventanamicro.com> Reviewed-by: Xiang W <wxjstz@126.com>
2023-07-31lib: utils/regmap: Add simple FDT based regmap frameworkAnup Patel6-1/+138
We add a simple FDT based regmap framework which is built on top of generic regmap library. The phandle of FDT regmap DT node is treated as unique regmap ID. The FDT based regmap drivers will be probed on-demand from fdt_regmap_get_by_phandle() and fdt_regmap_get() called by the regmap client drivers. Signed-off-by: Anup Patel <apatel@ventanamicro.com> Reviewed-by: Xiang W <wxjstz@126.com>
2023-07-31lib: utils/regmap: Add generic regmap access libraryAnup Patel6-1/+204
We add generic regmap access library which is independent of hardware description format (FDT or ACPI). The OpenSBI platform support or regmap drivers can register regmap instances which can be discovered by different regmap clients based on the unique ID of regmap instances. Signed-off-by: Anup Patel <apatel@ventanamicro.com> Reviewed-by: Xiang W <wxjstz@126.com>
2023-07-31include: sbi_utils: Remove driver pointer from struct i2c_adapterAnup Patel3-9/+0
The "driver" pointer in struct i2c_adapter is not used anywhere so let us remove it. Signed-off-by: Anup Patel <apatel@ventanamicro.com> Reviewed-by: Xiang W <wxjstz@126.com>
2023-07-31include: sbi: fix CSR define of mseccfgXiang W1-3/+2
Because the CSR names in the spec are mseccfg and mseccfgh. Remove CSR_MSECCFG_LOWER and CSR_MSECCFG_UPPER and directly define CSR_MSECCFG and CSR_MSECCFGH. Signed-off-by: Xiang W <wxjstz@126.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2023-07-31lib: sbi: Update system suspend to specAndrew Jones1-1/+1
commit 68e66106120f ("SUSP: Add SBI_ERR_DENIED") of the SBI spec adds a new error code, SBI_ERR_DENIED, which is returned when entry criteria has not be meant. Update the system suspend implementation to return this error when it has detected that not all harts are in the STOPPED state. Signed-off-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2023-07-31libfdt: fix SPDX license identifiersHeinrich Schuchardt16-16/+16
License identifiers should be machine readable. According to the SPDX v2.3.0 specification annex E parentheses are not used in the SPDX identifier field when specifying multiple licenses [1]. [1] https://spdx.github.io/spdx-spec/v2.3/using-SPDX-short-identifiers-in-source-files/ Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2023-07-13lib: sbi: Map/Unmap debug console shared memory buffersHimanshu Chauhan1-0/+3
With Smepmp enabled, it is necessary for shared memory from S/U mode to be mapped/unmapped before and after read/write of the memory region. This patch maps the debug console shared memory before accessing it. Signed-off-by: Himanshu Chauhan <hchauhan@ventanamicro.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2023-07-13lib: sbi: Add functions to map/unmap shared memoryHimanshu Chauhan2-0/+44
When Smepmp is enabled, M-mode will need to map/unmap the shared memory before it can read/write to it. This patch adds functions to create dynamic short-lived mappings. Signed-off-by: Himanshu Chauhan <hchauhan@ventanamicro.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2023-07-13lib: sbi: Add support for SmepmpHimanshu Chauhan2-19/+130
- If Smepmp is enabled, the access flags of an entry are determined based on truth table defined in Smepmp. - First PMP entry (index 0) is reserved. - Existing boot PMP entries start from index 1. - Since enabling Smepmp revokes the access privileges of the M-mode software on S/U-mode region, first PMP entry is used to map/unmap the shared memory between M and S/U-mode. This allows a temporary access window for the M-mode software to read/write to S/U-mode memory region. Signed-off-by: Himanshu Chauhan <hchauhan@ventanamicro.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2023-07-13lib: sbi: Change the order of PMP initializationHimanshu Chauhan1-9/+17
Configure PMP at last when all other initializations have been done. Because if SMEPMP is detected, M-mode access to the S/U space will be rescinded. Signed-off-by: Himanshu Chauhan <hchauhan@ventanamicro.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2023-07-13lib: sbi: Grant SU R/W/X permissions to whole memoryHimanshu Chauhan1-4/+10
Since pmp entries have implicit priority on index, previous entries will deny access to SU on M-mode region. Also, M-mode will not have access to SU region while previous entries will allow access to M-mode regions. Signed-off-by: Himanshu Chauhan <hchauhan@ventanamicro.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2023-07-13lib: utils: Add detection of Smepmp from ISA string in FDTHimanshu Chauhan3-0/+123
- Add function to parse ISA string in FDT. - Set Smepmp feature bit in extensions if "smepmp" string is found in ISA string. Signed-off-by: Himanshu Chauhan <hchauhan@ventanamicro.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2023-07-13lib: sbi: Add smepmp in hart extensionsHimanshu Chauhan2-0/+5
- Add Smepmp as extension in sbi_hart_extensions enum - Return "smepmp" string for Smepmp extension from sbi_hart_extension_id2string Signed-off-by: Himanshu Chauhan <hchauhan@ventanamicro.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2023-07-13include: sbi: Add Smepmp specific access flags for PMP entriesHimanshu Chauhan1-6/+78
Smepmp specification defines a truth table based on which the access is allowed to different modes. This patch adds different flags based on this truth table. Signed-off-by: Himanshu Chauhan <hchauhan@ventanamicro.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2023-07-13lib: sbi: Add functions to manipulate PMP entriesHimanshu Chauhan2-0/+48
- Add a function to disable a given PMP entry. - Add a function to check if a given entry is disabled. Signed-off-by: Himanshu Chauhan <hchauhan@ventanamicro.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2023-07-13include: sbi: Add macro definitions for mseccfg CSRHimanshu Chauhan1-0/+12
- Add macros for Machine Security Configuration (mseccfg) CSR - Add macros to access/manipulate bits in msecfg CSR Signed-off-by: Himanshu Chauhan <hchauhan@ventanamicro.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2023-07-12lib: utils/gpio: Fix RV32 compile error for designware GPIO driverAnup Patel1-2/+2
Currently, we see following compile error in the designeware GPIO driver for RV32 systems: lib/utils/gpio/fdt_gpio_designware.c:115:20: error: cast to pointer from integer of different size [-Werror=int-to-pointer-cast] 115 | chip->dr = (void *)addr + (bank * 0xc); | ^ lib/utils/gpio/fdt_gpio_designware.c:116:21: error: cast to pointer from integer of different size [-Werror=int-to-pointer-cast] 116 | chip->ext = (void *)addr + (bank * 4) + 0x50; We fix the above error using an explicit type-cast to 'unsigned long'. Fixes: 7828eebaaa77 ("gpio/desginware: add Synopsys DesignWare APB GPIO support") Signed-off-by: Anup Patel <apatel@ventanamicro.com> Reviewed-by: Xiang W <wxjstz@126.com>
2023-07-12lib: sbi: Fix missing '\0' when buffer szie equal 1Xiang W1-0/+6
Fix special case: sbi_snprintf(out, out_len, ...) when out_len equal 1, The previous code will not fill the buffer with any char. Signed-off-by: Xiang W <wxjstz@126.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2023-07-12lib: sbi: Fix timing of clearing tbufXiang W1-16/+19
A single scan of the format char may add multiple characters to the tbuf, causing a buffer overflow. You should check if tbuf is full in printc so that it does not cause a buffer overflow. Signed-off-by: Xiang W <wxjstz@126.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2023-07-12lib: sbi: Fix printcXiang W1-3/+2
Because *out needs to reserve a byte to hold '\0', no more characters should be added to the buffer when *out has one byte left, and the buffer size *out_len should not be modified. this patch prevents the correction of *out_len when *out_len is 1. Signed-off-by: Xiang W <wxjstz@126.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2023-07-12lib: sbi: Simplify printsXiang W1-17/+4
When doing width = width - strlen(string) in prints there is no need to consider the case that witdh may be less than 0. This is because the code to do filling needs to be executed under the condition that width > 0. Signed-off-by: Xiang W <wxjstz@126.com> Reviewed-by: Anup Patel <anup@brainfault.org>
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