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<title>starfive-tech/opensbi.git/platform/andes/ae350/cache.c, branch debug</title>
<subtitle>StarFive Tech OpenSBI for VisionFive (JH7110) boards (mirror)</subtitle>
<id>https://git.radix-linux.su/starfive-tech/opensbi.git/atom?h=debug</id>
<link rel='self' href='https://git.radix-linux.su/starfive-tech/opensbi.git/atom?h=debug'/>
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<updated>2020-06-10T03:58:52+00:00</updated>
<entry>
<title>platform: Add AE350 cache control SBIs</title>
<updated>2020-06-10T03:58:52+00:00</updated>
<author>
<name>Nylon Chen</name>
<email>nylon7@andestech.com</email>
</author>
<published>2020-06-09T05:56:58+00:00</published>
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<id>urn:sha1:32f87e5a8668445097473d4ad3ab5a0de7b1dd6f</id>
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This patch contains the following AE350 specific SBIs:

- get mcache_ctl status
- get mmisc_ctl status
- set mcache_ctl status
- set mmisc_ctl status
- I-cache operation
- D-cache operation
- enable/disable L1-I-cache prefetch
- enable/disable L1-D-cache prefetch
- enable/disable non-blocking load store
- enable/disable write-around

Signed-off-by: Nylon Chen &lt;nylon7@andestech.com&gt;
Reviewed-by: Anup Patel &lt;Anup.Patel@wdc.com&gt;
Reviewed-by: Atish Patra &lt;Atish.Patra@wdc.com&gt;
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