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<title>starfive-tech/opensbi.git/lib, branch master</title>
<subtitle>StarFive Tech OpenSBI for VisionFive (JH7110) boards (mirror)</subtitle>
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<updated>2025-02-19T16:43:21+00:00</updated>
<entry>
<title>lib: sbi: fwft: Return SBI_ERR_DENIED_LOCKED when setting a locked feature</title>
<updated>2025-02-19T16:43:21+00:00</updated>
<author>
<name>Clément Léger</name>
<email>cleger@rivosinc.com</email>
</author>
<published>2025-01-24T16:51:57+00:00</published>
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<id>urn:sha1:1ad199124479b9944d5dddc2119e6da9f088f7a7</id>
<content type='text'>
Latest modifications to the spec mandates that a set on a lock feature
returns SBI_ERR_DENIED_LOCKED.

Signed-off-by: Clément Léger &lt;cleger@rivosinc.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: utils/irqchip: Match against more specific compatible strings first</title>
<updated>2025-02-19T16:19:08+00:00</updated>
<author>
<name>Alex Studer</name>
<email>alex@studer.dev</email>
</author>
<published>2025-02-14T06:27:38+00:00</published>
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<id>urn:sha1:6019259dfbdf9322858b4e7cfc3d1448376e2aa0</id>
<content type='text'>
The T-HEAD C90x PLIC has some special quirks, such as the S-mode
delegation bit. OpenSBI currently handles this by checking the compatible
string in the device tree.

However, this matching is done in the order of the fdt_match array. So if
a device tree contains both strings, for example:

	compatible = "thead,c900-plic", "riscv,plic0";

Then OpenSBI will match against the generic "riscv,plic0" string, since
that appears first in the fdt_match array. This means it will fail to set
the S-mode delegation bit, and Linux will fail to boot. In some cases, it
is not possible to change the compatible string to just the T-HEAD PLIC,
as older versions of Linux only recognize the RISC-V compatible string.

This patch fixes that by moving the RISC-V string to the end, ensuring
that the more specific options get matched first.

Signed-off-by: Alex Studer &lt;alex@studer.dev&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: utils/fdt: Allocate fdt_pmu_evt_select on the heap</title>
<updated>2025-02-19T12:55:17+00:00</updated>
<author>
<name>Samuel Holland</name>
<email>samuel.holland@sifive.com</email>
</author>
<published>2025-02-13T22:48:39+00:00</published>
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<id>urn:sha1:a2c172f526b52eb428d9077fab8cd8690c7e2f19</id>
<content type='text'>
This reduces .bss size by 8 KiB, and should reduce overall memory usage
since most platforms will have significantly fewer than 512 entries in
this table. At the same time, it removes the fixed table size limit.
Since the table is only used within fdt_pmu.c, instead of updating the
extern declaration, make the table local to this file.

Signed-off-by: Samuel Holland &lt;samuel.holland@sifive.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: utils/fdt: Remove redundant PMU property length checks</title>
<updated>2025-02-19T12:52:52+00:00</updated>
<author>
<name>Samuel Holland</name>
<email>samuel.holland@sifive.com</email>
</author>
<published>2025-02-13T22:48:38+00:00</published>
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<id>urn:sha1:f95d1140f61d4afdd922379bff40edf8556c64e4</id>
<content type='text'>
If a property value is too small, len will be zero after the division
on the next line, so the property will be ignored. This is the same
behavior as when the length check fails. Furthermore, the first two
length checks were already ineffectual, because each item in those
arrays is 12 bytes long, not 8.

Signed-off-by: Samuel Holland &lt;samuel.holland@sifive.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: utils: Constify FDT driver definitions</title>
<updated>2025-02-19T12:17:24+00:00</updated>
<author>
<name>Samuel Holland</name>
<email>samuel.holland@sifive.com</email>
</author>
<published>2025-02-13T22:24:46+00:00</published>
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<id>urn:sha1:38df94422b68cb9e20ad19a507fc91ac10c20b14</id>
<content type='text'>
The carray referencing these definitions assumes they are const.

Fixes: 6a26726e08e4 ("lib/utils: reset: Add RPMI System Reset driver")
Fixes: 13f55f33a1d3 ("lib: utils/suspend: Add RPMI system suspend driver")
Fixes: 33ee9b8240fe ("lib: utils/hsm: Add RPMI HSM driver")
Fixes: 591a98bdd549 ("lib: utils/cppc: Add RPMI CPPC driver")
Signed-off-by: Samuel Holland &lt;samuel.holland@sifive.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: sbi: sse: fix invalid errors returned for sse_hart_mask/unmask()</title>
<updated>2025-02-19T11:48:13+00:00</updated>
<author>
<name>Clément Léger</name>
<email>cleger@rivosinc.com</email>
</author>
<published>2025-02-13T09:25:03+00:00</published>
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<id>urn:sha1:f354400ebf91f2988a20da52a6399ac51988fc95</id>
<content type='text'>
When called twice, sse_hart_mask()/sse_hart_unmask() should return
SBI_EALREADY_STOPPED/SBI_EALREADY_STARTED. This was currently inverted.

Fixes: b919daf49582 ("lib: sbi: Add support to mask/unmask SSE events")
Reported-by: Andrew Jones &lt;ajones@ventanamicro.com&gt;
Signed-off-by: Clément Léger &lt;cleger@rivosinc.com&gt;
Reviewed-by: Samuel Holland &lt;samuel.holland@sifive.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: sbi: Fix non-root domain startup</title>
<updated>2025-02-19T11:41:39+00:00</updated>
<author>
<name>Anup Patel</name>
<email>apatel@ventanamicro.com</email>
</author>
<published>2025-02-11T15:36:23+00:00</published>
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<id>urn:sha1:1f64fef919fc5739df6c3395a9abd256dc88cb24</id>
<content type='text'>
Currently, the sbi_sse_init() in cold boot path is called after
sbi_domain_finalize() so boot HART of non-root domains will start
before SSE cold boot init which can cause warm boot of such HARTs
to crash in sbi_sse_init().

To address the above issue, factor-out the non-root domain startup
from sbi_domain_finalize() function as a separate sbi_domain_startup()
function  which can be called after sbi_sse_init() in cold boot path.

Fixes: 93f7d819fdeb ("lib: sbi: sse: allow adding new events")
Signed-off-by: Anup Patel &lt;apatel@ventanamicro.com&gt;
</content>
</entry>
<entry>
<title>lib: sbi: Update MPXY framework and SBI extension as per latest spec</title>
<updated>2025-02-13T05:40:03+00:00</updated>
<author>
<name>Anup Patel</name>
<email>apatel@ventanamicro.com</email>
</author>
<published>2025-01-21T12:06:29+00:00</published>
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<id>urn:sha1:ec09918426a5ccff5de09cd41c3f36d0ad5443f1</id>
<content type='text'>
The latest SBI 3.0 spec defines a new sbi_mpxy_get_shmem_size()
function and simplifies sbi_mpxy_set_shmem() function so update
the MPXY framework and SBI extension accordingly.

Signed-off-by: Anup Patel &lt;apatel@ventanamicro.com&gt;
</content>
</entry>
<entry>
<title>lib: utils: Add MPXY RPMI mailbox driver for System MSI service group</title>
<updated>2025-02-13T05:40:03+00:00</updated>
<author>
<name>Anup Patel</name>
<email>apatel@ventanamicro.com</email>
</author>
<published>2025-01-12T13:09:52+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/starfive-tech/opensbi.git/commit/?id=61abd975f22f96ac900c3482945bdc2f82f6a9f6'/>
<id>urn:sha1:61abd975f22f96ac900c3482945bdc2f82f6a9f6</id>
<content type='text'>
The supervisor software can directly receive most of the system MSIs
except P2A doorbell and MSIs preferred to be handled in M-mode.

Add MPXY RPMI mailbox client driver for the System MSI service group.

Signed-off-by: Anup Patel &lt;apatel@ventanamicro.com&gt;
</content>
</entry>
<entry>
<title>include: sbi_utils: Update RPMI service group IDs and BASE service group</title>
<updated>2025-02-13T05:40:03+00:00</updated>
<author>
<name>Anup Patel</name>
<email>apatel@ventanamicro.com</email>
</author>
<published>2025-01-11T15:23:05+00:00</published>
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<id>urn:sha1:b05e2a19568e449969318597ca77c27c25aac518</id>
<content type='text'>
The service group ID assignment and some of the BASE services have
changes in the latest RPMI specification so let's update the RPMI
implementation accordingly.

Signed-off-by: Anup Patel &lt;apatel@ventanamicro.com&gt;
Reviewed-by: Samuel Holland &lt;samuel.holland@sifive.com&gt;
</content>
</entry>
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