starfive-tech/opensbi.git/lib/sbi, branch starfive-dubhe

lib: sbi: Fix sbi_pmu_exit() for systems not having MCOUNTINHIBIT csr

2021-07-11T09:01:21+00:00

The sbi_pmu_exit() crashes on systems not having MCOUNTINHIBIT csr so to fix this we check SBI_HART_HAS_MCOUNTINHIBIT feature in sbi_pmu_exit() and do nothing if it is not available. Fixes: 13d40f21d588 ("lib: sbi: Add PMU support") Signed-off-by: Anup Patel

lib: sbi: Improve TLB function naming

2021-07-11T05:08:26+00:00

Follow the standard conventon for static function names: All global functions should be start with sbi__ All static functions should be start with _ Reviewed-by: Anup Patel Signed-off-by: Atish Patra

lib: sbi: Implement firmware counters

2021-07-11T05:08:23+00:00

RISC-V SBI v0.3 specification defines a set of firmware events that can provide additional information about the current firmware context. All of the firmware event monitoring are enabled now. The firmware events must be defined as raw perf event with MSB set as specified in the specification. Reviewed-by: Anup Patel Signed-off-by: Atish Patra

lib: sbi: Implement SBI PMU extension

2021-07-11T05:08:02+00:00

RISC-V SBI specfication 0.3 defines a PMU extension that allows supervisor mode to start/stop/configure pmu related events. This patch implements all of the functionality defined in the specification. Reviewed-by: Anup Patel Signed-off-by: Atish Patra

lib: sbi: Add PMU support

2021-07-11T04:53:18+00:00

RISC-V SBI v0.3 specification defined a PMU extension to configure/start/stop the hardware/firmware pmu events. Implement PMU support in OpenSBI library. The implementation is agnostic of event to counter mapping & mhpmevent value configuration. That means, it expects platform hooks will be used to set up the mapping and provide the mhpmevent value at runtime. Reviewed-by: Anup Patel Signed-off-by: Atish Patra

lib: sbi: Use csr_read/write_num to read/update PMU counters

2021-07-11T04:50:44+00:00

Currently, csr_read/write_num functions are used to read/write PMP related CSRs where CSR value is decided at runtime. Expand this function to include PMU related CSRs as well. Reviewed-by: Anup Patel Reviewed-by: Xiang W Signed-off-by: Atish Patra

lib: sbi: Remove redundant boot time print statement

2021-07-11T04:49:48+00:00

This patch removes redundant print from sbi_boot_print_hart(). Reviewed-by: Anup Patel Signed-off-by: Atish Patra

lib: sbi: Disable m/scounteren & enable mcountinhibit

2021-07-11T04:44:26+00:00

Currently, all bits in mcountern are enabled unconditionally at boot time. With SBI PMU extension, all the programmable counters should enabled only during performance monitoring for a particular event. However, this is done only if mcountinhibit is implemented because the supervisor mode can not start/stop any event without mcountinhibit. Similarly, supervisor should take care enabling scounteren which allows U-mode to access programmable pmu counters. All the non-programmable ones (CY, TM, IR) should be enabled in M-mode because some userspace may rely on builtins such as __builtin_readcyclecounter. Supervisor OS can still disable them during initial configuration. Reviewed-by: Anup Patel Signed-off-by: Atish Patra

lib: sbi: Detect number of bits implemented in mhpmcounter

2021-07-11T04:43:04+00:00

RISC-V privilege specification allows the implementation to have less than 64 bits. Add a function to detect the number of implemented bits in mhpmcounter dynamically at runtime. Reviewed-by: Xiang W Reviewed-by: Anup Patel Signed-off-by: Atish Patra

lib: sbi: Remove stray '\' character

2021-07-11T04:42:06+00:00

Reviewed-by: Xiang W Reviewed-by: Anup Patel Signed-off-by: Atish Patra