<feed xmlns='http://www.w3.org/2005/Atom'>
<title>starfive-tech/opensbi.git/include/sbi_utils/fdt, branch rtthread_AMP</title>
<subtitle>StarFive Tech OpenSBI for VisionFive (JH7110) boards (mirror)</subtitle>
<id>https://git.radix-linux.su/starfive-tech/opensbi.git/atom?h=rtthread_AMP</id>
<link rel='self' href='https://git.radix-linux.su/starfive-tech/opensbi.git/atom?h=rtthread_AMP'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/starfive-tech/opensbi.git/'/>
<updated>2023-02-27T04:34:03+00:00</updated>
<entry>
<title>include: fdt/fdt_helper: Change fdt_get_address() to return root.next_arg1</title>
<updated>2023-02-27T04:34:03+00:00</updated>
<author>
<name>Bin Meng</name>
<email>bmeng@tinylab.org</email>
</author>
<published>2023-02-23T10:40:09+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/starfive-tech/opensbi.git/commit/?id=99d09b601eb3809a4cc2aa409da34bc4fe32f67f'/>
<id>urn:sha1:99d09b601eb3809a4cc2aa409da34bc4fe32f67f</id>
<content type='text'>
In sbi_domain_finalize(), when locating the coldboot hart's domain,
the coldboot hart's scratch-&gt;arg1 will be overwritten by the domain
configuration. However scratch-&gt;arg1 holds the FDT address of the
coldboot hart, and is still being accessed by fdt_get_address() in
later boot process. scratch-&gt;arg1 could then contain completely
garbage and lead to a crash.

To fix this, we change fdt_get_address() to return root domain's
next_arg1 as the FDT pointer.

Resolves: https://github.com/riscv-software-src/opensbi/issues/281
Fixes: b1678af210dc ("lib: sbi: Add initial domain support")
Reported-by: Marouene Boubakri &lt;marouene.boubakri@nxp.com&gt;
Signed-off-by: Bin Meng &lt;bmeng@tinylab.org&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: utils: Add fdt_add_cpu_idle_states() helper function</title>
<updated>2023-01-24T12:00:21+00:00</updated>
<author>
<name>Samuel Holland</name>
<email>samuel@sholland.org</email>
</author>
<published>2023-01-23T06:32:06+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/starfive-tech/opensbi.git/commit/?id=33bf9174602c900201481241e9ade31cf37fccd8'/>
<id>urn:sha1:33bf9174602c900201481241e9ade31cf37fccd8</id>
<content type='text'>
Since the availability and latency properties of CPU idle states depend
on the specific SBI HSM implementation, it is appropriate that the idle
states are added to the devicetree at runtime by that implementation.

This helper function adds a platform-provided array of idle states to
the devicetree, following the SBI idle state binding.

Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
Signed-off-by: Samuel Holland &lt;samuel@sholland.org&gt;
</content>
</entry>
<entry>
<title>lib: utils: serial: Add FDT driver for Renesas SCIF</title>
<updated>2022-12-12T13:20:35+00:00</updated>
<author>
<name>Lad Prabhakar</name>
<email>prabhakar.mahadev-lad.rj@bp.renesas.com</email>
</author>
<published>2022-12-10T10:30:08+00:00</published>
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<id>urn:sha1:0021b437377b4ea95f567f91fbf506c0b0b9e227</id>
<content type='text'>
Add FDT driver for Renesas SCIF.

    dts example:

    soc: soc {
          ....
            scif0: serial@1004b800 {
                    compatible = "renesas,scif-r9a07g043",
                                 "renesas,scif-r9a07g044";
                    reg = &lt;0 0x1004b800 0 0x400&gt;;
                    interrupts = &lt;412 IRQ_TYPE_LEVEL_HIGH&gt;,
                                 &lt;414 IRQ_TYPE_LEVEL_HIGH&gt;,
                                 &lt;415 IRQ_TYPE_LEVEL_HIGH&gt;,
                                 &lt;413 IRQ_TYPE_LEVEL_HIGH&gt;,
                                 &lt;416 IRQ_TYPE_LEVEL_HIGH&gt;,
                                 &lt;416 IRQ_TYPE_LEVEL_HIGH&gt;;
                    interrupt-names = "eri", "rxi", "txi",
                                      "bri", "dri", "tei";
                    clocks = &lt;&amp;cpg CPG_MOD R9A07G043_SCIF0_CLK_PCK&gt;;
                    clock-names = "fck";
                    power-domains = &lt;&amp;cpg&gt;;
                    resets = &lt;&amp;cpg R9A07G043_SCIF0_RST_SYSTEM_N&gt;;
                    status = "disabled";
            };
          ....
    };

Signed-off-by: Lad Prabhakar &lt;prabhakar.mahadev-lad.rj@bp.renesas.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: utils/ipi: Add Andes fdt ipi driver support</title>
<updated>2022-10-23T05:01:01+00:00</updated>
<author>
<name>Yu Chien Peter Lin</name>
<email>peterlin@andestech.com</email>
</author>
<published>2022-10-14T00:32:50+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/starfive-tech/opensbi.git/commit/?id=ce7c490719ed4e268979c8b6b54a5252396fbb3b'/>
<id>urn:sha1:ce7c490719ed4e268979c8b6b54a5252396fbb3b</id>
<content type='text'>
Move Andes PLICSW ipi device to fdt ipi framework, this patch is based
on Leo's modified IPI scheme on PLICSW.

Current IPI scheme uses bit 0 of pending reigster on PLICSW to send IPI
from hart 0 to hart 7, but bit 0 needs to be hardwired to 0 according
to spec. After some investigation, self-IPI seems to be seldom or never
used, so we re-order the IPI scheme to support 8 core platforms.

dts example (Quad-core AX45MP):

  plicsw: interrupt-controller@e6400000 {
          compatible = "andestech,plicsw";
          reg = &lt;0x00000000 0xe6400000 0x00000000 0x00400000&gt;;
          interrupts-extended = &lt;&amp;CPU0_intc 3
                                 &amp;CPU1_intc 3
                                 &amp;CPU2_intc 3
                                 &amp;CPU3_intc 3&gt;;
          interrupt-controller;
          #address-cells = &lt;2&gt;;
          #interrupt-cells = &lt;2&gt;;
  };

Signed-off-by: Yu Chien Peter Lin &lt;peterlin@andestech.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: utils/timer: Add Andes fdt timer support</title>
<updated>2022-10-23T04:56:39+00:00</updated>
<author>
<name>Yu Chien Peter Lin</name>
<email>peterlin@andestech.com</email>
</author>
<published>2022-10-14T00:32:46+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/starfive-tech/opensbi.git/commit/?id=ef9f02e7fba47412d6c057ba78fd3d89cb4e5fc3'/>
<id>urn:sha1:ef9f02e7fba47412d6c057ba78fd3d89cb4e5fc3</id>
<content type='text'>
Since we can get the PLMT base address and timer frequency from
device tree, move plmt timer device to fdt timer framework.

dts example (Quad-core AX45MP):

  cpus {
      ...
      timebase-frequency = &lt;0x3938700&gt;;
      ...
  }
  soc {
      ...
      plmt0@e6000000 {
          compatible = "andestech,plmt0";
          reg = &lt;0x00 0xe6000000 0x00 0x100000&gt;;
          interrupts-extended = &lt;&amp;cpu0_intc 0x07
                                 &amp;cpu1_intc 0x07
                                 &amp;cpu2_intc 0x07
                                 &amp;cpu3_intc 0x07&gt;;
      };
      ...
  }

Signed-off-by: Yu Chien Peter Lin &lt;peterlin@andestech.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: utils: serial: Add Cadence UART driver</title>
<updated>2022-08-23T03:10:17+00:00</updated>
<author>
<name>Jun Liang Tan</name>
<email>junliang.tan@linux.starfivetech.com</email>
</author>
<published>2022-08-17T15:40:56+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/starfive-tech/opensbi.git/commit/?id=cbaa9b0333517b3c25bea8d1c71ac8005ff1f727'/>
<id>urn:sha1:cbaa9b0333517b3c25bea8d1c71ac8005ff1f727</id>
<content type='text'>
Add Cadence UART driver

Signed-off-by: Jun Liang Tan &lt;junliang.tan@linux.starfivetech.com&gt;
Signed-off-by: Wei Liang Lim &lt;weiliang.lim@linux.starfivetech.com&gt;
Reviewed-by: Andrew Jones &lt;ajones@ventanamicro.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: utils/fdt: Use kconfig for enabling/disabling</title>
<updated>2022-08-08T04:04:08+00:00</updated>
<author>
<name>Anup Patel</name>
<email>apatel@ventanamicro.com</email>
</author>
<published>2022-08-08T04:04:08+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/starfive-tech/opensbi.git/commit/?id=68d7b85ec75119787d7c672062de5d29156c44be'/>
<id>urn:sha1:68d7b85ec75119787d7c672062de5d29156c44be</id>
<content type='text'>
We update FDT support makefile to use kconfig for enabling/disabling.
To avoid compilation errors, we also enable FDT for each platform.

Signed-off-by: Anup Patel &lt;apatel@ventanamicro.com&gt;
Tested-by: Andrew Jones &lt;ajones@ventanamicro.com&gt;
Acked-by: Atish Patra &lt;atishp@rivosinc.com&gt;
Tested-by: Atish Patra &lt;atishp@rivosinc.com&gt;
</content>
</entry>
<entry>
<title>lib: utils/fdt: Require match data to be const</title>
<updated>2022-05-30T05:02:35+00:00</updated>
<author>
<name>Samuel Holland</name>
<email>samuel@sholland.org</email>
</author>
<published>2022-05-29T18:32:11+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/starfive-tech/opensbi.git/commit/?id=fab0379bb60d6e177018b53f07718b69ba34948d'/>
<id>urn:sha1:fab0379bb60d6e177018b53f07718b69ba34948d</id>
<content type='text'>
Match data stores hardware attributes which do not change at runtime, so
it does not need to be mutable. Make it const.

Reviewed-by: Guo Ren &lt;guoren@kernel.org&gt;
Reviewed-by: Xiang W &lt;wxjstz@126.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
Signed-off-by: Samuel Holland &lt;samuel@sholland.org&gt;
</content>
</entry>
<entry>
<title>lib: utils/fdt: rename fdt_parse_max_hart_id</title>
<updated>2022-05-14T04:48:12+00:00</updated>
<author>
<name>Jan Remes</name>
<email>jan.remes@codasip.com</email>
</author>
<published>2022-05-13T10:58:43+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/starfive-tech/opensbi.git/commit/?id=1bc67db80cb0a10d8ebbaaf550a79eee2a07158e'/>
<id>urn:sha1:1bc67db80cb0a10d8ebbaaf550a79eee2a07158e</id>
<content type='text'>
The function returns the highest hart-id of the harts actually used in
the system (enabled). Change the name to reflect this fact.

Signed-off-by: Jan Remes &lt;jan.remes@codasip.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: utils/fdt: introduce fdt_node_is_enabled()</title>
<updated>2022-05-14T04:46:24+00:00</updated>
<author>
<name>Jan Remes</name>
<email>jan.remes@codasip.com</email>
</author>
<published>2022-05-13T10:58:40+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/starfive-tech/opensbi.git/commit/?id=90a9dd2b22bb5441df85a23e4e4690bec14fa1e5'/>
<id>urn:sha1:90a9dd2b22bb5441df85a23e4e4690bec14fa1e5</id>
<content type='text'>
If an FDT node contains a "status" property and this property is not
"ok" or "okay", this node should be ignored. Introduce a function that
checks this.

Signed-off-by: Jan Remes &lt;jan.remes@codasip.com&gt;
Reviewed-by: Xiang W &lt;wxjstz@126.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
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