<feed xmlns='http://www.w3.org/2005/Atom'>
<title>starfive-tech/opensbi.git/include/sbi/riscv_asm.h, branch debug</title>
<subtitle>StarFive Tech OpenSBI for VisionFive (JH7110) boards (mirror)</subtitle>
<id>https://git.radix-linux.su/starfive-tech/opensbi.git/atom?h=debug</id>
<link rel='self' href='https://git.radix-linux.su/starfive-tech/opensbi.git/atom?h=debug'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/starfive-tech/opensbi.git/'/>
<updated>2021-03-22T10:32:48+00:00</updated>
<entry>
<title>include: headers: Replace __ASSEMBLY__ with __ASSEMBLER__</title>
<updated>2021-03-22T10:32:48+00:00</updated>
<author>
<name>Marouene Boubakri</name>
<email>marouene.boubakri@nxp.com</email>
</author>
<published>2021-03-12T11:00:01+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/starfive-tech/opensbi.git/commit/?id=bfc85c70e7517dc633b74e33768247b4df6a661c'/>
<id>urn:sha1:bfc85c70e7517dc633b74e33768247b4df6a661c</id>
<content type='text'>
GCC has already a predefined macro __ASSEMBLER__ therefore, it can be
used without the need to define a new flag with -D__ASSEMBLY__.
This is useful when adding the library to projects having a build
system such one can build without the need to make changes.
THe build system does not use the Makefile in the sources tree.

Signed-off-by: Marouene Boubakri &lt;marouene.boubakri@nxp.com&gt;
Signed-off-by: Anup Patel &lt;anup.patel@wdc.com&gt;
</content>
</entry>
<entry>
<title>lib: sbi: Allow specifying mode in sbi_hart_pmp_check_addr() API</title>
<updated>2020-09-16T03:35:25+00:00</updated>
<author>
<name>Anup Patel</name>
<email>anup.patel@wdc.com</email>
</author>
<published>2020-09-07T10:20:33+00:00</published>
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<id>urn:sha1:7ccf6bf54c2d7db6331f3fa319ef4e7019108c28</id>
<content type='text'>
We extend sbi_hart_pmp_check_addr() API so that users can specify
privilege mode of the address for checking PMP access permissions.

To achieve this, we end-up converting "unsigned long *size" parameter
to "unsigned long *log2len" for pmp_get() implementation so that we
can deal with regions of "1UL &lt;&lt; __riscv_xlen" size in a special case
in sbi_hart_pmp_check_addr() implementation.

Signed-off-by: Anup Patel &lt;anup.patel@wdc.com&gt;
Reviewed-by: Atish Patra &lt;atish.patra@wdc.com&gt;
</content>
</entry>
<entry>
<title>lib: sbi: Improve misa_string() implementation</title>
<updated>2020-05-07T03:38:26+00:00</updated>
<author>
<name>Anup Patel</name>
<email>anup.patel@wdc.com</email>
</author>
<published>2020-05-05T06:16:25+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/starfive-tech/opensbi.git/commit/?id=dc38929dfb441cbecb4e31a299b463bac11d02cf'/>
<id>urn:sha1:dc38929dfb441cbecb4e31a299b463bac11d02cf</id>
<content type='text'>
The RISC-V ISA string does not follow alphabetical order. Instead,
we have a RISC-V specific ordering of extensions in the RISC-V ISA
string. This patch improves misa_string() implementation to return
a valid RISC-V ISA string.

Signed-off-by: Anup Patel &lt;anup.patel@wdc.com&gt;
Reviewed-by: Atish Patra &lt;atish.patra@wdc.com&gt;
</content>
</entry>
<entry>
<title>lib: sbi: Update pmp_get() to return decoded size directly</title>
<updated>2020-03-18T03:28:26+00:00</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2020-03-17T14:59:38+00:00</published>
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<id>urn:sha1:5fbcd625bc8f8980164b4c905dc8097269461419</id>
<content type='text'>
Currently pmp_get() returns the log2 length of the PMP memory
region size. The caller has to calculate the size based on that
and the same codes are duplicated.

Update this function to return decoded size directly.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Atish Patra &lt;atish.patra@wdc.com&gt;
</content>
</entry>
<entry>
<title>include: Make sbi_current_hartid() as macro in riscv_asm.h</title>
<updated>2020-03-13T06:52:02+00:00</updated>
<author>
<name>Anup Patel</name>
<email>anup.patel@wdc.com</email>
</author>
<published>2020-03-12T04:51:25+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/starfive-tech/opensbi.git/commit/?id=823345ecaed0deb7770d9bac1c881004a6410e91'/>
<id>urn:sha1:823345ecaed0deb7770d9bac1c881004a6410e91</id>
<content type='text'>
The sbi_current_hartid() being a regular function is quite
expensive because for callers it is a function call instead
of a direct CSR read. This patch converts sbi_current_hartid()
into a macro in riscv_asm.h.

Signed-off-by: Anup Patel &lt;anup.patel@wdc.com&gt;
Reviewed-by: Atish Patra &lt;atish.patra@wdc.com&gt;
</content>
</entry>
<entry>
<title>lib: sbi: Fix coding style issues</title>
<updated>2020-03-10T04:57:28+00:00</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2020-03-09T03:52:41+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/starfive-tech/opensbi.git/commit/?id=650c0e525ce60e80b6756aa8cc4eeae5b20ccbd8'/>
<id>urn:sha1:650c0e525ce60e80b6756aa8cc4eeae5b20ccbd8</id>
<content type='text'>
This fixes various coding style issues found in the SBI codes.
No functional changes.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Anup Patel &lt;anup.patel@wdc.com&gt;
</content>
</entry>
<entry>
<title>include: Move bits related defines and macros to sbi_bitops.h</title>
<updated>2020-03-08T05:36:18+00:00</updated>
<author>
<name>Anup Patel</name>
<email>anup.patel@wdc.com</email>
</author>
<published>2020-03-04T05:38:35+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/starfive-tech/opensbi.git/commit/?id=00d332bbe726d85e4c2b81ab0a08182612f96c03'/>
<id>urn:sha1:00d332bbe726d85e4c2b81ab0a08182612f96c03</id>
<content type='text'>
The right location for all bits related defines and macros is
sbi_bitops.h hence this patch. With this patch, the sbi_bits.h
is redundant so we remove it.

Signed-off-by: Anup Patel &lt;anup.patel@wdc.com&gt;
Reviewed-by: Atish Patra &lt;atish.patra@wdc.com&gt;
</content>
</entry>
<entry>
<title>lib: Add error detection for misa_extension</title>
<updated>2019-11-27T06:40:33+00:00</updated>
<author>
<name>Xiang W</name>
<email>wxjstz@126.com</email>
</author>
<published>2019-11-27T06:16:52+00:00</published>
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<id>urn:sha1:813f7f4c250af9f7c9546f64778e9b35bb7d7dcb</id>
<content type='text'>
Add assertions for misa_extension to prevent incoming illegal
characters.

Signed-off-by: Xiang Wang &lt;merle@hardenedlinux.org&gt;
Reviewed-by: Anup Patel &lt;anup.patel@wdc.com&gt;
</content>
</entry>
<entry>
<title>lib: Fix CPU capabilities detection function</title>
<updated>2019-11-26T10:36:29+00:00</updated>
<author>
<name>Xiang Wang</name>
<email>merle@hardenedlinux.org</email>
</author>
<published>2019-11-26T10:36:29+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/starfive-tech/opensbi.git/commit/?id=c96cc03fcc2723fa007b65e5ae6fe2673ea41413'/>
<id>urn:sha1:c96cc03fcc2723fa007b65e5ae6fe2673ea41413</id>
<content type='text'>
On some platforms, misa may not be implemented. On such a platform,
reading misa will get 0. At this time, platform is required to
implement a non-standard function to detect the CPU's capabilities.
Therefore, this modification add interfaces for non-standard function.

The MXL field of misa is always at the highest two bits, whether it
is a 32-bit 64-bit or a 128-bit machine. Therefore, this modification
fixes the use of a fixed offset to detect the machine length.

Signed-off-by: Xiang Wang &lt;merle@hardenedlinux.org&gt;
Signed-off-by: Anup Patel &lt;anup.patel@wdc.com&gt;
</content>
</entry>
<entry>
<title>lib: Factor-out TLB management from IPI management</title>
<updated>2019-05-24T02:52:47+00:00</updated>
<author>
<name>Anup Patel</name>
<email>anup.patel@wdc.com</email>
</author>
<published>2019-05-24T02:28:05+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/starfive-tech/opensbi.git/commit/?id=95b7480ab4b438cf545afae200b40012e83f1dda'/>
<id>urn:sha1:95b7480ab4b438cf545afae200b40012e83f1dda</id>
<content type='text'>
This patch factor-out TLB management from IPI management to separate
sources sbi_tlb.c and sbi_tlb.h.

Signed-off-by: Anup Patel &lt;anup.patel@wdc.com&gt;
Reviewed-by: Atish Patra &lt;atish.patra@wdc.com&gt;
</content>
</entry>
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