starfive-tech/opensbi.git/firmware, branch rtthread_AMP

firmware: Not to clear all the MIP

2023-02-08T05:09:20+00:00

In generic behavior of QEMU, if the pending bits of PLIC are still set and we clear the SEIP, the QEMU may not set the SEIP back immediately and the interrupt may not be handled anymore until the new interrupts arrived and QEMU set the SEIP back which is a generic behavior in QEMU. Signed-off-by: Nick Hu Signed-off-by: Jim Shu Reviewed-by: Anup Patel

firmware: Fix fw_rw_offset computation in fw_base.S

2023-01-27T03:09:49+00:00

It seems BFD just does totally nonsensical things for SHN_ABS symbols when producing position-independent outputs (both -pie and -shared) for various historical reasons, and so SHN_ABS symbols are still subject to relocation as far as BFD is concerned (except AArch64, which fixes it in limited cases that don’t apply here...). The above affects the _fw_rw_offset provided through fw_base.ldS linker script which results in OpenSBI firmware failing to boot when loaded at an address different from FW_TEXT_START. Fixes: c10e3fe5f9a1 ("firmware: Add RW section offset in scratch") Signed-off-by: Jessica Clarke Reported-by: Lad Prabhakar Tested-by: Lad Prabhakar Tested-by: Anup Patel Signed-off-by: Anup Patel

firmware: Add RW section offset in scratch

2023-01-23T04:36:14+00:00

Add the RW section offset, provided by _fw_rw_offset symbol, to the scratch structure. This will be used to program separate pmp entry for RW section. Signed-off-by: Himanshu Chauhan Reviewed-by: Anup Patel

firmware: Move dynsym and reladyn sections to RX section

2023-01-23T04:36:14+00:00

Currently, the dynsym and reladyn sections are under RW data. They are moved to the Read-only/Executable region. Signed-off-by: Himanshu Chauhan Reviewed-by: Anup Patel

firmware: Split RO/RX and RW sections

2023-01-23T04:36:14+00:00

Split the RO/RX and RW sections so that they can have independent pmp entries with required permissions. The split size is ensured to be a power-of-2 as required by pmp. _fw_rw_offset symbol marks the beginning of the data section. Signed-off-by: Himanshu Chauhan Reviewed-by: Anup Patel

firmware: Minor optimization for relocate

2022-12-05T05:17:38+00:00

The t3 register stores the address of _load_end. If relocation is not required, it is unnecessary to calculate the address of _load_end. This can reduce the operation time of two instructions. Signed-off-by: Dongdong Zhang Reviewed-by: Bin Meng Reviewed-by: Anup Patel

firmware: payloads: Optimize usage of "ALIGN"

2022-11-22T05:50:11+00:00

Delete the redundant "ALIGN" and adjust the position of "ALIGN" Signed-off-by: Leizheng Zhang Reviewed-by: Andrew Jones Reviewed-by: Atish Patra Reviewed-by: Bin Meng

Makefile: Add initial kconfig support for each platform

2022-08-08T04:03:09+00:00

We extend the top-level makefile to allow kconfig based configuration for each platform where each platform has it's own set of configs with "defconfig" being the default config. Signed-off-by: Anup Patel Tested-by: Andrew Jones Acked-by: Atish Patra Tested-by: Atish Patra

firmware: Fix code for accessing hart_count and stack_size

2022-03-27T03:23:27+00:00

lwu exists under the current rv64 and should also exist under the rv128 in the future, so I modified the conditions of conditional compilation so that it can adapt to the future situation Signed-off-by: Xiang W Reviewed-by: Anup Patel

firmware: Move memcpy/memset mapping to fw_base.S

2021-12-23T12:16:09+00:00

Some of the external firmwares using OpenSBI as library are facing issues with the weak memcpy() and memset() aliases in libsbi.a so we move these to fw_base.S. This way mapping of implicit memcpy() or memset() calls to sbi_memcpy() or sbi_memset() will only be done for OpenSBI firmwares. (Refer, https://github.com/riscv-software-src/opensbi/issues/234) In addition, we also add memmove() and memcmp() mappings in fw_base.S because as-per the GCC documentation the freestanding environment must provide memcpy(), memmove(), memset(), and memcmp(). Signed-off-by: Anup Patel Reviewed-by: Atish Patra