1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
|
/* SPDX-License-Identifier: GPL-2.0
* Microchip KSZ series SPI access common header
*
* Copyright (C) 2017-2018 Microchip Technology Inc.
* Tristram Ha <Tristram.Ha@microchip.com>
*/
#ifndef __KSZ_SPI_H
#define __KSZ_SPI_H
/* Chip dependent SPI access */
static int ksz_spi_read(struct ksz_device *dev, u32 reg, u8 *data,
unsigned int len);
static int ksz_spi_write(struct ksz_device *dev, u32 reg, void *data,
unsigned int len);
static int ksz_spi_read8(struct ksz_device *dev, u32 reg, u8 *val)
{
return ksz_spi_read(dev, reg, val, 1);
}
static int ksz_spi_read16(struct ksz_device *dev, u32 reg, u16 *val)
{
int ret = ksz_spi_read(dev, reg, (u8 *)val, 2);
if (!ret)
*val = be16_to_cpu(*val);
return ret;
}
static int ksz_spi_read32(struct ksz_device *dev, u32 reg, u32 *val)
{
int ret = ksz_spi_read(dev, reg, (u8 *)val, 4);
if (!ret)
*val = be32_to_cpu(*val);
return ret;
}
static int ksz_spi_write8(struct ksz_device *dev, u32 reg, u8 value)
{
return ksz_spi_write(dev, reg, &value, 1);
}
static int ksz_spi_write16(struct ksz_device *dev, u32 reg, u16 value)
{
value = cpu_to_be16(value);
return ksz_spi_write(dev, reg, &value, 2);
}
static int ksz_spi_write32(struct ksz_device *dev, u32 reg, u32 value)
{
value = cpu_to_be32(value);
return ksz_spi_write(dev, reg, &value, 4);
}
static int ksz_spi_get(struct ksz_device *dev, u32 reg, void *data, size_t len)
{
return ksz_spi_read(dev, reg, data, len);
}
static int ksz_spi_set(struct ksz_device *dev, u32 reg, void *data, size_t len)
{
return ksz_spi_write(dev, reg, data, len);
}
#endif
|
