1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
|
/*
* Copyright (C) STMicroelectronics SA 2014
* Authors: Benjamin Gaignard <benjamin.gaignard@st.com>
* Vincent Abriou <vincent.abriou@st.com>
* for STMicroelectronics.
* License terms: GNU General Public License (GPL), version 2
*/
#include <linux/clk.h>
#include <linux/component.h>
#include <linux/module.h>
#include <linux/of_platform.h>
#include <linux/platform_device.h>
#include <linux/reset.h>
#include <drm/drmP.h>
#include <drm/drm_crtc_helper.h>
#include "sti_drm_crtc.h"
/* glue registers */
#define TVO_CSC_MAIN_M0 0x000
#define TVO_CSC_MAIN_M1 0x004
#define TVO_CSC_MAIN_M2 0x008
#define TVO_CSC_MAIN_M3 0x00c
#define TVO_CSC_MAIN_M4 0x010
#define TVO_CSC_MAIN_M5 0x014
#define TVO_CSC_MAIN_M6 0x018
#define TVO_CSC_MAIN_M7 0x01c
#define TVO_MAIN_IN_VID_FORMAT 0x030
#define TVO_CSC_AUX_M0 0x100
#define TVO_CSC_AUX_M1 0x104
#define TVO_CSC_AUX_M2 0x108
#define TVO_CSC_AUX_M3 0x10c
#define TVO_CSC_AUX_M4 0x110
#define TVO_CSC_AUX_M5 0x114
#define TVO_CSC_AUX_M6 0x118
#define TVO_CSC_AUX_M7 0x11c
#define TVO_AUX_IN_VID_FORMAT 0x130
#define TVO_VIP_HDF 0x400
#define TVO_HD_SYNC_SEL 0x418
#define TVO_HD_DAC_CFG_OFF 0x420
#define TVO_VIP_HDMI 0x500
#define TVO_HDMI_FORCE_COLOR_0 0x504
#define TVO_HDMI_FORCE_COLOR_1 0x508
#define TVO_HDMI_CLIP_VALUE_B_CB 0x50c
#define TVO_HDMI_CLIP_VALUE_Y_G 0x510
#define TVO_HDMI_CLIP_VALUE_R_CR 0x514
#define TVO_HDMI_SYNC_SEL 0x518
#define TVO_HDMI_DFV_OBS 0x540
#define TVO_IN_FMT_SIGNED BIT(0)
#define TVO_SYNC_EXT BIT(4)
#define TVO_VIP_REORDER_R_SHIFT 24
#define TVO_VIP_REORDER_G_SHIFT 20
#define TVO_VIP_REORDER_B_SHIFT 16
#define TVO_VIP_REORDER_MASK 0x3
#define TVO_VIP_REORDER_Y_G_SEL 0
#define TVO_VIP_REORDER_CB_B_SEL 1
#define TVO_VIP_REORDER_CR_R_SEL 2
#define TVO_VIP_CLIP_SHIFT 8
#define TVO_VIP_CLIP_MASK 0x7
#define TVO_VIP_CLIP_DISABLED 0
#define TVO_VIP_CLIP_EAV_SAV 1
#define TVO_VIP_CLIP_LIMITED_RANGE_RGB_Y 2
#define TVO_VIP_CLIP_LIMITED_RANGE_CB_CR 3
#define TVO_VIP_CLIP_PROG_RANGE 4
#define TVO_VIP_RND_SHIFT 4
#define TVO_VIP_RND_MASK 0x3
#define TVO_VIP_RND_8BIT_ROUNDED 0
#define TVO_VIP_RND_10BIT_ROUNDED 1
#define TVO_VIP_RND_12BIT_ROUNDED 2
#define TVO_VIP_SEL_INPUT_MASK 0xf
#define TVO_VIP_SEL_INPUT_MAIN 0x0
#define TVO_VIP_SEL_INPUT_AUX 0x8
#define TVO_VIP_SEL_INPUT_FORCE_COLOR 0xf
#define TVO_VIP_SEL_INPUT_BYPASS_MASK 0x1
#define TVO_VIP_SEL_INPUT_BYPASSED 1
#define TVO_SYNC_MAIN_VTG_SET_REF 0x00
#define TVO_SYNC_MAIN_VTG_SET_1 0x01
#define TVO_SYNC_MAIN_VTG_SET_2 0x02
#define TVO_SYNC_MAIN_VTG_SET_3 0x03
#define TVO_SYNC_MAIN_VTG_SET_4 0x04
#define TVO_SYNC_MAIN_VTG_SET_5 0x05
#define TVO_SYNC_MAIN_VTG_SET_6 0x06
#define TVO_SYNC_AUX_VTG_SET_REF 0x10
#define TVO_SYNC_AUX_VTG_SET_1 0x11
#define TVO_SYNC_AUX_VTG_SET_2 0x12
#define TVO_SYNC_AUX_VTG_SET_3 0x13
#define TVO_SYNC_AUX_VTG_SET_4 0x14
#define TVO_SYNC_AUX_VTG_SET_5 0x15
#define TVO_SYNC_AUX_VTG_SET_6 0x16
#define TVO_SYNC_HD_DCS_SHIFT 8
#define ENCODER_CRTC_MASK (BIT(0) | BIT(1))
/* enum listing the supported output data format */
enum sti_tvout_video_out_type {
STI_TVOUT_VIDEO_OUT_RGB,
STI_TVOUT_VIDEO_OUT_YUV,
};
struct sti_tvout {
struct device *dev;
struct drm_device *drm_dev;
void __iomem *regs;
struct reset_control *reset;
struct drm_encoder *hdmi;
struct drm_encoder *hda;
};
struct sti_tvout_encoder {
struct drm_encoder encoder;
struct sti_tvout *tvout;
};
#define to_sti_tvout_encoder(x) \
container_of(x, struct sti_tvout_encoder, encoder)
#define to_sti_tvout(x) to_sti_tvout_encoder(x)->tvout
/* preformatter conversion matrix */
static const u32 rgb_to_ycbcr_601[8] = {
0xF927082E, 0x04C9FEAB, 0x01D30964, 0xFA95FD3D,
0x0000082E, 0x00002000, 0x00002000, 0x00000000
};
/* 709 RGB to YCbCr */
static const u32 rgb_to_ycbcr_709[8] = {
0xF891082F, 0x0367FF40, 0x01280B71, 0xF9B1FE20,
0x0000082F, 0x00002000, 0x00002000, 0x00000000
};
static u32 tvout_read(struct sti_tvout *tvout, int offset)
{
return readl(tvout->regs + offset);
}
static void tvout_write(struct sti_tvout *tvout, u32 val, int offset)
{
writel(val, tvout->regs + offset);
}
/**
* Set the clipping mode of a VIP
*
* @tvout: tvout structure
* @reg: register to set
* @cr_r:
* @y_g:
* @cb_b:
*/
static void tvout_vip_set_color_order(struct sti_tvout *tvout, int reg,
u32 cr_r, u32 y_g, u32 cb_b)
{
u32 val = tvout_read(tvout, reg);
val &= ~(TVO_VIP_REORDER_MASK << TVO_VIP_REORDER_R_SHIFT);
val &= ~(TVO_VIP_REORDER_MASK << TVO_VIP_REORDER_G_SHIFT);
val &= ~(TVO_VIP_REORDER_MASK << TVO_VIP_REORDER_B_SHIFT);
val |= cr_r << TVO_VIP_REORDER_R_SHIFT;
val |= y_g << TVO_VIP_REORDER_G_SHIFT;
val |= cb_b << TVO_VIP_REORDER_B_SHIFT;
tvout_write(tvout, val, reg);
}
/**
* Set the clipping mode of a VIP
*
* @tvout: tvout structure
* @reg: register to set
* @range: clipping range
*/
static void tvout_vip_set_clip_mode(struct sti_tvout *tvout, int reg, u32 range)
{
u32 val = tvout_read(tvout, reg);
val &= ~(TVO_VIP_CLIP_MASK << TVO_VIP_CLIP_SHIFT);
val |= range << TVO_VIP_CLIP_SHIFT;
tvout_write(tvout, val, reg);
}
/**
* Set the rounded value of a VIP
*
* @tvout: tvout structure
* @reg: register to set
* @rnd: rounded val per component
*/
static void tvout_vip_set_rnd(struct sti_tvout *tvout, int reg, u32 rnd)
{
u32 val = tvout_read(tvout, reg);
val &= ~(TVO_VIP_RND_MASK << TVO_VIP_RND_SHIFT);
val |= rnd << TVO_VIP_RND_SHIFT;
tvout_write(tvout, val, reg);
}
/**
* Select the VIP input
*
* @tvout: tvout structure
* @reg: register to set
* @main_path: main or auxiliary path
* @sel_input_logic_inverted: need to invert the logic
* @sel_input: selected_input (main/aux + conv)
*/
static void tvout_vip_set_sel_input(struct sti_tvout *tvout,
int reg,
bool main_path,
bool sel_input_logic_inverted,
enum sti_tvout_video_out_type video_out)
{
u32 sel_input;
u32 val = tvout_read(tvout, reg);
if (main_path)
sel_input = TVO_VIP_SEL_INPUT_MAIN;
else
sel_input = TVO_VIP_SEL_INPUT_AUX;
switch (video_out) {
case STI_TVOUT_VIDEO_OUT_RGB:
sel_input |= TVO_VIP_SEL_INPUT_BYPASSED;
break;
case STI_TVOUT_VIDEO_OUT_YUV:
sel_input &= ~TVO_VIP_SEL_INPUT_BYPASSED;
break;
}
/* on stih407 chip the sel_input bypass mode logic is inverted */
if (sel_input_logic_inverted)
sel_input = sel_input ^ TVO_VIP_SEL_INPUT_BYPASS_MASK;
val &= ~TVO_VIP_SEL_INPUT_MASK;
val |= sel_input;
tvout_write(tvout, val, reg);
}
/**
* Select the input video signed or unsigned
*
* @tvout: tvout structure
* @reg: register to set
* @in_vid_signed: used video input format
*/
static void tvout_vip_set_in_vid_fmt(struct sti_tvout *tvout,
int reg, u32 in_vid_fmt)
{
u32 val = tvout_read(tvout, reg);
val &= ~TVO_IN_FMT_SIGNED;
val |= in_vid_fmt;
tvout_write(tvout, val, reg);
}
/**
* Start VIP block for HDMI output
*
* @tvout: pointer on tvout structure
* @main_path: true if main path has to be used in the vip configuration
* else aux path is used.
*/
static void tvout_hdmi_start(struct sti_tvout *tvout, bool main_path)
{
struct device_node *node = tvout->dev->of_node;
bool sel_input_logic_inverted = false;
u32 tvo_in_vid_format;
dev_dbg(tvout->dev, "%s\n", __func__);
if (main_path) {
DRM_DEBUG_DRIVER("main vip for hdmi\n");
/* select the input sync for hdmi = VTG set 1 */
tvout_write(tvout, TVO_SYNC_MAIN_VTG_SET_1, TVO_HDMI_SYNC_SEL);
tvo_in_vid_format = TVO_MAIN_IN_VID_FORMAT;
} else {
DRM_DEBUG_DRIVER("aux vip for hdmi\n");
/* select the input sync for hdmi = VTG set 1 */
tvout_write(tvout, TVO_SYNC_AUX_VTG_SET_1, TVO_HDMI_SYNC_SEL);
tvo_in_vid_format = TVO_AUX_IN_VID_FORMAT;
}
/* set color channel order */
tvout_vip_set_color_order(tvout, TVO_VIP_HDMI,
TVO_VIP_REORDER_CR_R_SEL,
TVO_VIP_REORDER_Y_G_SEL,
TVO_VIP_REORDER_CB_B_SEL);
/* set clipping mode (Limited range RGB/Y) */
tvout_vip_set_clip_mode(tvout, TVO_VIP_HDMI,
TVO_VIP_CLIP_LIMITED_RANGE_RGB_Y);
/* set round mode (rounded to 8-bit per component) */
tvout_vip_set_rnd(tvout, TVO_VIP_HDMI, TVO_VIP_RND_8BIT_ROUNDED);
if (of_device_is_compatible(node, "st,stih407-tvout")) {
/* set input video format */
tvout_vip_set_in_vid_fmt(tvout, tvo_in_vid_format,
TVO_IN_FMT_SIGNED);
sel_input_logic_inverted = true;
}
/* input selection */
tvout_vip_set_sel_input(tvout, TVO_VIP_HDMI, main_path,
sel_input_logic_inverted, STI_TVOUT_VIDEO_OUT_RGB);
}
/**
* Start HDF VIP and HD DAC
*
* @tvout: pointer on tvout structure
* @main_path: true if main path has to be used in the vip configuration
* else aux path is used.
*/
static void tvout_hda_start(struct sti_tvout *tvout, bool main_path)
{
struct device_node *node = tvout->dev->of_node;
bool sel_input_logic_inverted = false;
u32 tvo_in_vid_format;
int val;
dev_dbg(tvout->dev, "%s\n", __func__);
if (main_path) {
val = TVO_SYNC_MAIN_VTG_SET_2 << TVO_SYNC_HD_DCS_SHIFT;
val |= TVO_SYNC_MAIN_VTG_SET_3;
tvout_write(tvout, val, TVO_HD_SYNC_SEL);
tvo_in_vid_format = TVO_MAIN_IN_VID_FORMAT;
} else {
val = TVO_SYNC_AUX_VTG_SET_2 << TVO_SYNC_HD_DCS_SHIFT;
val |= TVO_SYNC_AUX_VTG_SET_3;
tvout_write(tvout, val, TVO_HD_SYNC_SEL);
tvo_in_vid_format = TVO_AUX_IN_VID_FORMAT;
}
/* set color channel order */
tvout_vip_set_color_order(tvout, TVO_VIP_HDF,
TVO_VIP_REORDER_CR_R_SEL,
TVO_VIP_REORDER_Y_G_SEL,
TVO_VIP_REORDER_CB_B_SEL);
/* set clipping mode (EAV/SAV clipping) */
tvout_vip_set_clip_mode(tvout, TVO_VIP_HDF, TVO_VIP_CLIP_EAV_SAV);
/* set round mode (rounded to 10-bit per component) */
tvout_vip_set_rnd(tvout, TVO_VIP_HDF, TVO_VIP_RND_10BIT_ROUNDED);
if (of_device_is_compatible(node, "st,stih407-tvout")) {
/* set input video format */
tvout_vip_set_in_vid_fmt(tvout,
tvo_in_vid_format, TVO_IN_FMT_SIGNED);
sel_input_logic_inverted = true;
}
/* Input selection */
tvout_vip_set_sel_input(tvout, TVO_VIP_HDF, main_path,
sel_input_logic_inverted,
STI_TVOUT_VIDEO_OUT_YUV);
/* power up HD DAC */
tvout_write(tvout, 0, TVO_HD_DAC_CFG_OFF);
}
static void sti_tvout_encoder_dpms(struct drm_encoder *encoder, int mode)
{
}
static bool sti_tvout_encoder_mode_fixup(struct drm_encoder *encoder,
const struct drm_display_mode *mode,
struct drm_display_mode *adjusted_mode)
{
return true;
}
static void sti_tvout_encoder_mode_set(struct drm_encoder *encoder,
struct drm_display_mode *mode,
struct drm_display_mode *adjusted_mode)
{
}
static void sti_tvout_encoder_prepare(struct drm_encoder *encoder)
{
}
static void sti_tvout_encoder_destroy(struct drm_encoder *encoder)
{
struct sti_tvout_encoder *sti_encoder = to_sti_tvout_encoder(encoder);
drm_encoder_cleanup(encoder);
kfree(sti_encoder);
}
static const struct drm_encoder_funcs sti_tvout_encoder_funcs = {
.destroy = sti_tvout_encoder_destroy,
};
static void sti_hda_encoder_commit(struct drm_encoder *encoder)
{
struct sti_tvout *tvout = to_sti_tvout(encoder);
tvout_hda_start(tvout, sti_drm_crtc_is_main(encoder->crtc));
}
static void sti_hda_encoder_disable(struct drm_encoder *encoder)
{
struct sti_tvout *tvout = to_sti_tvout(encoder);
/* reset VIP register */
tvout_write(tvout, 0x0, TVO_VIP_HDF);
/* power down HD DAC */
tvout_write(tvout, 1, TVO_HD_DAC_CFG_OFF);
}
static const struct drm_encoder_helper_funcs sti_hda_encoder_helper_funcs = {
.dpms = sti_tvout_encoder_dpms,
.mode_fixup = sti_tvout_encoder_mode_fixup,
.mode_set = sti_tvout_encoder_mode_set,
.prepare = sti_tvout_encoder_prepare,
.commit = sti_hda_encoder_commit,
.disable = sti_hda_encoder_disable,
};
static struct drm_encoder *sti_tvout_create_hda_encoder(struct drm_device *dev,
struct sti_tvout *tvout)
{
struct sti_tvout_encoder *encoder;
struct drm_encoder *drm_encoder;
encoder = devm_kzalloc(tvout->dev, sizeof(*encoder), GFP_KERNEL);
if (!encoder)
return NULL;
encoder->tvout = tvout;
drm_encoder = (struct drm_encoder *) encoder;
drm_encoder->possible_crtcs = ENCODER_CRTC_MASK;
drm_encoder->possible_clones = 1 << 0;
drm_encoder_init(dev, drm_encoder,
&sti_tvout_encoder_funcs, DRM_MODE_ENCODER_DAC);
drm_encoder_helper_add(drm_encoder, &sti_hda_encoder_helper_funcs);
return drm_encoder;
}
static void sti_hdmi_encoder_commit(struct drm_encoder *encoder)
{
struct sti_tvout *tvout = to_sti_tvout(encoder);
tvout_hdmi_start(tvout, sti_drm_crtc_is_main(encoder->crtc));
}
static void sti_hdmi_encoder_disable(struct drm_encoder *encoder)
{
struct sti_tvout *tvout = to_sti_tvout(encoder);
/* reset VIP register */
tvout_write(tvout, 0x0, TVO_VIP_HDMI);
}
static const struct drm_encoder_helper_funcs sti_hdmi_encoder_helper_funcs = {
.dpms = sti_tvout_encoder_dpms,
.mode_fixup = sti_tvout_encoder_mode_fixup,
.mode_set = sti_tvout_encoder_mode_set,
.prepare = sti_tvout_encoder_prepare,
.commit = sti_hdmi_encoder_commit,
.disable = sti_hdmi_encoder_disable,
};
static struct drm_encoder *sti_tvout_create_hdmi_encoder(struct drm_device *dev,
struct sti_tvout *tvout)
{
struct sti_tvout_encoder *encoder;
struct drm_encoder *drm_encoder;
encoder = devm_kzalloc(tvout->dev, sizeof(*encoder), GFP_KERNEL);
if (!encoder)
return NULL;
encoder->tvout = tvout;
drm_encoder = (struct drm_encoder *) encoder;
drm_encoder->possible_crtcs = ENCODER_CRTC_MASK;
drm_encoder->possible_clones = 1 << 1;
drm_encoder_init(dev, drm_encoder,
&sti_tvout_encoder_funcs, DRM_MODE_ENCODER_TMDS);
drm_encoder_helper_add(drm_encoder, &sti_hdmi_encoder_helper_funcs);
return drm_encoder;
}
static void sti_tvout_create_encoders(struct drm_device *dev,
struct sti_tvout *tvout)
{
tvout->hdmi = sti_tvout_create_hdmi_encoder(dev, tvout);
tvout->hda = sti_tvout_create_hda_encoder(dev, tvout);
}
static void sti_tvout_destroy_encoders(struct sti_tvout *tvout)
{
if (tvout->hdmi)
drm_encoder_cleanup(tvout->hdmi);
tvout->hdmi = NULL;
if (tvout->hda)
drm_encoder_cleanup(tvout->hda);
tvout->hda = NULL;
}
static int sti_tvout_bind(struct device *dev, struct device *master, void *data)
{
struct sti_tvout *tvout = dev_get_drvdata(dev);
struct drm_device *drm_dev = data;
unsigned int i;
int ret;
tvout->drm_dev = drm_dev;
/* set preformatter matrix */
for (i = 0; i < 8; i++) {
tvout_write(tvout, rgb_to_ycbcr_601[i],
TVO_CSC_MAIN_M0 + (i * 4));
tvout_write(tvout, rgb_to_ycbcr_601[i],
TVO_CSC_AUX_M0 + (i * 4));
}
sti_tvout_create_encoders(drm_dev, tvout);
ret = component_bind_all(dev, drm_dev);
if (ret)
sti_tvout_destroy_encoders(tvout);
return ret;
}
static void sti_tvout_unbind(struct device *dev, struct device *master,
void *data)
{
/* do nothing */
}
static const struct component_ops sti_tvout_ops = {
.bind = sti_tvout_bind,
.unbind = sti_tvout_unbind,
};
static int compare_of(struct device *dev, void *data)
{
return dev->of_node == data;
}
static int sti_tvout_master_bind(struct device *dev)
{
return 0;
}
static void sti_tvout_master_unbind(struct device *dev)
{
/* do nothing */
}
static const struct component_master_ops sti_tvout_master_ops = {
.bind = sti_tvout_master_bind,
.unbind = sti_tvout_master_unbind,
};
static int sti_tvout_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct device_node *node = dev->of_node;
struct sti_tvout *tvout;
struct resource *res;
struct device_node *child_np;
struct component_match *match = NULL;
DRM_INFO("%s\n", __func__);
if (!node)
return -ENODEV;
tvout = devm_kzalloc(dev, sizeof(*tvout), GFP_KERNEL);
if (!tvout)
return -ENOMEM;
tvout->dev = dev;
/* get Memory ressources */
res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "tvout-reg");
if (!res) {
DRM_ERROR("Invalid glue resource\n");
return -ENOMEM;
}
tvout->regs = devm_ioremap_nocache(dev, res->start, resource_size(res));
if (!tvout->regs)
return -ENOMEM;
/* get reset resources */
tvout->reset = devm_reset_control_get(dev, "tvout");
/* take tvout out of reset */
if (!IS_ERR(tvout->reset))
reset_control_deassert(tvout->reset);
platform_set_drvdata(pdev, tvout);
of_platform_populate(node, NULL, NULL, dev);
child_np = of_get_next_available_child(node, NULL);
while (child_np) {
component_match_add(dev, &match, compare_of, child_np);
of_node_put(child_np);
child_np = of_get_next_available_child(node, child_np);
}
component_master_add_with_match(dev, &sti_tvout_master_ops, match);
return component_add(dev, &sti_tvout_ops);
}
static int sti_tvout_remove(struct platform_device *pdev)
{
component_master_del(&pdev->dev, &sti_tvout_master_ops);
component_del(&pdev->dev, &sti_tvout_ops);
return 0;
}
static const struct of_device_id tvout_of_match[] = {
{ .compatible = "st,stih416-tvout", },
{ .compatible = "st,stih407-tvout", },
{ /* end node */ }
};
MODULE_DEVICE_TABLE(of, tvout_of_match);
struct platform_driver sti_tvout_driver = {
.driver = {
.name = "sti-tvout",
.owner = THIS_MODULE,
.of_match_table = tvout_of_match,
},
.probe = sti_tvout_probe,
.remove = sti_tvout_remove,
};
module_platform_driver(sti_tvout_driver);
MODULE_AUTHOR("Benjamin Gaignard <benjamin.gaignard@st.com>");
MODULE_DESCRIPTION("STMicroelectronics SoC DRM driver");
MODULE_LICENSE("GPL");
|