summaryrefslogtreecommitdiff
path: root/arch/xtensa/boot/dts/virt.dts
blob: 6aecbc0f3549ae6c039e19b24b33b880755cfb7f (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
// SPDX-License-Identifier: GPL-2.0
/dts-v1/;

/ {
	compatible = "cdns,xtensa-iss";
	#address-cells = <1>;
	#size-cells = <1>;
	interrupt-parent = <&pic>;

	chosen {
		bootargs = "console=ttyS0,115200n8 debug";
	};

	memory@0 {
		device_type = "memory";
		reg = <0x00000000 0x80000000>;
	};

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;
		cpu@0 {
			compatible = "cdns,xtensa-cpu";
			reg = <0>;
			clocks = <&osc>;
		};
	};

	clocks {
		osc: osc {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <40000000>;
		};
	};

	pic: pic {
		compatible = "cdns,xtensa-pic";
		/* one cell: internal irq number,
		 * two cells: second cell == 0: internal irq number
		 *            second cell == 1: external irq number
		 */
		#address-cells = <0>;
		#interrupt-cells = <2>;
		interrupt-controller;
	};

	pci {
		compatible = "pci-host-ecam-generic";
		device_type = "pci";
		#address-cells = <3>;
		#size-cells = <2>;
		#interrupt-cells = <0x1>;

		bus-range = <0x0 0x3f>;
		reg = <0xc0000000 0x04000000>;

		     // BUS_ADDRESS(3)  CPU_PHYSICAL(1)  SIZE(2)
		ranges = <0x01000000 0x0 0xc4000000  0xc4000000  0x0 0x04000000>,
			 <0x02000000 0x0 0xc8000000  0xc8000000  0x0 0x18000000>;

		     // PCI_DEVICE(3)  INT#(1)  CONTROLLER(PHANDLE)  CONTROLLER_DATA(2)
		interrupt-map = <
			0x0000 0x0 0x0  0x1  &pic  0x0 0x1
			0x0800 0x0 0x0  0x1  &pic  0x1 0x1
			0x1000 0x0 0x0  0x1  &pic  0x2 0x1
			0x1800 0x0 0x0  0x1  &pic  0x3 0x1
			>;

		interrupt-map-mask = <0x1800 0x0 0x0  0x7>;
	};
};