summaryrefslogtreecommitdiff
path: root/arch/mips/boot/dts/ralink/mt7620a.dtsi
blob: 1f6e5320f4860c0236d6451e2e5763884e9f4827 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
// SPDX-License-Identifier: GPL-2.0
/ {
	#address-cells = <1>;
	#size-cells = <1>;
	compatible = "ralink,mtk7620a-soc";

	cpus {
		cpu@0 {
			compatible = "mips,mips24KEc";
		};
	};

	cpuintc: cpuintc {
		#address-cells = <0>;
		#interrupt-cells = <1>;
		interrupt-controller;
		compatible = "mti,cpu-interrupt-controller";
	};

	palmbus@10000000 {
		compatible = "palmbus";
		reg = <0x10000000 0x200000>;
                ranges = <0x0 0x10000000 0x1FFFFF>;

		#address-cells = <1>;
		#size-cells = <1>;

		sysc@0 {
			compatible = "ralink,mt7620a-sysc";
			reg = <0x0 0x100>;
		};

		intc: intc@200 {
			compatible = "ralink,mt7620a-intc", "ralink,rt2880-intc";
			reg = <0x200 0x100>;

			interrupt-controller;
			#interrupt-cells = <1>;

			interrupt-parent = <&cpuintc>;
			interrupts = <2>;
		};

		memc@300 {
			compatible = "ralink,mt7620a-memc", "ralink,rt3050-memc";
			reg = <0x300 0x100>;
		};

		uartlite@c00 {
			compatible = "ralink,mt7620a-uart", "ralink,rt2880-uart", "ns16550a";
			reg = <0xc00 0x100>;

			interrupt-parent = <&intc>;
			interrupts = <12>;

			reg-shift = <2>;
		};
	};
};