summaryrefslogtreecommitdiff
path: root/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
blob: 3dbf51b609a16cfc4fceecacbbdd8b82b3621e59 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
/*
 * dts file for Hisilicon HiKey Development Board
 *
 * Copyright (C) 2015, Hisilicon Ltd.
 *
 */

/dts-v1/;

#include "hi6220.dtsi"
#include "hikey-pinctrl.dtsi"

/ {
	model = "HiKey Development Board";
	compatible = "hisilicon,hi6220-hikey", "hisilicon,hi6220";

	aliases {
		serial0 = &uart0; /* On board UART0 */
		serial1 = &uart1; /* BT UART */
		serial2 = &uart2; /* LS Expansion UART0 */
		serial3 = &uart3; /* LS Expansion UART1 */
	};

	chosen {
		stdout-path = "serial3:115200n8";
	};

	/*
	 * Reserve below regions from memory node:
	 *
	 *  0x05e0,0000 - 0x05ef,ffff: MCU firmware runtime using
	 *  0x06df,f000 - 0x06df,ffff: Mailbox message data
	 *  0x0740,f000 - 0x0740,ffff: MCU firmware section
	 *  0x3e00,0000 - 0x3fff,ffff: OP-TEE
	 */
	memory@0 {
		device_type = "memory";
		reg = <0x00000000 0x00000000 0x00000000 0x05e00000>,
		      <0x00000000 0x05f00000 0x00000000 0x00eff000>,
		      <0x00000000 0x06e00000 0x00000000 0x0060f000>,
		      <0x00000000 0x07410000 0x00000000 0x36bf0000>;
	};

	soc {
		spi0: spi@f7106000 {
			status = "ok";
		};

		i2c0: i2c@f7100000 {
			status = "ok";
		};

		i2c1: i2c@f7101000 {
			status = "ok";
		};
	};
};

&uart2 {
	label = "LS-UART0";
};
&uart3 {
	label = "LS-UART1";
};