1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
|
/*
* Common features on the Zoom debug board
*/
#include "omap-gpmc-smsc911x.dtsi"
&gpmc {
ranges = <3 0 0x10000000 0x1000000>, /* CS3: 16MB for UART */
<7 0 0x2c000000 0x01000000>;
/*
* Four port TL16CP754C serial port on GPMC,
* they probably share the same GPIO IRQ
* REVISIT: Add timing support from slls644g.pdf
*/
uart@3,0 {
compatible = "ns16550a";
reg = <3 0 8>; /* CS3, offset 0, IO size 8 */
bank-width = <2>;
reg-shift = <1>;
reg-io-width = <1>;
interrupt-parent = <&gpio4>;
interrupts = <6 IRQ_TYPE_EDGE_RISING>; /* gpio102 */
clock-frequency = <1843200>;
current-speed = <115200>;
gpmc,mux-add-data = <0>;
gpmc,device-width = <1>;
gpmc,wait-pin = <1>;
gpmc,cycle2cycle-samecsen = <1>;
gpmc,cycle2cycle-diffcsen = <1>;
gpmc,cs-on-ns = <5>;
gpmc,cs-rd-off-ns = <155>;
gpmc,cs-wr-off-ns = <155>;
gpmc,adv-on-ns = <15>;
gpmc,adv-rd-off-ns = <40>;
gpmc,adv-wr-off-ns = <40>;
gpmc,oe-on-ns = <45>;
gpmc,oe-off-ns = <145>;
gpmc,we-on-ns = <45>;
gpmc,we-off-ns = <145>;
gpmc,rd-cycle-ns = <155>;
gpmc,wr-cycle-ns = <155>;
gpmc,access-ns = <145>;
gpmc,page-burst-access-ns = <20>;
gpmc,bus-turnaround-ns = <20>;
gpmc,cycle2cycle-delay-ns = <20>;
gpmc,wait-monitoring-ns = <0>;
gpmc,clk-activation-ns = <0>;
gpmc,wr-data-mux-bus-ns = <45>;
gpmc,wr-access-ns = <145>;
};
uart@3,1 {
compatible = "ns16550a";
reg = <3 0x100 8>; /* CS3, offset 0x100, IO size 8 */
bank-width = <2>;
reg-shift = <1>;
reg-io-width = <1>;
interrupt-parent = <&gpio4>;
interrupts = <6 IRQ_TYPE_EDGE_RISING>; /* gpio102 */
clock-frequency = <1843200>;
current-speed = <115200>;
};
uart@3,2 {
compatible = "ns16550a";
reg = <3 0x200 8>; /* CS3, offset 0x200, IO size 8 */
bank-width = <2>;
reg-shift = <1>;
reg-io-width = <1>;
interrupt-parent = <&gpio4>;
interrupts = <6 IRQ_TYPE_EDGE_RISING>; /* gpio102 */
clock-frequency = <1843200>;
current-speed = <115200>;
};
uart@3,3 {
compatible = "ns16550a";
reg = <3 0x300 8>; /* CS3, offset 0x300, IO size 8 */
bank-width = <2>;
reg-shift = <1>;
reg-io-width = <1>;
interrupt-parent = <&gpio4>;
interrupts = <6 IRQ_TYPE_EDGE_RISING>; /* gpio102 */
clock-frequency = <1843200>;
current-speed = <115200>;
};
ethernet@gpmc {
reg = <7 0 0xff>;
interrupt-parent = <&gpio5>;
interrupts = <30 IRQ_TYPE_LEVEL_LOW>; /* gpio158 */
};
};
|