summaryrefslogtreecommitdiff
path: root/arch/arm/boot/dts/marvell/armada-388-clearfog.dts
blob: 3290ccad2374575d86f522c08e75826b40c32918 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
 * Device Tree file for SolidRun Clearfog Pro revision A1 rev 2.0 (88F6828)
 *
 *  Copyright (C) 2015 Russell King
 */

/dts-v1/;
#include "armada-388-clearfog.dtsi"

/ {
	model = "SolidRun Clearfog A1";
	compatible = "solidrun,clearfog-a1", "marvell,armada388",
		"marvell,armada385", "marvell,armada380";

	soc {
		internal-regs {
			usb3@f0000 {
				/* CON2, nearest CPU, USB2 only. */
				status = "okay";
			};
		};

		pcie {
			pcie@3,0 {
				/* Port 2, Lane 0. CON2, nearest CPU. */
				reset-gpios = <&expander0 2 GPIO_ACTIVE_LOW>;
				status = "okay";
			};
		};
	};

	gpio-keys {
		compatible = "gpio-keys";
		pinctrl-0 = <&rear_button_pins>;
		pinctrl-names = "default";

		button-0 {
			/* The rear SW3 button */
			label = "Rear Button";
			gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
			linux,can-disable;
			linux,code = <BTN_0>;
		};
	};
};

&eth1 {
	/* ethernet@30000 */
	phy-mode = "1000base-x";

	fixed-link {
		speed = <1000>;
		full-duplex;
	};
};

&expander0 {
	/*
	 * PCA9655 GPIO expander:
	 *  0-CON3 CLKREQ#
	 *  1-CON3 PERST#
	 *  2-CON2 PERST#
	 *  3-CON3 W_DISABLE
	 *  4-CON2 CLKREQ#
	 *  5-USB3 overcurrent
	 *  6-USB3 power
	 *  7-CON2 W_DISABLE
	 *  8-JP4 P1
	 *  9-JP4 P4
	 * 10-JP4 P5
	 * 11-m.2 DEVSLP
	 * 12-SFP_LOS
	 * 13-SFP_TX_FAULT
	 * 14-SFP_TX_DISABLE
	 * 15-SFP_MOD_DEF0
	 */
	pcie2-0-clkreq-hog {
		gpio-hog;
		gpios = <4 GPIO_ACTIVE_LOW>;
		input;
		line-name = "pcie2.0-clkreq";
	};
	pcie2-0-w-disable-hog {
		gpio-hog;
		gpios = <7 GPIO_ACTIVE_LOW>;
		output-low;
		line-name = "pcie2.0-w-disable";
	};
};

&mdio {
	status = "okay";

	ethernet-switch@4 {
		compatible = "marvell,mv88e6085";
		reg = <4>;
		pinctrl-0 = <&clearfog_dsa0_clk_pins &clearfog_dsa0_pins>;
		pinctrl-names = "default";

		ethernet-ports {
			#address-cells = <1>;
			#size-cells = <0>;

			ethernet-port@0 {
				reg = <0>;
				label = "lan5";
			};

			ethernet-port@1 {
				reg = <1>;
				label = "lan4";
			};

			ethernet-port@2 {
				reg = <2>;
				label = "lan3";
			};

			ethernet-port@3 {
				reg = <3>;
				label = "lan2";
			};

			ethernet-port@4 {
				reg = <4>;
				label = "lan1";
			};

			ethernet-port@5 {
				reg = <5>;
				ethernet = <&eth1>;
				phy-mode = "1000base-x";

				fixed-link {
					speed = <1000>;
					full-duplex;
				};
			};

			ethernet-port@6 {
				/* 88E1512 external phy */
				reg = <6>;
				label = "lan6";
				phy-mode = "rgmii-id";

				fixed-link {
					speed = <1000>;
					full-duplex;
				};
			};
		};
	};
};

&pinctrl {
	clearfog_dsa0_clk_pins: clearfog-dsa0-clk-pins {
		marvell,pins = "mpp46";
		marvell,function = "ref";
	};
	clearfog_dsa0_pins: clearfog-dsa0-pins {
		marvell,pins = "mpp23", "mpp41";
		marvell,function = "gpio";
	};
	clearfog_spi1_cs_pins: spi1-cs-pins {
		marvell,pins = "mpp55";
		marvell,function = "spi1";
	};
	rear_button_pins: rear-button-pins {
		marvell,pins = "mpp34";
		marvell,function = "gpio";
	};
};

&spi1 {
	/*
	 * Add SPI CS pins for clearfog:
	 * CS0: W25Q32
	 * CS1:
	 * CS2: mikrobus
	 */
	pinctrl-0 = <&spi1_pins &clearfog_spi1_cs_pins &mikro_spi_pins>;
};