1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
|
/*
* Copyright 2012 Sascha Hauer, Pengutronix
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
/dts-v1/;
#include "imx27.dtsi"
/ {
model = "Freescale i.MX27 Product Development Kit";
compatible = "fsl,imx27-pdk", "fsl,imx27";
memory@a0000000 {
reg = <0xa0000000 0x08000000>;
};
usbphy {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
usbphy0: usbphy@0 {
compatible = "usb-nop-xceiv";
reg = <0>;
clocks = <&clks IMX27_CLK_DUMMY>;
clock-names = "main_clk";
#phy-cells = <0>;
};
};
};
&cspi2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_cspi2>;
cs-gpios = <&gpio4 21 GPIO_ACTIVE_HIGH>;
status = "okay";
pmic: mc13783@0 {
compatible = "fsl,mc13783";
reg = <0>;
spi-cs-high;
spi-max-frequency = <1000000>;
interrupt-parent = <&gpio3>;
interrupts = <14 IRQ_TYPE_LEVEL_HIGH>;
regulators {
vgen_reg: vgen {
regulator-min-microvolt = <1500000>;
regulator-max-microvolt = <1500000>;
regulator-always-on;
regulator-boot-on;
};
vmmc1_reg: vmmc1 {
regulator-min-microvolt = <1600000>;
regulator-max-microvolt = <3000000>;
};
gpo1_reg: gpo1 {
regulator-always-on;
regulator-boot-on;
};
gpo3_reg: gpo3 {
regulator-always-on;
regulator-boot-on;
};
};
};
};
&fec {
phy-mode = "mii";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_fec>;
status = "okay";
};
&kpp {
linux,keymap = <
MATRIX_KEY(0, 0, KEY_UP)
MATRIX_KEY(0, 1, KEY_DOWN)
MATRIX_KEY(1, 0, KEY_RIGHT)
MATRIX_KEY(1, 1, KEY_LEFT)
MATRIX_KEY(1, 2, KEY_ENTER)
MATRIX_KEY(2, 0, KEY_F6)
MATRIX_KEY(2, 1, KEY_F8)
MATRIX_KEY(2, 2, KEY_F9)
MATRIX_KEY(2, 3, KEY_F10)
>;
status = "okay";
};
&nfc {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_nand>;
nand-ecc-mode = "hw";
nand-on-flash-bbt;
status = "okay";
};
&uart1 {
uart-has-rtscts;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>;
status = "okay";
};
&usbotg {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbotg>;
dr_mode = "otg";
fsl,usbphy = <&usbphy0>;
phy_type = "ulpi";
status = "okay";
};
&iomuxc {
imx27-pdk {
pinctrl_cspi2: cspi2grp {
fsl,pins = <
MX27_PAD_CSPI2_MISO__CSPI2_MISO 0x0
MX27_PAD_CSPI2_MOSI__CSPI2_MOSI 0x0
MX27_PAD_CSPI2_SCLK__CSPI2_SCLK 0x0
MX27_PAD_CSPI2_SS0__GPIO4_21 0x0 /* SPI2 CS0 */
MX27_PAD_TOUT__GPIO3_14 0x0 /* PMIC IRQ */
>;
};
pinctrl_fec: fecgrp {
fsl,pins = <
MX27_PAD_SD3_CMD__FEC_TXD0 0x0
MX27_PAD_SD3_CLK__FEC_TXD1 0x0
MX27_PAD_ATA_DATA0__FEC_TXD2 0x0
MX27_PAD_ATA_DATA1__FEC_TXD3 0x0
MX27_PAD_ATA_DATA2__FEC_RX_ER 0x0
MX27_PAD_ATA_DATA3__FEC_RXD1 0x0
MX27_PAD_ATA_DATA4__FEC_RXD2 0x0
MX27_PAD_ATA_DATA5__FEC_RXD3 0x0
MX27_PAD_ATA_DATA6__FEC_MDIO 0x0
MX27_PAD_ATA_DATA7__FEC_MDC 0x0
MX27_PAD_ATA_DATA8__FEC_CRS 0x0
MX27_PAD_ATA_DATA9__FEC_TX_CLK 0x0
MX27_PAD_ATA_DATA10__FEC_RXD0 0x0
MX27_PAD_ATA_DATA11__FEC_RX_DV 0x0
MX27_PAD_ATA_DATA12__FEC_RX_CLK 0x0
MX27_PAD_ATA_DATA13__FEC_COL 0x0
MX27_PAD_ATA_DATA14__FEC_TX_ER 0x0
MX27_PAD_ATA_DATA15__FEC_TX_EN 0x0
>;
};
pinctrl_nand: nandgrp {
fsl,pins = <
MX27_PAD_NFRB__NFRB 0x0
MX27_PAD_NFCLE__NFCLE 0x0
MX27_PAD_NFWP_B__NFWP_B 0x0
MX27_PAD_NFCE_B__NFCE_B 0x0
MX27_PAD_NFALE__NFALE 0x0
MX27_PAD_NFRE_B__NFRE_B 0x0
MX27_PAD_NFWE_B__NFWE_B 0x0
>;
};
pinctrl_uart1: uart1grp {
fsl,pins = <
MX27_PAD_UART1_TXD__UART1_TXD 0x0
MX27_PAD_UART1_RXD__UART1_RXD 0x0
MX27_PAD_UART1_CTS__UART1_CTS 0x0
MX27_PAD_UART1_RTS__UART1_RTS 0x0
>;
};
pinctrl_usbotg: usbotggrp {
fsl,pins = <
MX27_PAD_USBOTG_NXT__USBOTG_NXT 0x0
MX27_PAD_USBOTG_STP__USBOTG_STP 0x0
MX27_PAD_USBOTG_DIR__USBOTG_DIR 0x0
MX27_PAD_USBOTG_CLK__USBOTG_CLK 0x0
MX27_PAD_USBOTG_DATA0__USBOTG_DATA0 0x0
MX27_PAD_USBOTG_DATA1__USBOTG_DATA1 0x0
MX27_PAD_USBOTG_DATA2__USBOTG_DATA2 0x0
MX27_PAD_USBOTG_DATA3__USBOTG_DATA3 0x0
MX27_PAD_USBOTG_DATA4__USBOTG_DATA4 0x0
MX27_PAD_USBOTG_DATA5__USBOTG_DATA5 0x0
MX27_PAD_USBOTG_DATA6__USBOTG_DATA6 0x0
MX27_PAD_USBOTG_DATA7__USBOTG_DATA7 0x0
>;
};
};
};
|