1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
|
/*
* Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include "dra74x.dtsi"
/ {
compatible = "ti,dra762", "ti,dra7";
};
/* MCAN interrupts are hard-wired to irqs 67, 68 */
&crossbar_mpu {
ti,irqs-skip = <10 67 68 133 139 140>;
};
&scm_conf_clocks {
dpll_gmac_h14x2_ctrl_ck: dpll_gmac_h14x2_ctrl_ck@3fc {
#clock-cells = <0>;
compatible = "ti,divider-clock";
clocks = <&dpll_gmac_x2_ck>;
ti,max-div = <63>;
reg = <0x03fc>;
ti,bit-shift=<20>;
ti,latch-bit=<26>;
assigned-clocks = <&dpll_gmac_h14x2_ctrl_ck>;
assigned-clock-rates = <80000000>;
};
dpll_gmac_h14x2_ctrl_mux_ck: dpll_gmac_h14x2_ctrl_mux_ck@3fc {
#clock-cells = <0>;
compatible = "ti,mux-clock";
clocks = <&dpll_gmac_ck>, <&dpll_gmac_h14x2_ctrl_ck>;
reg = <0x3fc>;
ti,bit-shift = <29>;
ti,latch-bit=<26>;
assigned-clocks = <&dpll_gmac_h14x2_ctrl_mux_ck>;
assigned-clock-parents = <&dpll_gmac_h14x2_ctrl_ck>;
};
mcan_clk: mcan_clk@3fc {
#clock-cells = <0>;
compatible = "ti,gate-clock";
clocks = <&dpll_gmac_h14x2_ctrl_mux_ck>;
ti,bit-shift = <27>;
reg = <0x3fc>;
};
};
|