blob: ee59409640f244ebf5d985c18f46d91d3fbd9f6a (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
|
Broadcom STB SW_INIT-style reset controller
===========================================
Broadcom STB SoCs have a SW_INIT-style reset controller with separate
SET/CLEAR/STATUS registers and possibly multiple banks, each of 32 bit
reset lines.
Please also refer to reset.txt in this directory for common reset
controller binding usage.
Required properties:
- compatible: should be brcm,brcmstb-reset
- reg: register base and length
- #reset-cells: must be set to 1
Example:
reset: reset-controller@8404318 {
compatible = "brcm,brcmstb-reset";
reg = <0x8404318 0x30>;
#reset-cells = <1>;
};
ðernet_switch {
resets = <&reset 26>;
reset-names = "switch";
};
|