blob: 303078a7b7a88de196f65d1eae62ffd06063c596 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
|
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: "http://devicetree.org/schemas/pci/cdns-pcie-host.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
title: Cadence PCIe Host
maintainers:
- Tom Joseph <tjoseph@cadence.com>
allOf:
- $ref: "/schemas/pci/pci-bus.yaml#"
- $ref: "cdns-pcie.yaml#"
properties:
cdns,max-outbound-regions:
description: maximum number of outbound regions
$ref: /schemas/types.yaml#/definitions/uint32
minimum: 1
maximum: 32
default: 32
deprecated: true
cdns,no-bar-match-nbits:
description:
Set into the no BAR match register to configure the number of least
significant bits kept during inbound (PCIe -> AXI) address translations
$ref: /schemas/types.yaml#/definitions/uint32
minimum: 0
maximum: 64
default: 32
deprecated: true
msi-parent: true
|