summaryrefslogtreecommitdiff
path: root/Documentation/devicetree/bindings/net/qcom,ipq4019-mdio.yaml
blob: ad8b2b41c140370b80a2924caac2b21eb1bd2096 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/qcom,ipq4019-mdio.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Qualcomm IPQ40xx MDIO Controller

maintainers:
  - Robert Marko <robert.marko@sartura.hr>

allOf:
  - $ref: "mdio.yaml#"

properties:
  compatible:
    enum:
      - qcom,ipq4019-mdio
      - qcom,ipq5018-mdio

  "#address-cells":
    const: 1

  "#size-cells":
    const: 0

  reg:
    minItems: 1
    maxItems: 2
    description:
      the first Address and length of the register set for the MDIO controller.
      the second Address and length of the register for ethernet LDO, this second
      address range is only required by the platform IPQ50xx.

  clocks:
    maxItems: 1
    description: |
      MDIO clock source frequency fixed to 100MHZ, this clock should be specified
      by the platform IPQ807x, IPQ60xx and IPQ50xx.

required:
  - compatible
  - reg
  - "#address-cells"
  - "#size-cells"

unevaluatedProperties: false

examples:
  - |
    mdio@90000 {
      #address-cells = <1>;
      #size-cells = <0>;
      compatible = "qcom,ipq4019-mdio";
      reg = <0x90000 0x64>;

      ethphy0: ethernet-phy@0 {
        reg = <0>;
      };

      ethphy1: ethernet-phy@1 {
        reg = <1>;
      };

      ethphy2: ethernet-phy@2 {
        reg = <2>;
      };

      ethphy3: ethernet-phy@3 {
        reg = <3>;
      };

      ethphy4: ethernet-phy@4 {
        reg = <4>;
      };
    };