1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
|
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: "http://devicetree.org/schemas/mmc/renesas,sdhi.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
title: Renesas SDHI SD/MMC controller
maintainers:
- Wolfram Sang <wsa+renesas@sang-engineering.com>
properties:
compatible:
oneOf:
- items:
- const: renesas,sdhi-sh73a0 # R-Mobile APE6
- items:
- const: renesas,sdhi-r7s72100 # RZ/A1H
- items:
- const: renesas,sdhi-r7s9210 # SH-Mobile AG5
- items:
- const: renesas,sdhi-r8a73a4 # R-Mobile APE6
- items:
- const: renesas,sdhi-r8a7740 # R-Mobile A1
- items:
- enum:
- renesas,sdhi-r8a7778 # R-Car M1
- renesas,sdhi-r8a7779 # R-Car H1
- const: renesas,rcar-gen1-sdhi # R-Car Gen1
- items:
- enum:
- renesas,sdhi-r8a7742 # RZ/G1H
- renesas,sdhi-r8a7743 # RZ/G1M
- renesas,sdhi-r8a7744 # RZ/G1N
- renesas,sdhi-r8a7745 # RZ/G1E
- renesas,sdhi-r8a77470 # RZ/G1C
- renesas,sdhi-r8a7790 # R-Car H2
- renesas,sdhi-r8a7791 # R-Car M2-W
- renesas,sdhi-r8a7792 # R-Car V2H
- renesas,sdhi-r8a7793 # R-Car M2-N
- renesas,sdhi-r8a7794 # R-Car E2
- const: renesas,rcar-gen2-sdhi # R-Car Gen2 and RZ/G1
- items:
- const: renesas,sdhi-mmc-r8a77470 # RZ/G1C (SDHI/MMC IP)
- items:
- enum:
- renesas,sdhi-r8a774a1 # RZ/G2M
- renesas,sdhi-r8a774b1 # RZ/G2N
- renesas,sdhi-r8a774c0 # RZ/G2E
- renesas,sdhi-r8a774e1 # RZ/G2H
- renesas,sdhi-r8a7795 # R-Car H3
- renesas,sdhi-r8a7796 # R-Car M3-W
- renesas,sdhi-r8a77961 # R-Car M3-W+
- renesas,sdhi-r8a77965 # R-Car M3-N
- renesas,sdhi-r8a77970 # R-Car V3M
- renesas,sdhi-r8a77980 # R-Car V3H
- renesas,sdhi-r8a77990 # R-Car E3
- renesas,sdhi-r8a77995 # R-Car D3
- renesas,sdhi-r8a779a0 # R-Car V3U
- renesas,sdhi-r9a07g043 # RZ/G2UL
- renesas,sdhi-r9a07g044 # RZ/G2{L,LC}
- renesas,sdhi-r9a07g054 # RZ/V2L
- const: renesas,rcar-gen3-sdhi # R-Car Gen3 or RZ/G2
reg:
maxItems: 1
interrupts:
minItems: 1
maxItems: 3
clocks: true
clock-names: true
dmas:
minItems: 4
maxItems: 4
dma-names:
minItems: 4
maxItems: 4
items:
enum:
- tx
- rx
power-domains:
maxItems: 1
resets:
maxItems: 1
pinctrl-0:
minItems: 1
maxItems: 2
pinctrl-1:
maxItems: 1
pinctrl-names: true
max-frequency: true
allOf:
- $ref: "mmc-controller.yaml"
- if:
properties:
compatible:
contains:
enum:
- renesas,sdhi-r9a07g043
- renesas,sdhi-r9a07g044
- renesas,sdhi-r9a07g054
then:
properties:
clocks:
items:
- description: IMCLK, SDHI channel main clock1.
- description: CLK_HS, SDHI channel High speed clock which operates
4 times that of SDHI channel main clock1.
- description: IMCLK2, SDHI channel main clock2. When this clock is
turned off, external SD card detection cannot be
detected.
- description: ACLK, SDHI channel bus clock.
clock-names:
items:
- const: core
- const: clkh
- const: cd
- const: aclk
required:
- clock-names
- resets
else:
if:
properties:
compatible:
contains:
enum:
- renesas,rcar-gen2-sdhi
- renesas,rcar-gen3-sdhi
then:
properties:
clocks:
minItems: 1
maxItems: 3
clock-names:
minItems: 1
uniqueItems: true
items:
- const: core
- enum: [ clkh, cd ]
- const: cd
else:
properties:
clocks:
minItems: 1
maxItems: 2
clock-names:
minItems: 1
items:
- const: core
- const: cd
- if:
properties:
compatible:
contains:
const: renesas,sdhi-mmc-r8a77470
then:
properties:
pinctrl-names:
items:
- const: state_uhs
else:
properties:
pinctrl-names:
minItems: 1
items:
- const: default
- const: state_uhs
- if:
properties:
compatible:
contains:
enum:
- renesas,sdhi-r7s72100
- renesas,sdhi-r7s9210
then:
required:
- clock-names
description:
The internal card detection logic that exists in these controllers is
sectioned off to be run by a separate second clock source to allow
the main core clock to be turned off to save power.
required:
- compatible
- reg
- interrupts
- clocks
- power-domains
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/clock/r8a7790-cpg-mssr.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/power/r8a7790-sysc.h>
sdhi0: mmc@ee100000 {
compatible = "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi";
reg = <0xee100000 0x328>;
interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 314>;
dmas = <&dmac0 0xcd>, <&dmac0 0xce>, <&dmac1 0xcd>, <&dmac1 0xce>;
dma-names = "tx", "rx", "tx", "rx";
max-frequency = <195000000>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
resets = <&cpg 314>;
};
sdhi1: mmc@ee120000 {
compatible = "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi";
reg = <0xee120000 0x328>;
interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 313>;
dmas = <&dmac0 0xc9>, <&dmac0 0xca>, <&dmac1 0xc9>, <&dmac1 0xca>;
dma-names = "tx", "rx", "tx", "rx";
max-frequency = <195000000>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
resets = <&cpg 313>;
};
sdhi2: mmc@ee140000 {
compatible = "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi";
reg = <0xee140000 0x100>;
interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 312>;
dmas = <&dmac0 0xc1>, <&dmac0 0xc2>, <&dmac1 0xc1>, <&dmac1 0xc2>;
dma-names = "tx", "rx", "tx", "rx";
max-frequency = <97500000>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
resets = <&cpg 312>;
};
sdhi3: mmc@ee160000 {
compatible = "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi";
reg = <0xee160000 0x100>;
interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 311>;
dmas = <&dmac0 0xd3>, <&dmac0 0xd4>, <&dmac1 0xd3>, <&dmac1 0xd4>;
dma-names = "tx", "rx", "tx", "rx";
max-frequency = <97500000>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
resets = <&cpg 311>;
};
|
