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* MediaTek JPEG Encoder
MediaTek JPEG Encoder is the JPEG encode hardware present in MediaTek SoCs
Required properties:
- compatible : "mediatek,mt2701-jpgenc"
followed by "mediatek,mtk-jpgenc"
- reg : physical base address of the JPEG encoder registers and length of
memory mapped region.
- interrupts : interrupt number to the interrupt controller.
- clocks: device clocks, see
Documentation/devicetree/bindings/clock/clock-bindings.txt for details.
- clock-names: must contain "jpgenc". It is the clock of JPEG encoder.
- power-domains: a phandle to the power domain, see
Documentation/devicetree/bindings/power/power_domain.txt for details.
- mediatek,larb: must contain the local arbiters in the current SoCs, see
Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.txt
for details.
- iommus: should point to the respective IOMMU block with master port as
argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.txt
for details.
Example:
jpegenc: jpegenc@1500a000 {
compatible = "mediatek,mt2701-jpgenc",
"mediatek,mtk-jpgenc";
reg = <0 0x1500a000 0 0x1000>;
interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_LOW>;
clocks = <&imgsys CLK_IMG_VENC>;
clock-names = "jpgenc";
power-domains = <&scpsys MT2701_POWER_DOMAIN_ISP>;
mediatek,larb = <&larb2>;
iommus = <&iommu MT2701_M4U_PORT_JPGENC_RDMA>,
<&iommu MT2701_M4U_PORT_JPGENC_BSDMA>;
};
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