summaryrefslogtreecommitdiff
path: root/Documentation/devicetree/bindings/ata/ahci-platform.yaml
blob: c146ab8e14e5ffecc23251235ca4a0a55b7fa7ce (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/ata/ahci-platform.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: AHCI SATA Controller

description: |
  SATA nodes are defined to describe on-chip Serial ATA controllers.
  Each SATA controller should have its own node.

  It is possible, but not required, to represent each port as a sub-node.
  It allows to enable each port independently when dealing with multiple
  PHYs.

maintainers:
  - Hans de Goede <hdegoede@redhat.com>
  - Jens Axboe <axboe@kernel.dk>

select:
  properties:
    compatible:
      contains:
        enum:
          - brcm,iproc-ahci
          - cavium,octeon-7130-ahci
          - hisilicon,hisi-ahci
          - ibm,476gtr-ahci
          - marvell,armada-3700-ahci
          - marvell,armada-8k-ahci
          - marvell,berlin2q-ahci
          - snps,dwc-ahci
          - snps,spear-ahci
  required:
    - compatible

allOf:
  - $ref: "sata-common.yaml#"


properties:
  compatible:
    oneOf:
      - items:
          - enum:
              - brcm,iproc-ahci
              - marvell,armada-8k-ahci
              - marvell,berlin2-ahci
              - marvell,berlin2q-ahci
          - const: generic-ahci
      - items:
          - enum:
              - rockchip,rk3568-dwc-ahci
          - const: snps,dwc-ahci
      - enum:
          - cavium,octeon-7130-ahci
          - hisilicon,hisi-ahci
          - ibm,476gtr-ahci
          - marvell,armada-3700-ahci
          - snps,dwc-ahci
          - snps,spear-ahci

  reg:
    minItems: 1
    maxItems: 2

  reg-names:
    maxItems: 1

  clocks:
    description:
      Clock IDs array as required by the controller.
    minItems: 1
    maxItems: 3

  clock-names:
    description:
      Names of clocks corresponding to IDs in the clock property.
    minItems: 1
    maxItems: 3

  interrupts:
    maxItems: 1

  ahci-supply:
    description:
      regulator for AHCI controller

  dma-coherent: true

  phy-supply:
    description:
      regulator for PHY power

  phys:
    description:
      List of all PHYs on this controller
    maxItems: 1

  phy-names:
    description:
      Name specifier for the PHYs
    maxItems: 1

  ports-implemented:
    $ref: '/schemas/types.yaml#/definitions/uint32'
    description: |
      Mask that indicates which ports that the HBA supports
      are available for software to use. Useful if PORTS_IMPL
      is not programmed by the BIOS, which is true with
      some embedded SoCs.
    maximum: 0x1f

  power-domains:
    maxItems: 1

  resets:
    maxItems: 1

  target-supply:
    description:
      regulator for SATA target power

required:
  - compatible
  - reg
  - interrupts

patternProperties:
  "^sata-port@[0-9a-f]+$":
    type: object
    additionalProperties: false
    description:
      Subnode with configuration of the Ports.

    properties:
      reg:
        maxItems: 1

      phys:
        maxItems: 1

      phy-names:
        maxItems: 1

      target-supply:
        description:
          regulator for SATA target power

    required:
      - reg

    anyOf:
      - required: [ phys ]
      - required: [ target-supply ]

unevaluatedProperties: false

examples:
  - |
    sata@ffe08000 {
        compatible = "snps,spear-ahci";
        reg = <0xffe08000 0x1000>;
        interrupts = <115>;
    };
  - |
    #include <dt-bindings/interrupt-controller/arm-gic.h>
    #include <dt-bindings/clock/berlin2q.h>
    sata@f7e90000 {
        compatible = "marvell,berlin2q-ahci", "generic-ahci";
        reg = <0xf7e90000 0x1000>;
        interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
        clocks = <&chip CLKID_SATA>;
        #address-cells = <1>;
        #size-cells = <0>;

        sata0: sata-port@0 {
            reg = <0>;
            phys = <&sata_phy 0>;
            target-supply = <&reg_sata0>;
        };

        sata1: sata-port@1 {
            reg = <1>;
            phys = <&sata_phy 1>;
            target-supply = <&reg_sata1>;
        };
    };