/* * Software PHY emulation * * Code taken from fixed_phy.c by Russell King * * Author: Vitaly Bordug * Anton Vorontsov * * Copyright (c) 2006-2007 MontaVista Software, Inc. * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the * Free Software Foundation; either version 2 of the License, or (at your * option) any later version. */ #include #include #include #include #include "swphy.h" struct swmii_regs { u16 bmcr; u16 bmsr; u16 lpa; u16 lpagb; }; enum { SWMII_SPEED_10 = 0, SWMII_SPEED_100, SWMII_SPEED_1000, SWMII_DUPLEX_HALF = 0, SWMII_DUPLEX_FULL, }; /* * These two tables get bitwise-anded together to produce the final result. * This means the speed table must contain both duplex settings, and the * duplex table must contain all speed settings. */ static const struct swmii_regs speed[] = { [SWMII_SPEED_10] = { .bmcr = BMCR_FULLDPLX, .lpa = LPA_10FULL | LPA_10HALF, }, [SWMII_SPEED_100] = { .bmcr = BMCR_FULLDPLX | BMCR_SPEED100, .bmsr = BMSR_100FULL | BMSR_100HALF, .lpa = LPA_100FULL | LPA_100HALF, }, [SWMII_SPEED_1000] = { .bmcr = BMCR_FULLDPLX | BMCR_SPEED1000, .bmsr = BMSR_ESTATEN, .lpagb = LPA_1000FULL | LPA_1000HALF, }, }; static const struct swmii_regs duplex[] = { [SWMII_DUPLEX_HALF] = { .bmcr = ~BMCR_FULLDPLX, .bmsr = BMSR_ESTATEN | BMSR_100HALF, .lpa = LPA_10HALF | LPA_100HALF, .lpagb = LPA_1000HALF, }, [SWMII_DUPLEX_FULL] = { .bmcr = ~0, .bmsr = BMSR_ESTATEN | BMSR_100FULL, .lpa = LPA_10FULL | LPA_100FULL, .lpagb = LPA_1000FULL, }, }; static int swphy_decode_speed(int speed) { switch (speed) { case 1000: return SWMII_SPEED_1000; case 100: return SWMII_SPEED_100; case 10: return SWMII_SPEED_10; default: return -EINVAL; } } /** * swphy_update_regs - update MII register array with fixed phy state * @regs: array of 32 registers to update * @state: fixed phy status * * Update the array of MII registers with the fixed phy link, speed, * duplex and pause mode settings. */ int swphy_update_regs(u16 *regs, const struct fixed_phy_status *state) { int speed_index, duplex_index; u16 bmsr = BMSR_ANEGCAPABLE; u16 bmcr = 0; u16 lpagb = 0; u16 lpa = 0; speed_index = swphy_decode_speed(state->speed); if (speed_index < 0) { pr_warn("swphy: unknown speed\n"); return -EINVAL; } duplex_index = state->duplex ? SWMII_DUPLEX_FULL : SWMII_DUPLEX_HALF; bmsr |= speed[speed_index].bmsr & duplex[duplex_index].bmsr; if (state->link) { bmsr |= BMSR_LSTATUS | BMSR_ANEGCOMPLETE; bmcr |= speed[speed_index].bmcr & duplex[duplex_index].bmcr; lpa |= speed[speed_index].lpa & duplex[duplex_index].lpa; lpagb |= speed[speed_index].lpagb & duplex[duplex_index].lpagb; if (state->pause) lpa |= LPA_PAUSE_CAP; if (state->asym_pause) lpa |= LPA_PAUSE_ASYM; } regs[MII_PHYSID1] = 0; regs[MII_PHYSID2] = 0; regs[MII_BMSR] = bmsr; regs[MII_BMCR] = bmcr; regs[MII_LPA] = lpa; regs[MII_STAT1000] = lpagb; return 0; } EXPORT_SYMBOL_GPL(swphy_update_regs);