/* * Copyright (C) 2013 Marek Vasut * * The code contained herein is licensed under the GNU General Public * License. You may obtain a copy of the GNU General Public License * Version 2 or later at the following locations: * * http://www.opensource.org/licenses/gpl-license.html * http://www.gnu.org/copyleft/gpl.html */ /dts-v1/; #include "imx53.dtsi" / { model = "DENX M53EVK"; compatible = "denx,imx53-m53evk", "fsl,imx53"; memory { reg = <0x70000000 0x20000000>; }; soc { display@di1 { compatible = "fsl,imx-parallel-display"; crtcs = <&ipu 1>; interface-pix-fmt = "bgr666"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ipu_disp2>; display-timings { 800x480p60 { native-mode; clock-frequency = <31500000>; hactive = <800>; vactive = <480>; hfront-porch = <40>; hback-porch = <88>; hsync-len = <128>; vback-porch = <33>; vfront-porch = <9>; vsync-len = <3>; vsync-active = <1>; }; }; }; }; backlight { compatible = "pwm-backlight"; pwms = <&pwm1 0 3000>; brightness-levels = <0 4 8 16 32 64 128 255>; default-brightness-level = <6>; }; leds { compatible = "gpio-leds"; pinctrl-names = "default"; pinctrl-0 = <&led_pin_gpio>; user1 { label = "user1"; gpios = <&gpio2 8 0>; linux,default-trigger = "heartbeat"; }; user2 { label = "user2"; gpios = <&gpio2 9 0>; linux,default-trigger = "heartbeat"; }; }; regulators { compatible = "simple-bus"; reg_3p2v: 3p2v { compatible = "regulator-fixed"; regulator-name = "3P2V"; regulator-min-microvolt = <3200000>; regulator-max-microvolt = <3200000>; regulator-always-on; }; }; sound { compatible = "fsl,imx53-m53evk-sgtl5000", "fsl,imx-audio-sgtl5000"; model = "imx53-m53evk-sgtl5000"; ssi-controller = <&ssi2>; audio-codec = <&sgtl5000>; audio-routing = "MIC_IN", "Mic Jack", "Mic Jack", "Mic Bias", "LINE_IN", "Line In Jack", "Headphone Jack", "HP_OUT", "Ext Spk", "LINE_OUT"; mux-int-port = <2>; mux-ext-port = <4>; }; }; &audmux { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_audmux>; status = "okay"; }; &can1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_can1>; status = "okay"; }; &can2 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_can2>; status = "okay"; }; &esdhc1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_esdhc1>; cd-gpios = <&gpio1 1 0>; wp-gpios = <&gpio1 9 0>; status = "okay"; }; &fec { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_fec>; phy-mode = "rmii"; status = "okay"; }; &i2c1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c1>; status = "okay"; sgtl5000: codec@0a { compatible = "fsl,sgtl5000"; reg = <0x0a>; VDDA-supply = <®_3p2v>; VDDIO-supply = <®_3p2v>; clocks = <&clks 150>; }; }; &i2c2 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c2>; clock-frequency = <400000>; status = "okay"; stmpe610@41 { compatible = "st,stmpe610"; #address-cells = <1>; #size-cells = <0>; reg = <0x41>; id = <0>; blocks = <0x5>; interrupts = <6 0x0>; interrupt-parent = <&gpio7>; irq-trigger = <0x1>; stmpe_touchscreen { compatible = "stmpe,ts"; reg = <0>; ts,sample-time = <4>; ts,mod-12b = <1>; ts,ref-sel = <0>; ts,adc-freq = <1>; ts,ave-ctrl = <3>; ts,touch-det-delay = <3>; ts,settling = <4>; ts,fraction-z = <7>; ts,i-drive = <1>; }; }; eeprom: eeprom@50 { compatible = "atmel,24c128"; reg = <0x50>; pagesize = <32>; }; rtc: rtc@68 { compatible = "stm,m41t62"; reg = <0x68>; }; }; &i2c3 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c3>; status = "okay"; }; &iomuxc { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_hog>; imx53-m53evk { pinctrl_hog: hoggrp { fsl,pins = < MX53_PAD_GPIO_0__CCM_SSI_EXT1_CLK 0x80000000 MX53_PAD_EIM_EB3__GPIO2_31 0x80000000 MX53_PAD_PATA_DA_0__GPIO7_6 0x80000000 MX53_PAD_DISP0_DAT8__PWM1_PWMO 0x5 >; }; led_pin_gpio: led_gpio@0 { fsl,pins = < MX53_PAD_PATA_DATA8__GPIO2_8 0x80000000 MX53_PAD_PATA_DATA9__GPIO2_9 0x80000000 >; }; pinctrl_audmux: audmuxgrp { fsl,pins = < MX53_PAD_SD2_DATA3__AUDMUX_AUD4_TXC 0x80000000 MX53_PAD_SD2_DATA2__AUDMUX_AUD4_TXD 0x80000000 MX53_PAD_SD2_DATA1__AUDMUX_AUD4_TXFS 0x80000000 MX53_PAD_SD2_DATA0__AUDMUX_AUD4_RXD 0x80000000 >; }; pinctrl_can1: can1grp { fsl,pins = < MX53_PAD_GPIO_7__CAN1_TXCAN 0x80000000 MX53_PAD_GPIO_8__CAN1_RXCAN 0x80000000 >; }; pinctrl_can2: can2grp { fsl,pins = < MX53_PAD_KEY_COL4__CAN2_TXCAN 0x80000000 MX53_PAD_KEY_ROW4__CAN2_RXCAN 0x80000000 >; }; pinctrl_esdhc1: esdhc1grp { fsl,pins = < MX53_PAD_SD1_DATA0__ESDHC1_DAT0 0x1d5 MX53_PAD_SD1_DATA1__ESDHC1_DAT1 0x1d5 MX53_PAD_SD1_DATA2__ESDHC1_DAT2 0x1d5 MX53_PAD_SD1_DATA3__ESDHC1_DAT3 0x1d5 MX53_PAD_SD1_CMD__ESDHC1_CMD 0x1d5 MX53_PAD_SD1_CLK__ESDHC1_CLK 0x1d5 >; }; pinctrl_fec: fecgrp { fsl,pins = < MX53_PAD_FEC_MDC__FEC_MDC 0x80000000 MX53_PAD_FEC_MDIO__FEC_MDIO 0x80000000 MX53_PAD_FEC_REF_CLK__FEC_TX_CLK 0x80000000 MX53_PAD_FEC_RX_ER__FEC_RX_ER 0x80000000 MX53_PAD_FEC_CRS_DV__FEC_RX_DV 0x80000000 MX53_PAD_FEC_RXD1__FEC_RDATA_1 0x80000000 MX53_PAD_FEC_RXD0__FEC_RDATA_0 0x80000000 MX53_PAD_FEC_TX_EN__FEC_TX_EN 0x80000000 MX53_PAD_FEC_TXD1__FEC_TDATA_1 0x80000000 MX53_PAD_FEC_TXD0__FEC_TDATA_0 0x80000000 >; }; pinctrl_i2c1: i2c1grp { fsl,pins = < MX53_PAD_EIM_D21__I2C1_SCL 0xc0000000 MX53_PAD_EIM_D28__I2C1_SDA 0xc0000000 >; }; pinctrl_i2c2: i2c2grp { fsl,pins = < MX53_PAD_EIM_D16__I2C2_SDA 0xc0000000 MX53_PAD_EIM_EB2__I2C2_SCL 0xc0000000 >; }; pinctrl_i2c3: i2c3grp { fsl,pins = < MX53_PAD_GPIO_6__I2C3_SDA 0xc0000000 MX53_PAD_GPIO_5__I2C3_SCL 0xc0000000 >; }; pinctrl_ipu_disp2: ipudisp2grp { fsl,pins = < MX53_PAD_LVDS0_TX0_P__LDB_LVDS0_TX0 0x80000000 MX53_PAD_LVDS0_TX1_P__LDB_LVDS0_TX1 0x80000000 MX53_PAD_LVDS0_TX2_P__LDB_LVDS0_TX2 0x80000000 MX53_PAD_LVDS0_TX3_P__LDB_LVDS0_TX3 0x80000000 MX53_PAD_LVDS0_CLK_P__LDB_LVDS0_CLK 0x80000000 MX53_PAD_LVDS1_TX0_P__LDB_LVDS1_TX0 0x80000000 MX53_PAD_LVDS1_TX1_P__LDB_LVDS1_TX1 0x80000000 MX53_PAD_LVDS1_TX2_P__LDB_LVDS1_TX2 0x80000000 MX53_PAD_LVDS1_TX3_P__LDB_LVDS1_TX3 0x80000000 MX53_PAD_LVDS1_CLK_P__LDB_LVDS1_CLK 0x80000000 >; }; pinctrl_nand: nandgrp { fsl,pins = < MX53_PAD_NANDF_WE_B__EMI_NANDF_WE_B 0x4 MX53_PAD_NANDF_RE_B__EMI_NANDF_RE_B 0x4 MX53_PAD_NANDF_CLE__EMI_NANDF_CLE 0x4 MX53_PAD_NANDF_ALE__EMI_NANDF_ALE 0x4 MX53_PAD_NANDF_WP_B__EMI_NANDF_WP_B 0xe0 MX53_PAD_NANDF_RB0__EMI_NANDF_RB_0 0xe0 MX53_PAD_NANDF_CS0__EMI_NANDF_CS_0 0x4 MX53_PAD_PATA_DATA0__EMI_NANDF_D_0 0xa4 MX53_PAD_PATA_DATA1__EMI_NANDF_D_1 0xa4 MX53_PAD_PATA_DATA2__EMI_NANDF_D_2 0xa4 MX53_PAD_PATA_DATA3__EMI_NANDF_D_3 0xa4 MX53_PAD_PATA_DATA4__EMI_NANDF_D_4 0xa4 MX53_PAD_PATA_DATA5__EMI_NANDF_D_5 0xa4 MX53_PAD_PATA_DATA6__EMI_NANDF_D_6 0xa4 MX53_PAD_PATA_DATA7__EMI_NANDF_D_7 0xa4 >; }; pinctrl_pwm1: pwm1grp { fsl,pins = < MX53_PAD_DISP0_DAT8__PWM1_PWMO 0x5 >; }; pinctrl_uart1: uart1grp { fsl,pins = < MX53_PAD_PATA_DIOW__UART1_TXD_MUX 0x1e4 MX53_PAD_PATA_DMACK__UART1_RXD_MUX 0x1e4 >; }; pinctrl_uart2: uart2grp { fsl,pins = < MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX 0x1e4 MX53_PAD_PATA_DMARQ__UART2_TXD_MUX 0x1e4 >; }; pinctrl_uart3: uart3grp { fsl,pins = < MX53_PAD_PATA_CS_0__UART3_TXD_MUX 0x1e4 MX53_PAD_PATA_CS_1__UART3_RXD_MUX 0x1e4 MX53_PAD_PATA_DA_1__UART3_CTS 0x1e4 MX53_PAD_PATA_DA_2__UART3_RTS 0x1e4 >; }; }; }; &nfc { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_nand>; nand-bus-width = <8>; nand-ecc-mode = "hw"; status = "okay"; }; &pwm1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm1>; status = "okay"; }; &ssi2 { fsl,mode = "i2s-slave"; status = "okay"; }; &uart1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart1>; status = "okay"; }; &uart2 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart2>; status = "okay"; }; &uart3 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart3>; status = "okay"; };