From f10a04c034c7285a1b15dfa4a83d3e56578e34e8 Mon Sep 17 00:00:00 2001 From: David Gibson Date: Fri, 28 Apr 2006 15:02:51 +1000 Subject: [PATCH] powerpc: Fix pagetable bloat for hugepages At present, ARCH=powerpc kernels can waste considerable space in pagetables when making large hugepage mappings. Hugepage PTEs go in PMD pages, but each PMD page maps 256M and so contains only 16 hugepage PTEs (128 bytes of data), but takes up a 1024 byte allocation. With CONFIG_PPC_64K_PAGES enabled (64k base page size), the situation is worse. Now hugepage PTEs are at the PTE page level (also mapping 256M), so we store 16 hugepage PTEs in a 64k allocation. The PowerPC MMU already means that any 256M region is either all hugepage, or all normal pages. Thus, with some care, we can use a different allocation for the hugepage PTE tables and only allocate the 128 bytes necessary. Signed-off-by: Paul Mackerras --- include/asm-powerpc/page_64.h | 1 + include/asm-powerpc/pgalloc.h | 2 ++ 2 files changed, 3 insertions(+) (limited to 'include') diff --git a/include/asm-powerpc/page_64.h b/include/asm-powerpc/page_64.h index 3fb061bab9ec..eab779c21995 100644 --- a/include/asm-powerpc/page_64.h +++ b/include/asm-powerpc/page_64.h @@ -101,6 +101,7 @@ extern unsigned int HPAGE_SHIFT; - (1U << GET_HTLB_AREA(addr))) & 0xffff) #define ARCH_HAS_HUGEPAGE_ONLY_RANGE +#define ARCH_HAS_HUGETLB_FREE_PGD_RANGE #define ARCH_HAS_PREPARE_HUGEPAGE_RANGE #define ARCH_HAS_SETCLEAR_HUGE_PTE diff --git a/include/asm-powerpc/pgalloc.h b/include/asm-powerpc/pgalloc.h index a00ee002cd11..9f0917c68659 100644 --- a/include/asm-powerpc/pgalloc.h +++ b/include/asm-powerpc/pgalloc.h @@ -17,11 +17,13 @@ extern kmem_cache_t *pgtable_cache[]; #define PTE_CACHE_NUM 0 #define PMD_CACHE_NUM 1 #define PGD_CACHE_NUM 2 +#define HUGEPTE_CACHE_NUM 3 #else #define PTE_CACHE_NUM 0 #define PMD_CACHE_NUM 1 #define PUD_CACHE_NUM 1 #define PGD_CACHE_NUM 0 +#define HUGEPTE_CACHE_NUM 2 #endif /* -- cgit v1.2.3 From 1269277a5e7c6d7ae1852e648a8bcdb78035e9fa Mon Sep 17 00:00:00 2001 From: David Woodhouse Date: Mon, 24 Apr 2006 23:22:17 +0100 Subject: [PATCH] powerpc: Use check_legacy_ioport() on ppc32 too. Some people report that we die on some Macs when we are expecting to catch machine checks after poking at some random I/O address. I'd seen it happen on my dual G4 with serial ports until we fixed those to use OF, but now other users are reporting it with i8042. This expands the use of check_legacy_ioport() to avoid that situation even on 32-bit kernels. Signed-off-by: David Woodhouse Signed-off-by: Paul Mackerras --- arch/powerpc/kernel/setup-common.c | 8 ++++++++ arch/powerpc/kernel/setup_64.c | 8 -------- drivers/block/floppy.c | 2 +- drivers/input/serio/i8042-io.h | 4 ++-- include/asm-powerpc/io.h | 6 +++--- 5 files changed, 14 insertions(+), 14 deletions(-) (limited to 'include') diff --git a/arch/powerpc/kernel/setup-common.c b/arch/powerpc/kernel/setup-common.c index 1d93e73a7003..684ab1d49c65 100644 --- a/arch/powerpc/kernel/setup-common.c +++ b/arch/powerpc/kernel/setup-common.c @@ -516,3 +516,11 @@ void probe_machine(void) printk(KERN_INFO "Using %s machine description\n", ppc_md.name); } + +int check_legacy_ioport(unsigned long base_port) +{ + if (ppc_md.check_legacy_ioport == NULL) + return 0; + return ppc_md.check_legacy_ioport(base_port); +} +EXPORT_SYMBOL(check_legacy_ioport); diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c index 13e91c4d70a8..4467c49903b6 100644 --- a/arch/powerpc/kernel/setup_64.c +++ b/arch/powerpc/kernel/setup_64.c @@ -594,14 +594,6 @@ void ppc64_terminate_msg(unsigned int src, const char *msg) printk("[terminate]%04x %s\n", src, msg); } -int check_legacy_ioport(unsigned long base_port) -{ - if (ppc_md.check_legacy_ioport == NULL) - return 0; - return ppc_md.check_legacy_ioport(base_port); -} -EXPORT_SYMBOL(check_legacy_ioport); - void cpu_die(void) { if (ppc_md.cpu_die) diff --git a/drivers/block/floppy.c b/drivers/block/floppy.c index bedb689b051f..dff1e67b1dd4 100644 --- a/drivers/block/floppy.c +++ b/drivers/block/floppy.c @@ -4301,7 +4301,7 @@ static int __init floppy_init(void) } use_virtual_dma = can_use_virtual_dma & 1; -#if defined(CONFIG_PPC64) +#if defined(CONFIG_PPC_MERGE) if (check_legacy_ioport(FDC1)) { del_timer(&fd_timeout); err = -ENODEV; diff --git a/drivers/input/serio/i8042-io.h b/drivers/input/serio/i8042-io.h index 9a9221644250..cc21914fbc72 100644 --- a/drivers/input/serio/i8042-io.h +++ b/drivers/input/serio/i8042-io.h @@ -67,14 +67,14 @@ static inline int i8042_platform_init(void) * On some platforms touching the i8042 data register region can do really * bad things. Because of this the region is always reserved on such boxes. */ -#if !defined(__sh__) && !defined(__alpha__) && !defined(__mips__) && !defined(CONFIG_PPC64) +#if !defined(__sh__) && !defined(__alpha__) && !defined(__mips__) && !defined(CONFIG_PPC_MERGE) if (!request_region(I8042_DATA_REG, 16, "i8042")) return -EBUSY; #endif i8042_reset = 1; -#if defined(CONFIG_PPC64) +#if defined(CONFIG_PPC_MERGE) if (check_legacy_ioport(I8042_DATA_REG)) return -EBUSY; if (!request_region(I8042_DATA_REG, 16, "i8042")) diff --git a/include/asm-powerpc/io.h b/include/asm-powerpc/io.h index 68efbea379c9..f1c2469b8844 100644 --- a/include/asm-powerpc/io.h +++ b/include/asm-powerpc/io.h @@ -9,6 +9,9 @@ * 2 of the License, or (at your option) any later version. */ +/* Check of existence of legacy devices */ +extern int check_legacy_ioport(unsigned long base_port); + #ifndef CONFIG_PPC64 #include #else @@ -437,9 +440,6 @@ out: #define dma_cache_wback(_start,_size) do { } while (0) #define dma_cache_wback_inv(_start,_size) do { } while (0) -/* Check of existence of legacy devices */ -extern int check_legacy_ioport(unsigned long base_port); - /* * Convert a physical pointer to a virtual kernel pointer for /dev/mem -- cgit v1.2.3 From 30aacebed0f0619f23ce84df7c59ad033ca08d77 Mon Sep 17 00:00:00 2001 From: Eugene Surovegin Date: Tue, 25 Apr 2006 01:22:44 -0700 Subject: [PATCH] ppc32: add 440GX erratum 440_43 workaround This patch adds workaround for PPC 440GX erratum 440_43. According to this erratum spurious MachineChecks (caused by L1 cache parity) can happen during DataTLB miss processing. We disable L1 cache parity checking for 440GX rev.C and rev.F Signed-off-by: Eugene Surovegin Signed-off-by: Paul Mackerras --- arch/ppc/platforms/4xx/ocotea.c | 2 +- arch/ppc/syslib/ibm440gx_common.c | 13 ++++++++++++- arch/ppc/syslib/ibm440gx_common.h | 4 ++++ include/asm-ppc/reg_booke.h | 1 + 4 files changed, 18 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/arch/ppc/platforms/4xx/ocotea.c b/arch/ppc/platforms/4xx/ocotea.c index f841972f1fa9..554776d4b8ac 100644 --- a/arch/ppc/platforms/4xx/ocotea.c +++ b/arch/ppc/platforms/4xx/ocotea.c @@ -331,7 +331,7 @@ static void __init ocotea_init(void) void __init platform_init(unsigned long r3, unsigned long r4, unsigned long r5, unsigned long r6, unsigned long r7) { - ibm44x_platform_init(r3, r4, r5, r6, r7); + ibm440gx_platform_init(r3, r4, r5, r6, r7); ppc_md.setup_arch = ocotea_setup_arch; ppc_md.show_cpuinfo = ocotea_show_cpuinfo; diff --git a/arch/ppc/syslib/ibm440gx_common.c b/arch/ppc/syslib/ibm440gx_common.c index a7dd55f1c63e..f6cc16888527 100644 --- a/arch/ppc/syslib/ibm440gx_common.c +++ b/arch/ppc/syslib/ibm440gx_common.c @@ -2,7 +2,7 @@ * PPC440GX system library * * Eugene Surovegin or - * Copyright (c) 2003, 2004 Zultys Technologies + * Copyright (c) 2003 - 2006 Zultys Technologies * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the @@ -282,3 +282,14 @@ int ibm440gx_show_cpuinfo(struct seq_file *m){ return 0; } +void __init ibm440gx_platform_init(unsigned long r3, unsigned long r4, + unsigned long r5, unsigned long r6, + unsigned long r7) +{ + /* Erratum 440_43 workaround, disable L1 cache parity checking */ + if (!strcmp(cur_cpu_spec->cpu_name, "440GX Rev. C") || + !strcmp(cur_cpu_spec->cpu_name, "440GX Rev. F")) + mtspr(SPRN_CCR1, mfspr(SPRN_CCR1) | CCR1_DPC); + + ibm44x_platform_init(r3, r4, r5, r6, r7); +} diff --git a/arch/ppc/syslib/ibm440gx_common.h b/arch/ppc/syslib/ibm440gx_common.h index a2ab9fab8e34..a03ec6022e8f 100644 --- a/arch/ppc/syslib/ibm440gx_common.h +++ b/arch/ppc/syslib/ibm440gx_common.h @@ -29,6 +29,10 @@ void ibm440gx_get_clocks(struct ibm44x_clocks*, unsigned int sys_clk, unsigned int ser_clk) __init; +/* common 440GX platform init */ +void ibm440gx_platform_init(unsigned long r3, unsigned long r4, unsigned long r5, + unsigned long r6, unsigned long r7) __init; + /* Enable L2 cache */ void ibm440gx_l2c_enable(void) __init; diff --git a/include/asm-ppc/reg_booke.h b/include/asm-ppc/reg_booke.h index 00ad9c754c78..4944c0fb8bea 100644 --- a/include/asm-ppc/reg_booke.h +++ b/include/asm-ppc/reg_booke.h @@ -237,6 +237,7 @@ do { \ #endif /* Bit definitions for CCR1. */ +#define CCR1_DPC 0x00000100 /* Disable L1 I-Cache/D-Cache parity checking */ #define CCR1_TCS 0x00000080 /* Timer Clock Select */ /* Bit definitions for the MCSR. */ -- cgit v1.2.3 From 2833c28aa0d0326780acfa61149a2a02dcb2c9b4 Mon Sep 17 00:00:00 2001 From: Andreas Schwab Date: Thu, 27 Apr 2006 15:46:42 +0200 Subject: [PATCH] powerpc: Wire up *at syscalls Wire up *at syscalls. This patch has been tested on ppc64 (using glibc's testsuite, both 32bit and 64bit), and compile-tested for ppc32 (I have currently no ppc32 system available, but I expect no problems). Signed-off-by: Andreas Schwab Signed-off-by: Paul Mackerras --- arch/powerpc/kernel/systbl.S | 13 +++++++++++++ arch/powerpc/platforms/cell/spu_callbacks.c | 13 +++++++++++++ fs/stat.c | 2 +- include/asm-powerpc/unistd.h | 20 +++++++++++++++++++- 4 files changed, 46 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/arch/powerpc/kernel/systbl.S b/arch/powerpc/kernel/systbl.S index 0b98eea73c5e..cf56a1d499ff 100644 --- a/arch/powerpc/kernel/systbl.S +++ b/arch/powerpc/kernel/systbl.S @@ -325,6 +325,19 @@ SYSCALL(unshare) SYSCALL(splice) SYSCALL(tee) SYSCALL(vmsplice) +COMPAT_SYS(openat) +SYSCALL(mkdirat) +SYSCALL(mknodat) +SYSCALL(fchownat) +COMPAT_SYS(futimesat) +SYSX(sys_newfstatat, sys_fstatat64, sys_fstatat64) +SYSCALL(unlinkat) +SYSCALL(renameat) +SYSCALL(linkat) +SYSCALL(symlinkat) +SYSCALL(readlinkat) +SYSCALL(fchmodat) +SYSCALL(faccessat) /* * please add new calls to arch/powerpc/platforms/cell/spu_callbacks.c diff --git a/arch/powerpc/platforms/cell/spu_callbacks.c b/arch/powerpc/platforms/cell/spu_callbacks.c index b283380a2a18..95b36430aa0f 100644 --- a/arch/powerpc/platforms/cell/spu_callbacks.c +++ b/arch/powerpc/platforms/cell/spu_callbacks.c @@ -319,6 +319,19 @@ void *spu_syscall_table[] = { [__NR_splice] sys_splice, [__NR_tee] sys_tee, [__NR_vmsplice] sys_vmsplice, + [__NR_openat] sys_openat, + [__NR_mkdirat] sys_mkdirat, + [__NR_mknodat] sys_mknodat, + [__NR_fchownat] sys_fchownat, + [__NR_futimesat] sys_futimesat, + [__NR_newfstatat] sys_newfstatat, + [__NR_unlinkat] sys_unlinkat, + [__NR_renameat] sys_renameat, + [__NR_linkat] sys_linkat, + [__NR_symlinkat] sys_symlinkat, + [__NR_readlinkat] sys_readlinkat, + [__NR_fchmodat] sys_fchmodat, + [__NR_faccessat] sys_faccessat, }; long spu_sys_callback(struct spu_syscall_block *s) diff --git a/fs/stat.c b/fs/stat.c index 9948cc1685a4..0f282face322 100644 --- a/fs/stat.c +++ b/fs/stat.c @@ -261,7 +261,7 @@ asmlinkage long sys_newlstat(char __user *filename, struct stat __user *statbuf) return error; } -#ifndef __ARCH_WANT_STAT64 +#if !defined(__ARCH_WANT_STAT64) || defined(__ARCH_WANT_SYS_NEWFSTATAT) asmlinkage long sys_newfstatat(int dfd, char __user *filename, struct stat __user *statbuf, int flag) { diff --git a/include/asm-powerpc/unistd.h b/include/asm-powerpc/unistd.h index 34325e292596..908acb44cb8a 100644 --- a/include/asm-powerpc/unistd.h +++ b/include/asm-powerpc/unistd.h @@ -304,8 +304,25 @@ #define __NR_splice 283 #define __NR_tee 284 #define __NR_vmsplice 285 +#define __NR_openat 286 +#define __NR_mkdirat 287 +#define __NR_mknodat 288 +#define __NR_fchownat 289 +#define __NR_futimesat 290 +#ifdef __powerpc64__ +#define __NR_newfstatat 291 +#else +#define __NR_fstatat64 291 +#endif +#define __NR_unlinkat 292 +#define __NR_renameat 293 +#define __NR_linkat 294 +#define __NR_symlinkat 295 +#define __NR_readlinkat 296 +#define __NR_fchmodat 297 +#define __NR_faccessat 298 -#define __NR_syscalls 286 +#define __NR_syscalls 299 #ifdef __KERNEL__ #define __NR__exit __NR_exit @@ -458,6 +475,7 @@ type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5, type6 arg6 #ifdef CONFIG_PPC64 #define __ARCH_WANT_COMPAT_SYS_TIME #define __ARCH_WANT_COMPAT_SYS_RT_SIGSUSPEND +#define __ARCH_WANT_SYS_NEWFSTATAT #endif /* -- cgit v1.2.3 From a73c87bfe98f4d54c919e920a6efb0a116115722 Mon Sep 17 00:00:00 2001 From: Vitaly Bordug Date: Tue, 25 Apr 2006 20:26:33 +0400 Subject: [PATCH] ppc32: odd fixes and improvements in ppc_sys This consists of offsets fix in ..._devices.c, and update of ppc_sys_fixup_mem_resource() function to prevent subsequent fixups Signed-off-by: Vitaly Bordug Signed-off-by: Paul Mackerras --- arch/ppc/syslib/mpc8xx_devices.c | 25 +++++++++++++++++++------ arch/ppc/syslib/ppc_sys.c | 4 +++- arch/ppc/syslib/pq2_sys.c | 8 ++++---- include/asm-ppc/ppc_sys.h | 2 ++ 4 files changed, 28 insertions(+), 11 deletions(-) (limited to 'include') diff --git a/arch/ppc/syslib/mpc8xx_devices.c b/arch/ppc/syslib/mpc8xx_devices.c index bd41ed83beb3..6f536383866e 100644 --- a/arch/ppc/syslib/mpc8xx_devices.c +++ b/arch/ppc/syslib/mpc8xx_devices.c @@ -170,12 +170,18 @@ struct platform_device ppc_sys_platform_devices[] = { [MPC8xx_CPM_SMC1] = { .name = "fsl-cpm-smc", .id = 1, - .num_resources = 2, + .num_resources = 3, .resource = (struct resource[]) { { .name = "regs", - .start = 0xa82, - .end = 0xa91, + .start = 0xa80, + .end = 0xa8f, + .flags = IORESOURCE_MEM, + }, + { + .name = "pram", + .start = 0x3e80, + .end = 0x3ebf, .flags = IORESOURCE_MEM, }, { @@ -189,14 +195,21 @@ struct platform_device ppc_sys_platform_devices[] = { [MPC8xx_CPM_SMC2] = { .name = "fsl-cpm-smc", .id = 2, - .num_resources = 2, + .num_resources = 3, .resource = (struct resource[]) { { .name = "regs", - .start = 0xa92, - .end = 0xaa1, + .start = 0xa90, + .end = 0xa9f, .flags = IORESOURCE_MEM, }, + { + .name = "pram", + .start = 0x3f80, + .end = 0x3fbf, + .flags = IORESOURCE_MEM, + + }, { .name = "interrupt", .start = MPC8xx_INT_SMC2, diff --git a/arch/ppc/syslib/ppc_sys.c b/arch/ppc/syslib/ppc_sys.c index 7662c4e6e7d6..2d48018b71d9 100644 --- a/arch/ppc/syslib/ppc_sys.c +++ b/arch/ppc/syslib/ppc_sys.c @@ -109,9 +109,11 @@ ppc_sys_fixup_mem_resource(struct platform_device *pdev, phys_addr_t paddr) int i; for (i = 0; i < pdev->num_resources; i++) { struct resource *r = &pdev->resource[i]; - if ((r->flags & IORESOURCE_MEM) == IORESOURCE_MEM) { + if (((r->flags & IORESOURCE_MEM) == IORESOURCE_MEM) && + ((r->flags & PPC_SYS_IORESOURCE_FIXUPPED) != PPC_SYS_IORESOURCE_FIXUPPED)) { r->start += paddr; r->end += paddr; + r->flags |= PPC_SYS_IORESOURCE_FIXUPPED; } } } diff --git a/arch/ppc/syslib/pq2_sys.c b/arch/ppc/syslib/pq2_sys.c index 75e64f1c144d..433b0fa203e1 100644 --- a/arch/ppc/syslib/pq2_sys.c +++ b/arch/ppc/syslib/pq2_sys.c @@ -113,13 +113,13 @@ struct ppc_sys_spec ppc_sys_specs[] = { .ppc_sys_name = "8248", .mask = 0x0000ff00, .value = 0x00000c00, - .num_devices = 11, + .num_devices = 12, .device_list = (enum ppc_sys_devices[]) { MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_SCC1, - MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3, MPC82xx_CPM_SMC1, - MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, MPC82xx_CPM_I2C, - MPC82xx_CPM_USB, MPC82xx_SEC1, + MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3, MPC82xx_CPM_SCC4, + MPC82xx_CPM_SMC1, MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, + MPC82xx_CPM_I2C, MPC82xx_CPM_USB, MPC82xx_SEC1, }, }, { diff --git a/include/asm-ppc/ppc_sys.h b/include/asm-ppc/ppc_sys.h index 4b94f7059ebe..40f197af6508 100644 --- a/include/asm-ppc/ppc_sys.h +++ b/include/asm-ppc/ppc_sys.h @@ -39,6 +39,8 @@ #error "need definition of ppc_sys_devices" #endif +#define PPC_SYS_IORESOURCE_FIXUPPED 0x00000001 + struct ppc_sys_spec { /* PPC sys is matched via (ID & mask) == value, id could be * PVR, SVR, IMMR, * etc. */ -- cgit v1.2.3 From 03054d51a70e8c273df5d9bc31fea6c843eaa1c3 Mon Sep 17 00:00:00 2001 From: Anton Blanchard Date: Sat, 29 Apr 2006 09:51:06 +1000 Subject: [PATCH] powerpc: Add cputable entry for POWER6 Add a cputable entry for the POWER6 processor. The SIHV and SIPR bits in the mmcra have moved in POWER6, so disable support for that until oprofile is fixed. Also tell firmware that we know about POWER6. Signed-off-by: Anton Blanchard Signed-off-by: Paul Mackerras --- arch/powerpc/kernel/cputable.c | 16 ++++++++++++++++ arch/powerpc/kernel/prom_init.c | 1 + include/asm-powerpc/cputable.h | 14 ++++++++++---- 3 files changed, 27 insertions(+), 4 deletions(-) (limited to 'include') diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c index 39e348a3ade2..3f7182db9ed5 100644 --- a/arch/powerpc/kernel/cputable.c +++ b/arch/powerpc/kernel/cputable.c @@ -57,6 +57,8 @@ extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec); PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP) #define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\ PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP) +#define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\ + PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP) #define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \ PPC_FEATURE_BOOKE) @@ -263,6 +265,20 @@ struct cpu_spec cpu_specs[] = { .oprofile_type = PPC_OPROFILE_POWER4, .platform = "power5+", }, + { /* Power6 */ + .pvr_mask = 0xffff0000, + .pvr_value = 0x003e0000, + .cpu_name = "POWER6", + .cpu_features = CPU_FTRS_POWER6, + .cpu_user_features = COMMON_USER_POWER6, + .icache_bsize = 128, + .dcache_bsize = 128, + .num_pmcs = 6, + .cpu_setup = __setup_cpu_power4, + .oprofile_cpu_type = "ppc64/power6", + .oprofile_type = PPC_OPROFILE_POWER4, + .platform = "power6", + }, { /* Cell Broadband Engine */ .pvr_mask = 0xffff0000, .pvr_value = 0x00700000, diff --git a/arch/powerpc/kernel/prom_init.c b/arch/powerpc/kernel/prom_init.c index 00ad7f981a0d..078fb5533541 100644 --- a/arch/powerpc/kernel/prom_init.c +++ b/arch/powerpc/kernel/prom_init.c @@ -686,6 +686,7 @@ static void __init early_cmdline_parse(void) */ static unsigned char ibm_architecture_vec[] = { W(0xfffe0000), W(0x003a0000), /* POWER5/POWER5+ */ + W(0xffff0000), W(0x003e0000), /* POWER6 */ W(0xfffffffe), W(0x0f000001), /* all 2.04-compliant and earlier */ 5 - 1, /* 5 option vectors */ diff --git a/include/asm-powerpc/cputable.h b/include/asm-powerpc/cputable.h index 4321483cce51..9fcf0162d859 100644 --- a/include/asm-powerpc/cputable.h +++ b/include/asm-powerpc/cputable.h @@ -22,6 +22,7 @@ #define PPC_FEATURE_BOOKE 0x00008000 #define PPC_FEATURE_SMT 0x00004000 #define PPC_FEATURE_ICACHE_SNOOP 0x00002000 +#define PPC_FEATURE_ARCH_2_05 0x00001000 #ifdef __KERNEL__ #ifndef __ASSEMBLY__ @@ -320,6 +321,11 @@ extern void do_cpu_ftr_fixups(unsigned long offset); CPU_FTR_MMCRA | CPU_FTR_SMT | \ CPU_FTR_COHERENT_ICACHE | CPU_FTR_LOCKLESS_TLBIE | \ CPU_FTR_MMCRA_SIHV | CPU_FTR_PURR) +#define CPU_FTRS_POWER6 (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | \ + CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | \ + CPU_FTR_MMCRA | CPU_FTR_SMT | \ + CPU_FTR_COHERENT_ICACHE | CPU_FTR_LOCKLESS_TLBIE | \ + CPU_FTR_PURR | CPU_FTR_CI_LARGE_PAGE) #define CPU_FTRS_CELL (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | \ CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | \ CPU_FTR_ALTIVEC_COMP | CPU_FTR_MMCRA | CPU_FTR_SMT | \ @@ -331,8 +337,8 @@ extern void do_cpu_ftr_fixups(unsigned long offset); #ifdef __powerpc64__ #define CPU_FTRS_POSSIBLE \ (CPU_FTRS_POWER3 | CPU_FTRS_RS64 | CPU_FTRS_POWER4 | \ - CPU_FTRS_PPC970 | CPU_FTRS_POWER5 | CPU_FTRS_CELL | \ - CPU_FTR_CI_LARGE_PAGE) + CPU_FTRS_PPC970 | CPU_FTRS_POWER5 | CPU_FTRS_POWER6 | \ + CPU_FTRS_CELL | CPU_FTR_CI_LARGE_PAGE) #else enum { CPU_FTRS_POSSIBLE = @@ -376,8 +382,8 @@ enum { #ifdef __powerpc64__ #define CPU_FTRS_ALWAYS \ (CPU_FTRS_POWER3 & CPU_FTRS_RS64 & CPU_FTRS_POWER4 & \ - CPU_FTRS_PPC970 & CPU_FTRS_POWER5 & CPU_FTRS_CELL & \ - CPU_FTRS_POSSIBLE) + CPU_FTRS_PPC970 & CPU_FTRS_POWER5 & CPU_FTRS_POWER6 & \ + CPU_FTRS_CELL & CPU_FTRS_POSSIBLE) #else enum { CPU_FTRS_ALWAYS = -- cgit v1.2.3 From 543f2a3382bd7abd7380903518c61f00c7c87577 Mon Sep 17 00:00:00 2001 From: Chuck Ebbert <76306.1226@compuserve.com> Date: Sat, 29 Apr 2006 14:07:49 -0400 Subject: [PATCH] i386: fix broken FP exception handling The FXSAVE information leak patch introduced a bug in FP exception handling: it clears FP exceptions only when there are already none outstanding. Mikael Pettersson reported that causes problems with the Erlang runtime and has tested this fix. Signed-off-by: Chuck Ebbert <76306.1226@compuserve.com> Acked-by: Mikael Pettersson Signed-off-by: Linus Torvalds --- include/asm-i386/i387.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/asm-i386/i387.h b/include/asm-i386/i387.h index 7b1f01191e70..bc1d6edae1ed 100644 --- a/include/asm-i386/i387.h +++ b/include/asm-i386/i387.h @@ -58,13 +58,13 @@ static inline void __save_init_fpu( struct task_struct *tsk ) alternative_input( "fnsave %[fx] ;fwait;" GENERIC_NOP8 GENERIC_NOP4, "fxsave %[fx]\n" - "bt $7,%[fsw] ; jc 1f ; fnclex\n1:", + "bt $7,%[fsw] ; jnc 1f ; fnclex\n1:", X86_FEATURE_FXSR, [fx] "m" (tsk->thread.i387.fxsave), [fsw] "m" (tsk->thread.i387.fxsave.swd) : "memory"); /* AMD K7/K8 CPUs don't save/restore FDP/FIP/FOP unless an exception is pending. Clear the x87 state here by setting it to fixed - values. __per_cpu_offset[0] is a random variable that should be in L1 */ + values. safe_address is a random variable that should be in L1 */ alternative_input( GENERIC_NOP8 GENERIC_NOP2, "emms\n\t" /* clear stack tags */ -- cgit v1.2.3