From e879a709de0210802ba14243a168d632cb7ab527 Mon Sep 17 00:00:00 2001 From: Mika Westerberg Date: Thu, 11 Oct 2018 12:33:08 +0300 Subject: thunderbolt: Configure lanes when switch is initialized Thunderbolt 2 devices and beyond need to have additional bits set in link controller specific registers. This includes two bits in LC_SX_CTRL that tell the link controller which lane is connected and whether it is upstream facing or not. Signed-off-by: Mika Westerberg --- drivers/thunderbolt/tb_regs.h | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'drivers/thunderbolt/tb_regs.h') diff --git a/drivers/thunderbolt/tb_regs.h b/drivers/thunderbolt/tb_regs.h index 4895ae9f0b40..e0f867dad5cf 100644 --- a/drivers/thunderbolt/tb_regs.h +++ b/drivers/thunderbolt/tb_regs.h @@ -238,6 +238,17 @@ struct tb_regs_hop { } __packed; /* Common link controller registers */ +#define TB_LC_DESC 0x02 +#define TB_LC_DESC_SIZE_SHIFT 8 +#define TB_LC_DESC_SIZE_MASK GENMASK(15, 8) +#define TB_LC_DESC_PORT_SIZE_SHIFT 16 +#define TB_LC_DESC_PORT_SIZE_MASK GENMASK(27, 16) #define TB_LC_FUSE 0x03 +/* Link controller registers */ +#define TB_LC_SX_CTRL 0x96 +#define TB_LC_SX_CTRL_L1C BIT(16) +#define TB_LC_SX_CTRL_L2C BIT(20) +#define TB_LC_SX_CTRL_UPSTREAM BIT(30) + #endif -- cgit v1.2.3