From 4d146ad7388a9cca2a890d7449aeb767565068d7 Mon Sep 17 00:00:00 2001 From: Fengguang Wu Date: Sat, 9 Jun 2012 20:00:19 -0300 Subject: [media] pms: fix build error in pms_probe() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Fix a compiler breakage introduced by commit 8173090acb33: drivers/media/video/pms.c: In function ‘pms_probe’: drivers/media/video/pms.c:1047:2: error: implicit declaration of function ‘kzalloc’ [-Werror=implicit-function-declaration] drivers/media/video/pms.c:1116:2: error: implicit declaration of function ‘kfree’ [-Werror=implicit-function-declaration] Signed-off-by: Fengguang Wu Signed-off-by: Mauro Carvalho Chehab --- drivers/media/video/pms.c | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers/media/video') diff --git a/drivers/media/video/pms.c b/drivers/media/video/pms.c index af2d9086d7e8..77f9c92186f4 100644 --- a/drivers/media/video/pms.c +++ b/drivers/media/video/pms.c @@ -26,6 +26,7 @@ #include #include #include +#include #include #include #include -- cgit v1.2.3 From ce7d16a1752accbff1ff7c813594aad0b7168563 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Thu, 21 Jun 2012 10:05:56 -0300 Subject: [media] smiapp-core: fix compilation build error smiapp-core.c:2472:3: error: implicit declaration of function 'kzalloc' [-Werror=implicit-function-declaration] Signed-off-by: Mauro Carvalho Chehab --- drivers/media/video/smiapp/smiapp-core.c | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers/media/video') diff --git a/drivers/media/video/smiapp/smiapp-core.c b/drivers/media/video/smiapp/smiapp-core.c index e8c93c89265a..9cf5bda35fbe 100644 --- a/drivers/media/video/smiapp/smiapp-core.c +++ b/drivers/media/video/smiapp/smiapp-core.c @@ -31,6 +31,7 @@ #include #include #include +#include #include #include #include -- cgit v1.2.3 From b6a509df59c6abd0a2177e3be29642207711145d Mon Sep 17 00:00:00 2001 From: Randy Dunlap Date: Wed, 20 Jun 2012 21:30:30 -0300 Subject: [media] media: pms.c needs linux/slab.h drivers/media/video/pms.c uses kzalloc() and kfree() so it should include to fix build errors and a warning. drivers/media/video/pms.c:1047:2: error: implicit declaration of function 'kzalloc' drivers/media/video/pms.c:1047:6: warning: assignment makes pointer from integer without a cast drivers/media/video/pms.c:1116:2: error: implicit declaration of function 'kfree' Found in mmotm but applies to mainline. Signed-off-by: Randy Dunlap Acked-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/media/video/pms.c | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers/media/video') diff --git a/drivers/media/video/pms.c b/drivers/media/video/pms.c index 77f9c92186f4..b4c679b3fb0f 100644 --- a/drivers/media/video/pms.c +++ b/drivers/media/video/pms.c @@ -30,6 +30,7 @@ #include #include #include +#include #include #include #include -- cgit v1.2.3 From 90e614bb4c581eb588ec26f130fcdd65aa047fa8 Mon Sep 17 00:00:00 2001 From: Sylwester Nawrocki Date: Wed, 16 May 2012 11:35:04 -0300 Subject: [media] s5p-fimc: Fix bug in capture node open() When video pipeline initialization fails, the ST_CAPT_BUSY flag needs to be cleared before pm_runtime_put_sync is called. Otherwise the runtime suspend routine tries to suspend device, rather than just turning it off. Also fix potential null pointer dereference in fimc_pipeline_shutdown(). Signed-off-by: Sylwester Nawrocki Signed-off-by: Kyungmin Park Signed-off-by: Mauro Carvalho Chehab --- drivers/media/video/s5p-fimc/fimc-capture.c | 2 +- drivers/media/video/s5p-fimc/fimc-mdevice.c | 6 +++++- 2 files changed, 6 insertions(+), 2 deletions(-) (limited to 'drivers/media/video') diff --git a/drivers/media/video/s5p-fimc/fimc-capture.c b/drivers/media/video/s5p-fimc/fimc-capture.c index 354574591908..7083107c2b37 100644 --- a/drivers/media/video/s5p-fimc/fimc-capture.c +++ b/drivers/media/video/s5p-fimc/fimc-capture.c @@ -499,10 +499,10 @@ static int fimc_capture_open(struct file *file) if (ret < 0) { dev_err(&fimc->pdev->dev, "Video pipeline initialization failed\n"); + clear_bit(ST_CAPT_BUSY, &fimc->state); pm_runtime_put_sync(&fimc->pdev->dev); fimc->vid_cap.refcnt--; v4l2_fh_release(file); - clear_bit(ST_CAPT_BUSY, &fimc->state); return ret; } ret = fimc_capture_ctrls_create(fimc); diff --git a/drivers/media/video/s5p-fimc/fimc-mdevice.c b/drivers/media/video/s5p-fimc/fimc-mdevice.c index 6753c45631b8..7450dcdafc87 100644 --- a/drivers/media/video/s5p-fimc/fimc-mdevice.c +++ b/drivers/media/video/s5p-fimc/fimc-mdevice.c @@ -193,9 +193,13 @@ int __fimc_pipeline_shutdown(struct fimc_pipeline *p) int fimc_pipeline_shutdown(struct fimc_pipeline *p) { - struct media_entity *me = &p->subdevs[IDX_SENSOR]->entity; + struct media_entity *me; int ret; + if (!p || !p->subdevs[IDX_SENSOR]) + return -EINVAL; + + me = &p->subdevs[IDX_SENSOR]->entity; mutex_lock(&me->parent->graph_mutex); ret = __fimc_pipeline_shutdown(p); mutex_unlock(&me->parent->graph_mutex); -- cgit v1.2.3 From d0da3c3565a1dd3cdfa374038d6ccae4b90fe142 Mon Sep 17 00:00:00 2001 From: Sylwester Nawrocki Date: Wed, 16 May 2012 13:08:30 -0300 Subject: [media] s5p-fimc: Don't create multiple active links to same sink entity The driver is supposed to create active media link from sensor N (or its corresponding s5p-mipi-csis entity) to FIMC.N by default. Instead s5p-mipi-csis.N entity gets always connected by a default active link to FIMC.N, regardless of there are parallel bus sensor entities already connected to FIMC.N. Correct this. Signed-off-by: Sylwester Nawrocki Signed-off-by: Kyungmin Park Signed-off-by: Mauro Carvalho Chehab --- drivers/media/video/s5p-fimc/fimc-mdevice.c | 23 +++++++++++++---------- 1 file changed, 13 insertions(+), 10 deletions(-) (limited to 'drivers/media/video') diff --git a/drivers/media/video/s5p-fimc/fimc-mdevice.c b/drivers/media/video/s5p-fimc/fimc-mdevice.c index 7450dcdafc87..dffe4da5eaa0 100644 --- a/drivers/media/video/s5p-fimc/fimc-mdevice.c +++ b/drivers/media/video/s5p-fimc/fimc-mdevice.c @@ -502,12 +502,12 @@ static void fimc_md_unregister_entities(struct fimc_md *fmd) * @source: the source entity to create links to all fimc entities from * @sensor: sensor subdev linked to FIMC[fimc_id] entity, may be null * @pad: the source entity pad index - * @fimc_id: index of the fimc device for which link should be enabled + * @link_mask: bitmask of the fimc devices for which link should be enabled */ static int __fimc_md_create_fimc_sink_links(struct fimc_md *fmd, struct media_entity *source, struct v4l2_subdev *sensor, - int pad, int fimc_id) + int pad, int link_mask) { struct fimc_sensor_info *s_info; struct media_entity *sink; @@ -524,7 +524,7 @@ static int __fimc_md_create_fimc_sink_links(struct fimc_md *fmd, if (!fmd->fimc[i]->variant->has_cam_if) continue; - flags = (i == fimc_id) ? MEDIA_LNK_FL_ENABLED : 0; + flags = ((1 << i) & link_mask) ? MEDIA_LNK_FL_ENABLED : 0; sink = &fmd->fimc[i]->vid_cap.subdev.entity; ret = media_entity_create_link(source, pad, sink, @@ -556,7 +556,10 @@ static int __fimc_md_create_fimc_sink_links(struct fimc_md *fmd, if (!fmd->fimc_lite[i]) continue; - flags = (i == fimc_id) ? MEDIA_LNK_FL_ENABLED : 0; + if (link_mask & (1 << (i + FIMC_MAX_DEVS))) + flags = MEDIA_LNK_FL_ENABLED; + else + flags = 0; sink = &fmd->fimc_lite[i]->subdev.entity; ret = media_entity_create_link(source, pad, sink, @@ -618,9 +621,8 @@ static int fimc_md_create_links(struct fimc_md *fmd) struct s5p_fimc_isp_info *pdata; struct fimc_sensor_info *s_info; struct media_entity *source, *sink; - int i, pad, fimc_id = 0; - int ret = 0; - u32 flags; + int i, pad, fimc_id = 0, ret = 0; + u32 flags, link_mask = 0; for (i = 0; i < fmd->num_sensors; i++) { if (fmd->sensor[i].subdev == NULL) @@ -672,19 +674,20 @@ static int fimc_md_create_links(struct fimc_md *fmd) if (source == NULL) continue; + link_mask = 1 << fimc_id++; ret = __fimc_md_create_fimc_sink_links(fmd, source, sensor, - pad, fimc_id++); + pad, link_mask); } - fimc_id = 0; for (i = 0; i < ARRAY_SIZE(fmd->csis); i++) { if (fmd->csis[i].sd == NULL) continue; source = &fmd->csis[i].sd->entity; pad = CSIS_PAD_SOURCE; + link_mask = 1 << fimc_id++; ret = __fimc_md_create_fimc_sink_links(fmd, source, NULL, - pad, fimc_id++); + pad, link_mask); } /* Create immutable links between each FIMC's subdev and video node */ -- cgit v1.2.3 From d547ab66e275e2f6bf703572e943018ef7c391c5 Mon Sep 17 00:00:00 2001 From: Sylwester Nawrocki Date: Wed, 16 May 2012 15:00:26 -0300 Subject: [media] s5p-fimc: Honour sizeimage in VIDIOC_S_FMT Allow memory buffer size to be increased by means of struct v4l2_pix_plane_format::sizeimage at VIDIOC_S_FMT ioctl. Signed-off-by: Sylwester Nawrocki Signed-off-by: Kyungmin Park Signed-off-by: Mauro Carvalho Chehab --- drivers/media/video/s5p-fimc/fimc-capture.c | 7 ++++--- drivers/media/video/s5p-fimc/fimc-core.c | 9 +++++---- 2 files changed, 9 insertions(+), 7 deletions(-) (limited to 'drivers/media/video') diff --git a/drivers/media/video/s5p-fimc/fimc-capture.c b/drivers/media/video/s5p-fimc/fimc-capture.c index 7083107c2b37..13df7230c8d8 100644 --- a/drivers/media/video/s5p-fimc/fimc-capture.c +++ b/drivers/media/video/s5p-fimc/fimc-capture.c @@ -350,7 +350,8 @@ static int queue_setup(struct vb2_queue *vq, const struct v4l2_format *pfmt, if (pixm) sizes[i] = max(size, pixm->plane_fmt[i].sizeimage); else - sizes[i] = size; + sizes[i] = max_t(u32, size, frame->payload[i]); + allocators[i] = ctx->fimc_dev->alloc_ctx; } @@ -924,10 +925,10 @@ static int fimc_capture_set_format(struct fimc_dev *fimc, struct v4l2_format *f) pix->width = mf->width; pix->height = mf->height; } + fimc_adjust_mplane_format(ff->fmt, pix->width, pix->height, pix); for (i = 0; i < ff->fmt->colplanes; i++) - ff->payload[i] = - (pix->width * pix->height * ff->fmt->depth[i]) / 8; + ff->payload[i] = pix->plane_fmt[i].sizeimage; set_frame_bounds(ff, pix->width, pix->height); /* Reset the composition rectangle if not yet configured */ diff --git a/drivers/media/video/s5p-fimc/fimc-core.c b/drivers/media/video/s5p-fimc/fimc-core.c index 92fc5a20fb76..65124a24c30f 100644 --- a/drivers/media/video/s5p-fimc/fimc-core.c +++ b/drivers/media/video/s5p-fimc/fimc-core.c @@ -741,8 +741,8 @@ void fimc_adjust_mplane_format(struct fimc_fmt *fmt, u32 width, u32 height, pix->width = width; for (i = 0; i < pix->num_planes; ++i) { - u32 bpl = pix->plane_fmt[i].bytesperline; - u32 *sizeimage = &pix->plane_fmt[i].sizeimage; + struct v4l2_plane_pix_format *plane_fmt = &pix->plane_fmt[i]; + u32 bpl = plane_fmt->bytesperline; if (fmt->colplanes > 1 && (bpl == 0 || bpl < pix->width)) bpl = pix->width; /* Planar */ @@ -754,8 +754,9 @@ void fimc_adjust_mplane_format(struct fimc_fmt *fmt, u32 width, u32 height, if (i == 0) /* Same bytesperline for each plane. */ bytesperline = bpl; - pix->plane_fmt[i].bytesperline = bytesperline; - *sizeimage = (pix->width * pix->height * fmt->depth[i]) / 8; + plane_fmt->bytesperline = bytesperline; + plane_fmt->sizeimage = max((pix->width * pix->height * + fmt->depth[i]) / 8, plane_fmt->sizeimage); } } -- cgit v1.2.3 From 0b4b1f199d367762ddb68cb3303431fa6c84a7d6 Mon Sep 17 00:00:00 2001 From: Sylwester Nawrocki Date: Wed, 16 May 2012 15:03:50 -0300 Subject: [media] s5p-fimc: Remove superfluous checks for buffer type The checks are already done at the v4l2 framework. Signed-off-by: Sylwester Nawrocki Signed-off-by: Kyungmin Park Signed-off-by: Mauro Carvalho Chehab --- drivers/media/video/s5p-fimc/fimc-capture.c | 8 -------- 1 file changed, 8 deletions(-) (limited to 'drivers/media/video') diff --git a/drivers/media/video/s5p-fimc/fimc-capture.c b/drivers/media/video/s5p-fimc/fimc-capture.c index 13df7230c8d8..0fd12dfbd3db 100644 --- a/drivers/media/video/s5p-fimc/fimc-capture.c +++ b/drivers/media/video/s5p-fimc/fimc-capture.c @@ -819,9 +819,6 @@ static int fimc_cap_g_fmt_mplane(struct file *file, void *fh, struct fimc_dev *fimc = video_drvdata(file); struct fimc_ctx *ctx = fimc->vid_cap.ctx; - if (f->type != V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) - return -EINVAL; - return fimc_fill_format(&ctx->d_frame, f); } @@ -834,9 +831,6 @@ static int fimc_cap_try_fmt_mplane(struct file *file, void *fh, struct v4l2_mbus_framefmt mf; struct fimc_fmt *ffmt = NULL; - if (f->type != V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) - return -EINVAL; - if (pix->pixelformat == V4L2_PIX_FMT_JPEG) { fimc_capture_try_format(ctx, &pix->width, &pix->height, NULL, &pix->pixelformat, @@ -888,8 +882,6 @@ static int fimc_capture_set_format(struct fimc_dev *fimc, struct v4l2_format *f) struct fimc_fmt *s_fmt = NULL; int ret, i; - if (f->type != V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) - return -EINVAL; if (vb2_is_busy(&fimc->vid_cap.vbq)) return -EBUSY; -- cgit v1.2.3 From e3fc82e8b9f550d28f05600b98bcc8c26beef2ef Mon Sep 17 00:00:00 2001 From: Sylwester Nawrocki Date: Thu, 17 May 2012 14:22:10 -0300 Subject: [media] s5p-fimc: Prevent lock-up in multiple sensor systems The camera clocks managed by the driver were improperly reference counted and remained disabled when multiple video nodes were opened simultaneously. It manifested itself with following warning: [12.920000] WARNING: at drivers/media/video/s5p-fimc/fimc-mdevice.c:787 __fimc_md_set_camclk+0x1c0/0x1dc() [13.005000] Modules linked in: [13.005000] Backtrace: [13.040000] [] (dump_backtrace+0x0/0x10c) from [] (dump_stack+0x18/0x1c) [13.070000] r7:00000009 r6:00000313 r5:c02d576c r4:00000000 [13.155000] [] (dump_stack+0x0/0x1c) from [] (warn_slowpath_common+0x54/0x6c) [13.285000] [] (warn_slowpath_common+0x0/0x6c) from [] (warn_slowpath_null+0x24/0x2c) [13.360000] r9:e1981010 r8:00000000 r7:c061d3fc r6:e1981010 r5:e1981030 [13.430000] r4:00000000 [13.430000] [] (warn_slowpath_null+0x0/0x2c) from [] (__fimc_md_set_camclk+0x1c0/0x1dc) [13.550000] [] (__fimc_md_set_camclk+0x0/0x1dc) from [] (fimc_md_set_camclk+0x28/0x2c) [13.630000] [] (fimc_md_set_camclk+0x0/0x2c) from [] (__fimc_pipeline_shutdown+0x34/0x50) [13.705000] [] (__fimc_pipeline_shutdown+0x0/0x50) from [] (fimc_pipeline_shutdown+0x40/0x58) [13.765000] r5:e2391200 r4:e2357704 [13.805000] [] (fimc_pipeline_shutdown+0x0/0x58) from [] (fimc_capture_close+0xcc/0xe4) [13.915000] r5:e1b396c0 r4:e2357410 [13.915000] [] (fimc_capture_close+0x0/0xe4) from [] (v4l2_release+0x5c/0x80) [13.970000] r7:00000010 r6:e1d2d990 r5:e1b396c0 r4:e2394800 [14.000000] [] (v4l2_release+0x0/0x80) from [] (fput+0xc0/0x22c) [14.015000] r5:c157ef30 r4:e1b396c0 [14.015000] [] (fput+0x0/0x22c) from [] (filp_close+0x60/0x80) [14.080000] [] (filp_close+0x0/0x80) from [] (sys_close+0xb8/0xf4) [14.125000] r7:00000001 r6:e1b396c0 r5:c1400340 r4:c1400300 [14.125000] [] (sys_close+0x0/0xf4) from [] (ret_fast_syscall+0x0/0x30) [14.205000] r7:00000006 r6:beee5b94 r5:00000003 r4:b6f64fac Fix this, as well as potential memory leaks due to not calling v4l2_fh_release() on some error paths. Also remove some error logs printed for events that aren't critical and are normal conditions for some system configurations. Also check if the device have been properly run-time enabled during video node open. Signed-off-by: Sylwester Nawrocki Signed-off-by: Kyungmin Park Signed-off-by: Mauro Carvalho Chehab --- drivers/media/video/s5p-fimc/fimc-capture.c | 46 +++++++++++++++-------------- drivers/media/video/s5p-fimc/fimc-lite.c | 14 +++++---- drivers/media/video/s5p-fimc/fimc-mdevice.c | 19 ++++-------- drivers/media/video/s5p-fimc/fimc-mdevice.h | 2 -- 4 files changed, 38 insertions(+), 43 deletions(-) (limited to 'drivers/media/video') diff --git a/drivers/media/video/s5p-fimc/fimc-capture.c b/drivers/media/video/s5p-fimc/fimc-capture.c index 0fd12dfbd3db..71e483847a17 100644 --- a/drivers/media/video/s5p-fimc/fimc-capture.c +++ b/drivers/media/video/s5p-fimc/fimc-capture.c @@ -480,37 +480,39 @@ static int fimc_capture_set_default_format(struct fimc_dev *fimc); static int fimc_capture_open(struct file *file) { struct fimc_dev *fimc = video_drvdata(file); - int ret = v4l2_fh_open(file); - - if (ret) - return ret; + int ret; dbg("pid: %d, state: 0x%lx", task_pid_nr(current), fimc->state); - /* Return if the corresponding video mem2mem node is already opened. */ if (fimc_m2m_active(fimc)) return -EBUSY; set_bit(ST_CAPT_BUSY, &fimc->state); - pm_runtime_get_sync(&fimc->pdev->dev); - - if (++fimc->vid_cap.refcnt == 1) { - ret = fimc_pipeline_initialize(&fimc->pipeline, - &fimc->vid_cap.vfd->entity, true); - if (ret < 0) { - dev_err(&fimc->pdev->dev, - "Video pipeline initialization failed\n"); - clear_bit(ST_CAPT_BUSY, &fimc->state); - pm_runtime_put_sync(&fimc->pdev->dev); - fimc->vid_cap.refcnt--; - v4l2_fh_release(file); - return ret; - } - ret = fimc_capture_ctrls_create(fimc); + ret = pm_runtime_get_sync(&fimc->pdev->dev); + if (ret < 0) + return ret; + + ret = v4l2_fh_open(file); + if (ret) + return ret; + + if (++fimc->vid_cap.refcnt != 1) + return 0; - if (!ret && !fimc->vid_cap.user_subdev_api) - ret = fimc_capture_set_default_format(fimc); + ret = fimc_pipeline_initialize(&fimc->pipeline, + &fimc->vid_cap.vfd->entity, true); + if (ret < 0) { + clear_bit(ST_CAPT_BUSY, &fimc->state); + pm_runtime_put_sync(&fimc->pdev->dev); + fimc->vid_cap.refcnt--; + v4l2_fh_release(file); + return ret; } + ret = fimc_capture_ctrls_create(fimc); + + if (!ret && !fimc->vid_cap.user_subdev_api) + ret = fimc_capture_set_default_format(fimc); + return ret; } diff --git a/drivers/media/video/s5p-fimc/fimc-lite.c b/drivers/media/video/s5p-fimc/fimc-lite.c index 400d701aef04..bbe93e4a8731 100644 --- a/drivers/media/video/s5p-fimc/fimc-lite.c +++ b/drivers/media/video/s5p-fimc/fimc-lite.c @@ -451,21 +451,23 @@ static void fimc_lite_clear_event_counters(struct fimc_lite *fimc) static int fimc_lite_open(struct file *file) { struct fimc_lite *fimc = video_drvdata(file); - int ret = v4l2_fh_open(file); - - if (ret) - return ret; + int ret; set_bit(ST_FLITE_IN_USE, &fimc->state); - pm_runtime_get_sync(&fimc->pdev->dev); + ret = pm_runtime_get_sync(&fimc->pdev->dev); + if (ret < 0) + return ret; if (++fimc->ref_count != 1 || fimc->out_path != FIMC_IO_DMA) + return 0; + + ret = v4l2_fh_open(file); + if (ret < 0) return ret; ret = fimc_pipeline_initialize(&fimc->pipeline, &fimc->vfd->entity, true); if (ret < 0) { - v4l2_err(fimc->vfd, "Video pipeline initialization failed\n"); pm_runtime_put_sync(&fimc->pdev->dev); fimc->ref_count--; v4l2_fh_release(file); diff --git a/drivers/media/video/s5p-fimc/fimc-mdevice.c b/drivers/media/video/s5p-fimc/fimc-mdevice.c index dffe4da5eaa0..52cef4865423 100644 --- a/drivers/media/video/s5p-fimc/fimc-mdevice.c +++ b/drivers/media/video/s5p-fimc/fimc-mdevice.c @@ -741,8 +741,8 @@ static void fimc_md_put_clocks(struct fimc_md *fmd) } static int __fimc_md_set_camclk(struct fimc_md *fmd, - struct fimc_sensor_info *s_info, - bool on) + struct fimc_sensor_info *s_info, + bool on) { struct s5p_fimc_isp_info *pdata = s_info->pdata; struct fimc_camclk_info *camclk; @@ -751,12 +751,10 @@ static int __fimc_md_set_camclk(struct fimc_md *fmd, if (WARN_ON(pdata->clk_id >= FIMC_MAX_CAMCLKS) || fmd == NULL) return -EINVAL; - if (s_info->clk_on == on) - return 0; camclk = &fmd->camclk[pdata->clk_id]; - dbg("camclk %d, f: %lu, clk: %p, on: %d", - pdata->clk_id, pdata->clk_frequency, camclk, on); + dbg("camclk %d, f: %lu, use_count: %d, on: %d", + pdata->clk_id, pdata->clk_frequency, camclk->use_count, on); if (on) { if (camclk->use_count > 0 && @@ -767,11 +765,9 @@ static int __fimc_md_set_camclk(struct fimc_md *fmd, clk_set_rate(camclk->clock, pdata->clk_frequency); camclk->frequency = pdata->clk_frequency; ret = clk_enable(camclk->clock); + dbg("Enabled camclk %d: f: %lu", pdata->clk_id, + clk_get_rate(camclk->clock)); } - s_info->clk_on = 1; - dbg("Enabled camclk %d: f: %lu", pdata->clk_id, - clk_get_rate(camclk->clock)); - return ret; } @@ -780,7 +776,6 @@ static int __fimc_md_set_camclk(struct fimc_md *fmd, if (--camclk->use_count == 0) { clk_disable(camclk->clock); - s_info->clk_on = 0; dbg("Disabled camclk %d", pdata->clk_id); } return ret; @@ -796,8 +791,6 @@ static int __fimc_md_set_camclk(struct fimc_md *fmd, * devices to which sensors can be attached, either directly or through * the MIPI CSI receiver. The clock is allowed here to be used by * multiple sensors concurrently if they use same frequency. - * The per sensor subdev clk_on attribute helps to synchronize accesses - * to the sclk_cam clocks from the video and media device nodes. * This function should only be called when the graph mutex is held. */ int fimc_md_set_camclk(struct v4l2_subdev *sd, bool on) diff --git a/drivers/media/video/s5p-fimc/fimc-mdevice.h b/drivers/media/video/s5p-fimc/fimc-mdevice.h index 3b8a3492a176..1f5dbaff5442 100644 --- a/drivers/media/video/s5p-fimc/fimc-mdevice.h +++ b/drivers/media/video/s5p-fimc/fimc-mdevice.h @@ -47,7 +47,6 @@ struct fimc_camclk_info { * @pdata: sensor's atrributes passed as media device's platform data * @subdev: image sensor v4l2 subdev * @host: fimc device the sensor is currently linked to - * @clk_on: sclk_cam clock's state associated with this subdev * * This data structure applies to image sensor and the writeback subdevs. */ @@ -55,7 +54,6 @@ struct fimc_sensor_info { struct s5p_fimc_isp_info *pdata; struct v4l2_subdev *subdev; struct fimc_dev *host; - bool clk_on; }; /** -- cgit v1.2.3 From 316efab3e949e4fbdacb0975bf33adbad89115db Mon Sep 17 00:00:00 2001 From: Sylwester Nawrocki Date: Fri, 18 May 2012 13:31:28 -0300 Subject: [media] s5p-fimc: Fix fimc-lite system wide suspend procedure Only suspend the video pipeline devices if they were active before the pm.suspend() helper is called. This patch prevents following error: /# echo mem > /sys/power/state [ 34.965000] PM: Syncing filesystems ... done. [ 35.035000] Freezing user space processes ... (elapsed 0.01 seconds) done. ... [ 35.105000] dpm_run_callback(): platform_pm_suspend+0x0/0x5c returns -22 [ 35.105000] PM: Device exynos-fimc-lite.1 failed to suspend: error -22 [ 35.105000] PM: Some devices failed to suspend Signed-off-by: Sylwester Nawrocki Signed-off-by: Kyungmin Park Signed-off-by: Mauro Carvalho Chehab --- drivers/media/video/s5p-fimc/fimc-lite.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers/media/video') diff --git a/drivers/media/video/s5p-fimc/fimc-lite.c b/drivers/media/video/s5p-fimc/fimc-lite.c index bbe93e4a8731..b0a8ce61ebf2 100644 --- a/drivers/media/video/s5p-fimc/fimc-lite.c +++ b/drivers/media/video/s5p-fimc/fimc-lite.c @@ -1510,7 +1510,7 @@ static int fimc_lite_suspend(struct device *dev) return 0; ret = fimc_lite_stop_capture(fimc, suspend); - if (ret) + if (ret < 0 || !fimc_lite_active(fimc)) return ret; return fimc_pipeline_shutdown(&fimc->pipeline); -- cgit v1.2.3 From 0a198bcd511fcc60dc5daa203d221aafc95e0471 Mon Sep 17 00:00:00 2001 From: Sylwester Nawrocki Date: Tue, 22 May 2012 13:50:14 -0300 Subject: [media] s5p-fimc: Shorten pixel formats description Shorten pixel format descriptions that exceed 32 characters so they're not being truncated when queried from user space. Signed-off-by: Sylwester Nawrocki Signed-off-by: Kyungmin Park Signed-off-by: Mauro Carvalho Chehab --- drivers/media/video/s5p-fimc/fimc-core.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'drivers/media/video') diff --git a/drivers/media/video/s5p-fimc/fimc-core.c b/drivers/media/video/s5p-fimc/fimc-core.c index 65124a24c30f..987bff20cc34 100644 --- a/drivers/media/video/s5p-fimc/fimc-core.c +++ b/drivers/media/video/s5p-fimc/fimc-core.c @@ -153,7 +153,7 @@ static struct fimc_fmt fimc_formats[] = { .colplanes = 2, .flags = FMT_FLAGS_M2M, }, { - .name = "YUV 4:2:0 non-contiguous 2-planar, Y/CbCr", + .name = "YUV 4:2:0 non-contig. 2p, Y/CbCr", .fourcc = V4L2_PIX_FMT_NV12M, .color = FIMC_FMT_YCBCR420, .depth = { 8, 4 }, @@ -161,7 +161,7 @@ static struct fimc_fmt fimc_formats[] = { .colplanes = 2, .flags = FMT_FLAGS_M2M, }, { - .name = "YUV 4:2:0 non-contiguous 3-planar, Y/Cb/Cr", + .name = "YUV 4:2:0 non-contig. 3p, Y/Cb/Cr", .fourcc = V4L2_PIX_FMT_YUV420M, .color = FIMC_FMT_YCBCR420, .depth = { 8, 2, 2 }, @@ -169,7 +169,7 @@ static struct fimc_fmt fimc_formats[] = { .colplanes = 3, .flags = FMT_FLAGS_M2M, }, { - .name = "YUV 4:2:0 non-contiguous 2-planar, Y/CbCr, tiled", + .name = "YUV 4:2:0 non-contig. 2p, tiled", .fourcc = V4L2_PIX_FMT_NV12MT, .color = FIMC_FMT_YCBCR420, .depth = { 8, 4 }, -- cgit v1.2.3 From 8183e7a7e2a4b542bd3044c5e3b0e116b0a7d2a1 Mon Sep 17 00:00:00 2001 From: Sylwester Nawrocki Date: Fri, 25 May 2012 07:04:01 -0300 Subject: [media] s5p-fimc: Update to the control handler lock changes MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Commit 77e7c4e624404c6edb5686b3d5f873c6008ed6b0 "v4l: Allow changing control handler lock" changed the lock field of struct v4l2_ctrl_handler to a pointer and this driver wasn't updated properly. This patch fixes following warning: drivers/media/video/s5p-fimc/fimc-core.c: In function ‘fimc_ctrls_activate’: drivers/media/video/s5p-fimc/fimc-core.c:644: warning: passing argument 1 of ‘mutex_lock’ from incompatible pointer type include/linux/mutex.h:152: note: expected ‘struct mutex *’ but argument is of type ‘struct mutex **’ drivers/media/video/s5p-fimc/fimc-core.c:663: warning: passing argument 1 of ‘mutex_unlock’ from incompatible pointer type include/linux/mutex.h:169: note: expected ‘struct mutex *’ but argument is of type ‘struct mutex **’ Signed-off-by: Sylwester Nawrocki Signed-off-by: Kyungmin Park Signed-off-by: Mauro Carvalho Chehab --- drivers/media/video/s5p-fimc/fimc-core.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'drivers/media/video') diff --git a/drivers/media/video/s5p-fimc/fimc-core.c b/drivers/media/video/s5p-fimc/fimc-core.c index 987bff20cc34..a4646ca1d56f 100644 --- a/drivers/media/video/s5p-fimc/fimc-core.c +++ b/drivers/media/video/s5p-fimc/fimc-core.c @@ -641,7 +641,7 @@ void fimc_ctrls_activate(struct fimc_ctx *ctx, bool active) if (!ctrls->ready) return; - mutex_lock(&ctrls->handler.lock); + mutex_lock(ctrls->handler.lock); v4l2_ctrl_activate(ctrls->rotate, active); v4l2_ctrl_activate(ctrls->hflip, active); v4l2_ctrl_activate(ctrls->vflip, active); @@ -660,7 +660,7 @@ void fimc_ctrls_activate(struct fimc_ctx *ctx, bool active) ctx->hflip = 0; ctx->vflip = 0; } - mutex_unlock(&ctrls->handler.lock); + mutex_unlock(ctrls->handler.lock); } /* Update maximum value of the alpha color control */ -- cgit v1.2.3 From a60a295986edcbca6603cd42b4e38d7c83d87fb6 Mon Sep 17 00:00:00 2001 From: Sakari Ailus Date: Fri, 25 May 2012 07:08:05 -0300 Subject: [media] s5p-fimc: media_entity_pipeline_start() may fail Take into account media_entity_pipeline_start() may fail. [s.nawrocki: rebased onto latest tree] Signed-off-by: Sakari Ailus Signed-off-by: Sylwester Nawrocki Signed-off-by: Mauro Carvalho Chehab --- drivers/media/video/s5p-fimc/fimc-capture.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'drivers/media/video') diff --git a/drivers/media/video/s5p-fimc/fimc-capture.c b/drivers/media/video/s5p-fimc/fimc-capture.c index 71e483847a17..7ace324d30cd 100644 --- a/drivers/media/video/s5p-fimc/fimc-capture.c +++ b/drivers/media/video/s5p-fimc/fimc-capture.c @@ -1045,8 +1045,10 @@ static int fimc_cap_streamon(struct file *file, void *priv, if (fimc_capture_active(fimc)) return -EBUSY; - media_entity_pipeline_start(&p->subdevs[IDX_SENSOR]->entity, + ret = media_entity_pipeline_start(&p->subdevs[IDX_SENSOR]->entity, p->m_pipeline); + if (ret < 0) + return ret; if (fimc->vid_cap.user_subdev_api) { ret = fimc_pipeline_validate(fimc); -- cgit v1.2.3 From a1a5861bd9ca3a6cb7ab89dd836da8cd158986b0 Mon Sep 17 00:00:00 2001 From: Sachin Kamat Date: Fri, 25 May 2012 03:29:38 -0300 Subject: [media] s5p-fimc: Fix compiler warning in fimc-lite.c MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This patch is an update to changed media_entity_pipeline_start() signature in commit af88be3887c1a0b20d0792c3c237a67c73ef3286, "media: Add link_validate() op to check links to the sink pad" It fixes the following warning: drivers/media/video/s5p-fimc/fimc-lite.c: In function ‘fimc_lite_streamon’: drivers/media/video/s5p-fimc/fimc-lite.c:765:29: warning: ignoring return value of ‘media_entity_pipeline_start’, declared with attribute warn_unused_result [-Wunused-result] Signed-off-by: Sachin Kamat Signed-off-by: Sylwester Nawrocki Signed-off-by: Mauro Carvalho Chehab --- drivers/media/video/s5p-fimc/fimc-lite.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'drivers/media/video') diff --git a/drivers/media/video/s5p-fimc/fimc-lite.c b/drivers/media/video/s5p-fimc/fimc-lite.c index b0a8ce61ebf2..4d269b8fa1ef 100644 --- a/drivers/media/video/s5p-fimc/fimc-lite.c +++ b/drivers/media/video/s5p-fimc/fimc-lite.c @@ -764,7 +764,9 @@ static int fimc_lite_streamon(struct file *file, void *priv, if (fimc_lite_active(fimc)) return -EBUSY; - media_entity_pipeline_start(&sensor->entity, p->m_pipeline); + ret = media_entity_pipeline_start(&sensor->entity, p->m_pipeline); + if (ret < 0) + return ret; ret = fimc_pipeline_validate(fimc); if (ret) { -- cgit v1.2.3 From f676fa068819357f716953920b764554fe116b3c Mon Sep 17 00:00:00 2001 From: Sachin Kamat Date: Fri, 25 May 2012 03:29:40 -0300 Subject: [media] s5p-fimc: Stop media entity pipeline if fimc_pipeline_validate fails Stops the media entity pipeline which was started earlier if fimc_pipeline_validate fails. [s.nawrocki: reworked to not exceed 80 characters line length] Signed-off-by: Sachin Kamat Signed-off-by: Sylwester Nawrocki Signed-off-by: Mauro Carvalho Chehab --- drivers/media/video/s5p-fimc/fimc-capture.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) (limited to 'drivers/media/video') diff --git a/drivers/media/video/s5p-fimc/fimc-capture.c b/drivers/media/video/s5p-fimc/fimc-capture.c index 7ace324d30cd..725812aa0c30 100644 --- a/drivers/media/video/s5p-fimc/fimc-capture.c +++ b/drivers/media/video/s5p-fimc/fimc-capture.c @@ -1040,20 +1040,22 @@ static int fimc_cap_streamon(struct file *file, void *priv, { struct fimc_dev *fimc = video_drvdata(file); struct fimc_pipeline *p = &fimc->pipeline; + struct v4l2_subdev *sd = p->subdevs[IDX_SENSOR]; int ret; if (fimc_capture_active(fimc)) return -EBUSY; - ret = media_entity_pipeline_start(&p->subdevs[IDX_SENSOR]->entity, - p->m_pipeline); + ret = media_entity_pipeline_start(&sd->entity, p->m_pipeline); if (ret < 0) return ret; if (fimc->vid_cap.user_subdev_api) { ret = fimc_pipeline_validate(fimc); - if (ret) + if (ret < 0) { + media_entity_pipeline_stop(&sd->entity); return ret; + } } return vb2_streamon(&fimc->vid_cap.vbq, type); } -- cgit v1.2.3 From 6ac7d11527a31d01b566a5c45369180e326ff4f1 Mon Sep 17 00:00:00 2001 From: Paul Bolle Date: Wed, 6 Jun 2012 14:17:46 +0200 Subject: treewide: Put a space between #include and FILE Signed-off-by: Paul Bolle Signed-off-by: Jiri Kosina --- arch/arm/plat-samsung/include/plat/gpio-cfg.h | 2 +- arch/ia64/kernel/ia64_ksyms.c | 2 +- arch/ia64/kvm/vmm.c | 6 +++--- arch/parisc/include/asm/compat_rt_sigframe.h | 6 +++--- drivers/media/video/zoran/zr36016.c | 4 ++-- drivers/net/wireless/iwlwifi/iwl-io.c | 2 +- drivers/scsi/aha1542.c | 2 +- drivers/staging/comedi/drivers/s626.h | 2 +- 8 files changed, 13 insertions(+), 13 deletions(-) (limited to 'drivers/media/video') diff --git a/arch/arm/plat-samsung/include/plat/gpio-cfg.h b/arch/arm/plat-samsung/include/plat/gpio-cfg.h index df8155b9d4d1..08740eed050c 100644 --- a/arch/arm/plat-samsung/include/plat/gpio-cfg.h +++ b/arch/arm/plat-samsung/include/plat/gpio-cfg.h @@ -24,7 +24,7 @@ #ifndef __PLAT_GPIO_CFG_H #define __PLAT_GPIO_CFG_H __FILE__ -#include +#include typedef unsigned int __bitwise__ samsung_gpio_pull_t; typedef unsigned int __bitwise__ s5p_gpio_drvstr_t; diff --git a/arch/ia64/kernel/ia64_ksyms.c b/arch/ia64/kernel/ia64_ksyms.c index 7f4a0ed24152..5b7791dd3965 100644 --- a/arch/ia64/kernel/ia64_ksyms.c +++ b/arch/ia64/kernel/ia64_ksyms.c @@ -12,7 +12,7 @@ EXPORT_SYMBOL(memset); EXPORT_SYMBOL(memcpy); EXPORT_SYMBOL(strlen); -#include +#include EXPORT_SYMBOL_GPL(empty_zero_page); #include diff --git a/arch/ia64/kvm/vmm.c b/arch/ia64/kvm/vmm.c index f0b9cac82414..176a12cd56de 100644 --- a/arch/ia64/kvm/vmm.c +++ b/arch/ia64/kvm/vmm.c @@ -20,9 +20,9 @@ */ -#include -#include -#include +#include +#include +#include #include "vcpu.h" diff --git a/arch/parisc/include/asm/compat_rt_sigframe.h b/arch/parisc/include/asm/compat_rt_sigframe.h index 81bec28bdc48..b3f95a7f18b4 100644 --- a/arch/parisc/include/asm/compat_rt_sigframe.h +++ b/arch/parisc/include/asm/compat_rt_sigframe.h @@ -1,6 +1,6 @@ -#include -#include -#include +#include +#include +#include #ifndef _ASM_PARISC_COMPAT_RT_SIGFRAME_H #define _ASM_PARISC_COMPAT_RT_SIGFRAME_H diff --git a/drivers/media/video/zoran/zr36016.c b/drivers/media/video/zoran/zr36016.c index 21c088ea9046..b87ddba8608f 100644 --- a/drivers/media/video/zoran/zr36016.c +++ b/drivers/media/video/zoran/zr36016.c @@ -40,10 +40,10 @@ /* v4l API */ /* headerfile of this module */ -#include"zr36016.h" +#include "zr36016.h" /* codec io API */ -#include"videocodec.h" +#include "videocodec.h" /* it doesn't make sense to have more than 20 or so, just to prevent some unwanted loops */ diff --git a/drivers/net/wireless/iwlwifi/iwl-io.c b/drivers/net/wireless/iwlwifi/iwl-io.c index 081dd34d2387..0f8b8aa9e8d7 100644 --- a/drivers/net/wireless/iwlwifi/iwl-io.c +++ b/drivers/net/wireless/iwlwifi/iwl-io.c @@ -29,7 +29,7 @@ #include #include "iwl-io.h" -#include"iwl-csr.h" +#include "iwl-csr.h" #include "iwl-debug.h" #define IWL_POLL_INTERVAL 10 /* microseconds */ diff --git a/drivers/scsi/aha1542.c b/drivers/scsi/aha1542.c index f79c8f9e33a4..770c48ddbe5e 100644 --- a/drivers/scsi/aha1542.c +++ b/drivers/scsi/aha1542.c @@ -49,7 +49,7 @@ #define SCSI_BUF_PA(address) isa_virt_to_bus(address) #define SCSI_SG_PA(sgent) (isa_page_to_bus(sg_page((sgent))) + (sgent)->offset) -#include +#include #ifdef DEBUG #define DEB(x) x diff --git a/drivers/staging/comedi/drivers/s626.h b/drivers/staging/comedi/drivers/s626.h index 2d1afecbbb60..92d3ea5eb44d 100644 --- a/drivers/staging/comedi/drivers/s626.h +++ b/drivers/staging/comedi/drivers/s626.h @@ -80,7 +80,7 @@ #define INLINE static __inline #endif -#include +#include #define S626_SIZE 0x0200 #define SIZEOF_ADDRESS_SPACE 0x0200 -- cgit v1.2.3 From 8842a9e2869cae14bbb8184004a42fc3070587fb Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Thu, 14 Jun 2012 11:16:14 +0800 Subject: ARM: imx: enable SPARSE_IRQ for imx platform As all irqchips on imx have been changed to allocate their irq_descs, and all unneeded mach/irqs.h inclusions on imx have been cleaned up, now it's time to select SPARSE_IRQ for imx/mxc. The SPARSE_IRQ support forces irqs allocation starting from 16. All those static irq number definition for SoCs need to shift 16 to keep non-DT boot works. With all those static IRQ number and start definitions removed from mach/irqs.h, the header becomes just a container of a couple of mach-imx specific irq/fiq calls. Since mach/irqs.h is not included by asm/irq.h now, the users of mxc_set_irq_fiq needs to explicitly include mach/irqs.h themselves. Signed-off-by: Shawn Guo Acked-by: Sascha Hauer --- arch/arm/Kconfig | 1 + arch/arm/plat-mxc/include/mach/irqs.h | 44 ------- arch/arm/plat-mxc/include/mach/mx1.h | 111 ++++++++--------- arch/arm/plat-mxc/include/mach/mx21.h | 107 ++++++++--------- arch/arm/plat-mxc/include/mach/mx25.h | 72 +++++------ arch/arm/plat-mxc/include/mach/mx27.h | 127 ++++++++++---------- arch/arm/plat-mxc/include/mach/mx2x.h | 87 +++++++------- arch/arm/plat-mxc/include/mach/mx31.h | 118 +++++++++--------- arch/arm/plat-mxc/include/mach/mx35.h | 109 ++++++++--------- arch/arm/plat-mxc/include/mach/mx3x.h | 77 ++++++------ arch/arm/plat-mxc/include/mach/mx50.h | 187 ++++++++++++++--------------- arch/arm/plat-mxc/include/mach/mx51.h | 209 ++++++++++++++++---------------- arch/arm/plat-mxc/include/mach/mx53.h | 217 +++++++++++++++++----------------- drivers/media/video/mx1_camera.c | 1 + sound/soc/fsl/imx-pcm-fiq.c | 1 + 15 files changed, 722 insertions(+), 746 deletions(-) (limited to 'drivers/media/video') diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 84449dd8f031..63f40b43b062 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -446,6 +446,7 @@ config ARCH_MXC select CLKSRC_MMIO select GENERIC_IRQ_CHIP select MULTI_IRQ_HANDLER + select SPARSE_IRQ help Support for Freescale MXC/iMX-based family of processors diff --git a/arch/arm/plat-mxc/include/mach/irqs.h b/arch/arm/plat-mxc/include/mach/irqs.h index fd9efb044656..d73f5e8ea9cb 100644 --- a/arch/arm/plat-mxc/include/mach/irqs.h +++ b/arch/arm/plat-mxc/include/mach/irqs.h @@ -11,50 +11,6 @@ #ifndef __ASM_ARCH_MXC_IRQS_H__ #define __ASM_ARCH_MXC_IRQS_H__ -#include - -/* - * SoCs with GIC interrupt controller have 160 IRQs, those with TZIC - * have 128 IRQs, and those with AVIC have 64. - * - * To support single image, the biggest number should be defined on - * top of the list. - */ -#if defined CONFIG_ARM_GIC -#define MXC_INTERNAL_IRQS 160 -#elif defined CONFIG_MXC_TZIC -#define MXC_INTERNAL_IRQS 128 -#else -#define MXC_INTERNAL_IRQS 64 -#endif - -#define MXC_GPIO_IRQ_START MXC_INTERNAL_IRQS - -/* - * The next 16 interrupts are for board specific purposes. Since - * the kernel can only run on one machine at a time, we can re-use - * these. If you need more, increase MXC_BOARD_IRQS, but keep it - * within sensible limits. - */ -#define MXC_BOARD_IRQ_START (MXC_INTERNAL_IRQS + ARCH_NR_GPIOS) - -#ifdef CONFIG_MACH_MX31ADS_WM1133_EV1 -#define MXC_BOARD_IRQS 80 -#else -#define MXC_BOARD_IRQS 16 -#endif - -#define MXC_IPU_IRQ_START (MXC_BOARD_IRQ_START + MXC_BOARD_IRQS) - -#ifdef CONFIG_MX3_IPU_IRQS -#define MX3_IPU_IRQS CONFIG_MX3_IPU_IRQS -#else -#define MX3_IPU_IRQS 0 -#endif -/* REVISIT: Add IPU irqs on IMX51 */ - -#define NR_IRQS (MXC_IPU_IRQ_START + MX3_IPU_IRQS) - extern int imx_irq_set_priority(unsigned char irq, unsigned char prio); /* all normal IRQs can be FIQs */ diff --git a/arch/arm/plat-mxc/include/mach/mx1.h b/arch/arm/plat-mxc/include/mach/mx1.h index 2b7c08d13e89..45bd31cc34d6 100644 --- a/arch/arm/plat-mxc/include/mach/mx1.h +++ b/arch/arm/plat-mxc/include/mach/mx1.h @@ -78,61 +78,62 @@ #define MX1_IO_ADDRESS(x) IOMEM(MX1_IO_P2V(x)) /* fixed interrput numbers */ -#define MX1_INT_SOFTINT 0 -#define MX1_INT_CSI 6 -#define MX1_DSPA_MAC_INT 7 -#define MX1_DSPA_INT 8 -#define MX1_COMP_INT 9 -#define MX1_MSHC_XINT 10 -#define MX1_GPIO_INT_PORTA 11 -#define MX1_GPIO_INT_PORTB 12 -#define MX1_GPIO_INT_PORTC 13 -#define MX1_INT_LCDC 14 -#define MX1_SIM_INT 15 -#define MX1_SIM_DATA_INT 16 -#define MX1_RTC_INT 17 -#define MX1_RTC_SAMINT 18 -#define MX1_INT_UART2PFERR 19 -#define MX1_INT_UART2RTS 20 -#define MX1_INT_UART2DTR 21 -#define MX1_INT_UART2UARTC 22 -#define MX1_INT_UART2TX 23 -#define MX1_INT_UART2RX 24 -#define MX1_INT_UART1PFERR 25 -#define MX1_INT_UART1RTS 26 -#define MX1_INT_UART1DTR 27 -#define MX1_INT_UART1UARTC 28 -#define MX1_INT_UART1TX 29 -#define MX1_INT_UART1RX 30 -#define MX1_VOICE_DAC_INT 31 -#define MX1_VOICE_ADC_INT 32 -#define MX1_PEN_DATA_INT 33 -#define MX1_PWM_INT 34 -#define MX1_SDHC_INT 35 -#define MX1_INT_I2C 39 -#define MX1_INT_CSPI2 40 -#define MX1_INT_CSPI1 41 -#define MX1_SSI_TX_INT 42 -#define MX1_SSI_TX_ERR_INT 43 -#define MX1_SSI_RX_INT 44 -#define MX1_SSI_RX_ERR_INT 45 -#define MX1_TOUCH_INT 46 -#define MX1_INT_USBD0 47 -#define MX1_INT_USBD1 48 -#define MX1_INT_USBD2 49 -#define MX1_INT_USBD3 50 -#define MX1_INT_USBD4 51 -#define MX1_INT_USBD5 52 -#define MX1_INT_USBD6 53 -#define MX1_BTSYS_INT 55 -#define MX1_BTTIM_INT 56 -#define MX1_BTWUI_INT 57 -#define MX1_TIM2_INT 58 -#define MX1_TIM1_INT 59 -#define MX1_DMA_ERR 60 -#define MX1_DMA_INT 61 -#define MX1_GPIO_INT_PORTD 62 -#define MX1_WDT_INT 63 +#include +#define MX1_INT_SOFTINT (NR_IRQS_LEGACY + 0) +#define MX1_INT_CSI (NR_IRQS_LEGACY + 6) +#define MX1_DSPA_MAC_INT (NR_IRQS_LEGACY + 7) +#define MX1_DSPA_INT (NR_IRQS_LEGACY + 8) +#define MX1_COMP_INT (NR_IRQS_LEGACY + 9) +#define MX1_MSHC_XINT (NR_IRQS_LEGACY + 10) +#define MX1_GPIO_INT_PORTA (NR_IRQS_LEGACY + 11) +#define MX1_GPIO_INT_PORTB (NR_IRQS_LEGACY + 12) +#define MX1_GPIO_INT_PORTC (NR_IRQS_LEGACY + 13) +#define MX1_INT_LCDC (NR_IRQS_LEGACY + 14) +#define MX1_SIM_INT (NR_IRQS_LEGACY + 15) +#define MX1_SIM_DATA_INT (NR_IRQS_LEGACY + 16) +#define MX1_RTC_INT (NR_IRQS_LEGACY + 17) +#define MX1_RTC_SAMINT (NR_IRQS_LEGACY + 18) +#define MX1_INT_UART2PFERR (NR_IRQS_LEGACY + 19) +#define MX1_INT_UART2RTS (NR_IRQS_LEGACY + 20) +#define MX1_INT_UART2DTR (NR_IRQS_LEGACY + 21) +#define MX1_INT_UART2UARTC (NR_IRQS_LEGACY + 22) +#define MX1_INT_UART2TX (NR_IRQS_LEGACY + 23) +#define MX1_INT_UART2RX (NR_IRQS_LEGACY + 24) +#define MX1_INT_UART1PFERR (NR_IRQS_LEGACY + 25) +#define MX1_INT_UART1RTS (NR_IRQS_LEGACY + 26) +#define MX1_INT_UART1DTR (NR_IRQS_LEGACY + 27) +#define MX1_INT_UART1UARTC (NR_IRQS_LEGACY + 28) +#define MX1_INT_UART1TX (NR_IRQS_LEGACY + 29) +#define MX1_INT_UART1RX (NR_IRQS_LEGACY + 30) +#define MX1_VOICE_DAC_INT (NR_IRQS_LEGACY + 31) +#define MX1_VOICE_ADC_INT (NR_IRQS_LEGACY + 32) +#define MX1_PEN_DATA_INT (NR_IRQS_LEGACY + 33) +#define MX1_PWM_INT (NR_IRQS_LEGACY + 34) +#define MX1_SDHC_INT (NR_IRQS_LEGACY + 35) +#define MX1_INT_I2C (NR_IRQS_LEGACY + 39) +#define MX1_INT_CSPI2 (NR_IRQS_LEGACY + 40) +#define MX1_INT_CSPI1 (NR_IRQS_LEGACY + 41) +#define MX1_SSI_TX_INT (NR_IRQS_LEGACY + 42) +#define MX1_SSI_TX_ERR_INT (NR_IRQS_LEGACY + 43) +#define MX1_SSI_RX_INT (NR_IRQS_LEGACY + 44) +#define MX1_SSI_RX_ERR_INT (NR_IRQS_LEGACY + 45) +#define MX1_TOUCH_INT (NR_IRQS_LEGACY + 46) +#define MX1_INT_USBD0 (NR_IRQS_LEGACY + 47) +#define MX1_INT_USBD1 (NR_IRQS_LEGACY + 48) +#define MX1_INT_USBD2 (NR_IRQS_LEGACY + 49) +#define MX1_INT_USBD3 (NR_IRQS_LEGACY + 50) +#define MX1_INT_USBD4 (NR_IRQS_LEGACY + 51) +#define MX1_INT_USBD5 (NR_IRQS_LEGACY + 52) +#define MX1_INT_USBD6 (NR_IRQS_LEGACY + 53) +#define MX1_BTSYS_INT (NR_IRQS_LEGACY + 55) +#define MX1_BTTIM_INT (NR_IRQS_LEGACY + 56) +#define MX1_BTWUI_INT (NR_IRQS_LEGACY + 57) +#define MX1_TIM2_INT (NR_IRQS_LEGACY + 58) +#define MX1_TIM1_INT (NR_IRQS_LEGACY + 59) +#define MX1_DMA_ERR (NR_IRQS_LEGACY + 60) +#define MX1_DMA_INT (NR_IRQS_LEGACY + 61) +#define MX1_GPIO_INT_PORTD (NR_IRQS_LEGACY + 62) +#define MX1_WDT_INT (NR_IRQS_LEGACY + 63) /* DMA */ #define MX1_DMA_REQ_UART3_T 2 diff --git a/arch/arm/plat-mxc/include/mach/mx21.h b/arch/arm/plat-mxc/include/mach/mx21.h index 6cd049ebbd8d..468738aa997f 100644 --- a/arch/arm/plat-mxc/include/mach/mx21.h +++ b/arch/arm/plat-mxc/include/mach/mx21.h @@ -99,59 +99,60 @@ #define MX21_IO_ADDRESS(x) IOMEM(MX21_IO_P2V(x)) /* fixed interrupt numbers */ -#define MX21_INT_CSPI3 6 -#define MX21_INT_GPIO 8 -#define MX21_INT_FIRI 9 -#define MX21_INT_SDHC2 10 -#define MX21_INT_SDHC1 11 -#define MX21_INT_I2C 12 -#define MX21_INT_SSI2 13 -#define MX21_INT_SSI1 14 -#define MX21_INT_CSPI2 15 -#define MX21_INT_CSPI1 16 -#define MX21_INT_UART4 17 -#define MX21_INT_UART3 18 -#define MX21_INT_UART2 19 -#define MX21_INT_UART1 20 -#define MX21_INT_KPP 21 -#define MX21_INT_RTC 22 -#define MX21_INT_PWM 23 -#define MX21_INT_GPT3 24 -#define MX21_INT_GPT2 25 -#define MX21_INT_GPT1 26 -#define MX21_INT_WDOG 27 -#define MX21_INT_PCMCIA 28 -#define MX21_INT_NFC 29 -#define MX21_INT_BMI 30 -#define MX21_INT_CSI 31 -#define MX21_INT_DMACH0 32 -#define MX21_INT_DMACH1 33 -#define MX21_INT_DMACH2 34 -#define MX21_INT_DMACH3 35 -#define MX21_INT_DMACH4 36 -#define MX21_INT_DMACH5 37 -#define MX21_INT_DMACH6 38 -#define MX21_INT_DMACH7 39 -#define MX21_INT_DMACH8 40 -#define MX21_INT_DMACH9 41 -#define MX21_INT_DMACH10 42 -#define MX21_INT_DMACH11 43 -#define MX21_INT_DMACH12 44 -#define MX21_INT_DMACH13 45 -#define MX21_INT_DMACH14 46 -#define MX21_INT_DMACH15 47 -#define MX21_INT_EMMAENC 49 -#define MX21_INT_EMMADEC 50 -#define MX21_INT_EMMAPRP 51 -#define MX21_INT_EMMAPP 52 -#define MX21_INT_USBWKUP 53 -#define MX21_INT_USBDMA 54 -#define MX21_INT_USBHOST 55 -#define MX21_INT_USBFUNC 56 -#define MX21_INT_USBMNP 57 -#define MX21_INT_USBCTRL 58 -#define MX21_INT_SLCDC 60 -#define MX21_INT_LCDC 61 +#include +#define MX21_INT_CSPI3 (NR_IRQS_LEGACY + 6) +#define MX21_INT_GPIO (NR_IRQS_LEGACY + 8) +#define MX21_INT_FIRI (NR_IRQS_LEGACY + 9) +#define MX21_INT_SDHC2 (NR_IRQS_LEGACY + 10) +#define MX21_INT_SDHC1 (NR_IRQS_LEGACY + 11) +#define MX21_INT_I2C (NR_IRQS_LEGACY + 12) +#define MX21_INT_SSI2 (NR_IRQS_LEGACY + 13) +#define MX21_INT_SSI1 (NR_IRQS_LEGACY + 14) +#define MX21_INT_CSPI2 (NR_IRQS_LEGACY + 15) +#define MX21_INT_CSPI1 (NR_IRQS_LEGACY + 16) +#define MX21_INT_UART4 (NR_IRQS_LEGACY + 17) +#define MX21_INT_UART3 (NR_IRQS_LEGACY + 18) +#define MX21_INT_UART2 (NR_IRQS_LEGACY + 19) +#define MX21_INT_UART1 (NR_IRQS_LEGACY + 20) +#define MX21_INT_KPP (NR_IRQS_LEGACY + 21) +#define MX21_INT_RTC (NR_IRQS_LEGACY + 22) +#define MX21_INT_PWM (NR_IRQS_LEGACY + 23) +#define MX21_INT_GPT3 (NR_IRQS_LEGACY + 24) +#define MX21_INT_GPT2 (NR_IRQS_LEGACY + 25) +#define MX21_INT_GPT1 (NR_IRQS_LEGACY + 26) +#define MX21_INT_WDOG (NR_IRQS_LEGACY + 27) +#define MX21_INT_PCMCIA (NR_IRQS_LEGACY + 28) +#define MX21_INT_NFC (NR_IRQS_LEGACY + 29) +#define MX21_INT_BMI (NR_IRQS_LEGACY + 30) +#define MX21_INT_CSI (NR_IRQS_LEGACY + 31) +#define MX21_INT_DMACH0 (NR_IRQS_LEGACY + 32) +#define MX21_INT_DMACH1 (NR_IRQS_LEGACY + 33) +#define MX21_INT_DMACH2 (NR_IRQS_LEGACY + 34) +#define MX21_INT_DMACH3 (NR_IRQS_LEGACY + 35) +#define MX21_INT_DMACH4 (NR_IRQS_LEGACY + 36) +#define MX21_INT_DMACH5 (NR_IRQS_LEGACY + 37) +#define MX21_INT_DMACH6 (NR_IRQS_LEGACY + 38) +#define MX21_INT_DMACH7 (NR_IRQS_LEGACY + 39) +#define MX21_INT_DMACH8 (NR_IRQS_LEGACY + 40) +#define MX21_INT_DMACH9 (NR_IRQS_LEGACY + 41) +#define MX21_INT_DMACH10 (NR_IRQS_LEGACY + 42) +#define MX21_INT_DMACH11 (NR_IRQS_LEGACY + 43) +#define MX21_INT_DMACH12 (NR_IRQS_LEGACY + 44) +#define MX21_INT_DMACH13 (NR_IRQS_LEGACY + 45) +#define MX21_INT_DMACH14 (NR_IRQS_LEGACY + 46) +#define MX21_INT_DMACH15 (NR_IRQS_LEGACY + 47) +#define MX21_INT_EMMAENC (NR_IRQS_LEGACY + 49) +#define MX21_INT_EMMADEC (NR_IRQS_LEGACY + 50) +#define MX21_INT_EMMAPRP (NR_IRQS_LEGACY + 51) +#define MX21_INT_EMMAPP (NR_IRQS_LEGACY + 52) +#define MX21_INT_USBWKUP (NR_IRQS_LEGACY + 53) +#define MX21_INT_USBDMA (NR_IRQS_LEGACY + 54) +#define MX21_INT_USBHOST (NR_IRQS_LEGACY + 55) +#define MX21_INT_USBFUNC (NR_IRQS_LEGACY + 56) +#define MX21_INT_USBMNP (NR_IRQS_LEGACY + 57) +#define MX21_INT_USBCTRL (NR_IRQS_LEGACY + 58) +#define MX21_INT_SLCDC (NR_IRQS_LEGACY + 60) +#define MX21_INT_LCDC (NR_IRQS_LEGACY + 61) /* fixed DMA request numbers */ #define MX21_DMA_REQ_CSPI3_RX 1 diff --git a/arch/arm/plat-mxc/include/mach/mx25.h b/arch/arm/plat-mxc/include/mach/mx25.h index ccebf5ba12f0..627d94f1b010 100644 --- a/arch/arm/plat-mxc/include/mach/mx25.h +++ b/arch/arm/plat-mxc/include/mach/mx25.h @@ -61,40 +61,44 @@ #define MX25_IO_P2V(x) IMX_IO_P2V(x) #define MX25_IO_ADDRESS(x) IOMEM(MX25_IO_P2V(x)) -#define MX25_INT_CSPI3 0 -#define MX25_INT_I2C1 3 -#define MX25_INT_I2C2 4 -#define MX25_INT_UART4 5 -#define MX25_INT_ESDHC2 8 -#define MX25_INT_ESDHC1 9 -#define MX25_INT_I2C3 10 -#define MX25_INT_SSI2 11 -#define MX25_INT_SSI1 12 -#define MX25_INT_CSPI2 13 -#define MX25_INT_CSPI1 14 -#define MX25_INT_GPIO3 16 -#define MX25_INT_CSI 17 -#define MX25_INT_UART3 18 -#define MX25_INT_GPIO4 23 -#define MX25_INT_KPP 24 -#define MX25_INT_DRYICE 25 -#define MX25_INT_PWM1 26 -#define MX25_INT_UART2 32 -#define MX25_INT_NFC 33 -#define MX25_INT_SDMA 34 -#define MX25_INT_USB_HS 35 -#define MX25_INT_PWM2 36 -#define MX25_INT_USB_OTG 37 -#define MX25_INT_LCDC 39 -#define MX25_INT_UART5 40 -#define MX25_INT_PWM3 41 -#define MX25_INT_PWM4 42 -#define MX25_INT_CAN1 43 -#define MX25_INT_CAN2 44 -#define MX25_INT_UART1 45 -#define MX25_INT_GPIO2 51 -#define MX25_INT_GPIO1 52 -#define MX25_INT_FEC 57 +/* + * Interrupt numbers + */ +#include +#define MX25_INT_CSPI3 (NR_IRQS_LEGACY + 0) +#define MX25_INT_I2C1 (NR_IRQS_LEGACY + 3) +#define MX25_INT_I2C2 (NR_IRQS_LEGACY + 4) +#define MX25_INT_UART4 (NR_IRQS_LEGACY + 5) +#define MX25_INT_ESDHC2 (NR_IRQS_LEGACY + 8) +#define MX25_INT_ESDHC1 (NR_IRQS_LEGACY + 9) +#define MX25_INT_I2C3 (NR_IRQS_LEGACY + 10) +#define MX25_INT_SSI2 (NR_IRQS_LEGACY + 11) +#define MX25_INT_SSI1 (NR_IRQS_LEGACY + 12) +#define MX25_INT_CSPI2 (NR_IRQS_LEGACY + 13) +#define MX25_INT_CSPI1 (NR_IRQS_LEGACY + 14) +#define MX25_INT_GPIO3 (NR_IRQS_LEGACY + 16) +#define MX25_INT_CSI (NR_IRQS_LEGACY + 17) +#define MX25_INT_UART3 (NR_IRQS_LEGACY + 18) +#define MX25_INT_GPIO4 (NR_IRQS_LEGACY + 23) +#define MX25_INT_KPP (NR_IRQS_LEGACY + 24) +#define MX25_INT_DRYICE (NR_IRQS_LEGACY + 25) +#define MX25_INT_PWM1 (NR_IRQS_LEGACY + 26) +#define MX25_INT_UART2 (NR_IRQS_LEGACY + 32) +#define MX25_INT_NFC (NR_IRQS_LEGACY + 33) +#define MX25_INT_SDMA (NR_IRQS_LEGACY + 34) +#define MX25_INT_USB_HS (NR_IRQS_LEGACY + 35) +#define MX25_INT_PWM2 (NR_IRQS_LEGACY + 36) +#define MX25_INT_USB_OTG (NR_IRQS_LEGACY + 37) +#define MX25_INT_LCDC (NR_IRQS_LEGACY + 39) +#define MX25_INT_UART5 (NR_IRQS_LEGACY + 40) +#define MX25_INT_PWM3 (NR_IRQS_LEGACY + 41) +#define MX25_INT_PWM4 (NR_IRQS_LEGACY + 42) +#define MX25_INT_CAN1 (NR_IRQS_LEGACY + 43) +#define MX25_INT_CAN2 (NR_IRQS_LEGACY + 44) +#define MX25_INT_UART1 (NR_IRQS_LEGACY + 45) +#define MX25_INT_GPIO2 (NR_IRQS_LEGACY + 51) +#define MX25_INT_GPIO1 (NR_IRQS_LEGACY + 52) +#define MX25_INT_FEC (NR_IRQS_LEGACY + 57) #define MX25_DMA_REQ_SSI2_RX1 22 #define MX25_DMA_REQ_SSI2_TX1 23 diff --git a/arch/arm/plat-mxc/include/mach/mx27.h b/arch/arm/plat-mxc/include/mach/mx27.h index 6265357284d7..e074616d54ca 100644 --- a/arch/arm/plat-mxc/include/mach/mx27.h +++ b/arch/arm/plat-mxc/include/mach/mx27.h @@ -128,69 +128,70 @@ #define MX27_IO_ADDRESS(x) IOMEM(MX27_IO_P2V(x)) /* fixed interrupt numbers */ -#define MX27_INT_I2C2 1 -#define MX27_INT_GPT6 2 -#define MX27_INT_GPT5 3 -#define MX27_INT_GPT4 4 -#define MX27_INT_RTIC 5 -#define MX27_INT_CSPI3 6 -#define MX27_INT_SDHC 7 -#define MX27_INT_GPIO 8 -#define MX27_INT_SDHC3 9 -#define MX27_INT_SDHC2 10 -#define MX27_INT_SDHC1 11 -#define MX27_INT_I2C1 12 -#define MX27_INT_SSI2 13 -#define MX27_INT_SSI1 14 -#define MX27_INT_CSPI2 15 -#define MX27_INT_CSPI1 16 -#define MX27_INT_UART4 17 -#define MX27_INT_UART3 18 -#define MX27_INT_UART2 19 -#define MX27_INT_UART1 20 -#define MX27_INT_KPP 21 -#define MX27_INT_RTC 22 -#define MX27_INT_PWM 23 -#define MX27_INT_GPT3 24 -#define MX27_INT_GPT2 25 -#define MX27_INT_GPT1 26 -#define MX27_INT_WDOG 27 -#define MX27_INT_PCMCIA 28 -#define MX27_INT_NFC 29 -#define MX27_INT_ATA 30 -#define MX27_INT_CSI 31 -#define MX27_INT_DMACH0 32 -#define MX27_INT_DMACH1 33 -#define MX27_INT_DMACH2 34 -#define MX27_INT_DMACH3 35 -#define MX27_INT_DMACH4 36 -#define MX27_INT_DMACH5 37 -#define MX27_INT_DMACH6 38 -#define MX27_INT_DMACH7 39 -#define MX27_INT_DMACH8 40 -#define MX27_INT_DMACH9 41 -#define MX27_INT_DMACH10 42 -#define MX27_INT_DMACH11 43 -#define MX27_INT_DMACH12 44 -#define MX27_INT_DMACH13 45 -#define MX27_INT_DMACH14 46 -#define MX27_INT_DMACH15 47 -#define MX27_INT_UART6 48 -#define MX27_INT_UART5 49 -#define MX27_INT_FEC 50 -#define MX27_INT_EMMAPRP 51 -#define MX27_INT_EMMAPP 52 -#define MX27_INT_VPU 53 -#define MX27_INT_USB_HS1 54 -#define MX27_INT_USB_HS2 55 -#define MX27_INT_USB_OTG 56 -#define MX27_INT_SCC_SMN 57 -#define MX27_INT_SCC_SCM 58 -#define MX27_INT_SAHARA 59 -#define MX27_INT_SLCDC 60 -#define MX27_INT_LCDC 61 -#define MX27_INT_IIM 62 -#define MX27_INT_CCM 63 +#include +#define MX27_INT_I2C2 (NR_IRQS_LEGACY + 1) +#define MX27_INT_GPT6 (NR_IRQS_LEGACY + 2) +#define MX27_INT_GPT5 (NR_IRQS_LEGACY + 3) +#define MX27_INT_GPT4 (NR_IRQS_LEGACY + 4) +#define MX27_INT_RTIC (NR_IRQS_LEGACY + 5) +#define MX27_INT_CSPI3 (NR_IRQS_LEGACY + 6) +#define MX27_INT_SDHC (NR_IRQS_LEGACY + 7) +#define MX27_INT_GPIO (NR_IRQS_LEGACY + 8) +#define MX27_INT_SDHC3 (NR_IRQS_LEGACY + 9) +#define MX27_INT_SDHC2 (NR_IRQS_LEGACY + 10) +#define MX27_INT_SDHC1 (NR_IRQS_LEGACY + 11) +#define MX27_INT_I2C1 (NR_IRQS_LEGACY + 12) +#define MX27_INT_SSI2 (NR_IRQS_LEGACY + 13) +#define MX27_INT_SSI1 (NR_IRQS_LEGACY + 14) +#define MX27_INT_CSPI2 (NR_IRQS_LEGACY + 15) +#define MX27_INT_CSPI1 (NR_IRQS_LEGACY + 16) +#define MX27_INT_UART4 (NR_IRQS_LEGACY + 17) +#define MX27_INT_UART3 (NR_IRQS_LEGACY + 18) +#define MX27_INT_UART2 (NR_IRQS_LEGACY + 19) +#define MX27_INT_UART1 (NR_IRQS_LEGACY + 20) +#define MX27_INT_KPP (NR_IRQS_LEGACY + 21) +#define MX27_INT_RTC (NR_IRQS_LEGACY + 22) +#define MX27_INT_PWM (NR_IRQS_LEGACY + 23) +#define MX27_INT_GPT3 (NR_IRQS_LEGACY + 24) +#define MX27_INT_GPT2 (NR_IRQS_LEGACY + 25) +#define MX27_INT_GPT1 (NR_IRQS_LEGACY + 26) +#define MX27_INT_WDOG (NR_IRQS_LEGACY + 27) +#define MX27_INT_PCMCIA (NR_IRQS_LEGACY + 28) +#define MX27_INT_NFC (NR_IRQS_LEGACY + 29) +#define MX27_INT_ATA (NR_IRQS_LEGACY + 30) +#define MX27_INT_CSI (NR_IRQS_LEGACY + 31) +#define MX27_INT_DMACH0 (NR_IRQS_LEGACY + 32) +#define MX27_INT_DMACH1 (NR_IRQS_LEGACY + 33) +#define MX27_INT_DMACH2 (NR_IRQS_LEGACY + 34) +#define MX27_INT_DMACH3 (NR_IRQS_LEGACY + 35) +#define MX27_INT_DMACH4 (NR_IRQS_LEGACY + 36) +#define MX27_INT_DMACH5 (NR_IRQS_LEGACY + 37) +#define MX27_INT_DMACH6 (NR_IRQS_LEGACY + 38) +#define MX27_INT_DMACH7 (NR_IRQS_LEGACY + 39) +#define MX27_INT_DMACH8 (NR_IRQS_LEGACY + 40) +#define MX27_INT_DMACH9 (NR_IRQS_LEGACY + 41) +#define MX27_INT_DMACH10 (NR_IRQS_LEGACY + 42) +#define MX27_INT_DMACH11 (NR_IRQS_LEGACY + 43) +#define MX27_INT_DMACH12 (NR_IRQS_LEGACY + 44) +#define MX27_INT_DMACH13 (NR_IRQS_LEGACY + 45) +#define MX27_INT_DMACH14 (NR_IRQS_LEGACY + 46) +#define MX27_INT_DMACH15 (NR_IRQS_LEGACY + 47) +#define MX27_INT_UART6 (NR_IRQS_LEGACY + 48) +#define MX27_INT_UART5 (NR_IRQS_LEGACY + 49) +#define MX27_INT_FEC (NR_IRQS_LEGACY + 50) +#define MX27_INT_EMMAPRP (NR_IRQS_LEGACY + 51) +#define MX27_INT_EMMAPP (NR_IRQS_LEGACY + 52) +#define MX27_INT_VPU (NR_IRQS_LEGACY + 53) +#define MX27_INT_USB_HS1 (NR_IRQS_LEGACY + 54) +#define MX27_INT_USB_HS2 (NR_IRQS_LEGACY + 55) +#define MX27_INT_USB_OTG (NR_IRQS_LEGACY + 56) +#define MX27_INT_SCC_SMN (NR_IRQS_LEGACY + 57) +#define MX27_INT_SCC_SCM (NR_IRQS_LEGACY + 58) +#define MX27_INT_SAHARA (NR_IRQS_LEGACY + 59) +#define MX27_INT_SLCDC (NR_IRQS_LEGACY + 60) +#define MX27_INT_LCDC (NR_IRQS_LEGACY + 61) +#define MX27_INT_IIM (NR_IRQS_LEGACY + 62) +#define MX27_INT_CCM (NR_IRQS_LEGACY + 63) /* fixed DMA request numbers */ #define MX27_DMA_REQ_CSPI3_RX 1 diff --git a/arch/arm/plat-mxc/include/mach/mx2x.h b/arch/arm/plat-mxc/include/mach/mx2x.h index 6d07839fdec2..11642f5b224c 100644 --- a/arch/arm/plat-mxc/include/mach/mx2x.h +++ b/arch/arm/plat-mxc/include/mach/mx2x.h @@ -68,49 +68,50 @@ #define MX2x_CSI_BASE_ADDR (MX2x_SAHB1_BASE_ADDR + 0x0000) /* fixed interrupt numbers */ -#define MX2x_INT_CSPI3 6 -#define MX2x_INT_GPIO 8 -#define MX2x_INT_SDHC2 10 -#define MX2x_INT_SDHC1 11 -#define MX2x_INT_I2C 12 -#define MX2x_INT_SSI2 13 -#define MX2x_INT_SSI1 14 -#define MX2x_INT_CSPI2 15 -#define MX2x_INT_CSPI1 16 -#define MX2x_INT_UART4 17 -#define MX2x_INT_UART3 18 -#define MX2x_INT_UART2 19 -#define MX2x_INT_UART1 20 -#define MX2x_INT_KPP 21 -#define MX2x_INT_RTC 22 -#define MX2x_INT_PWM 23 -#define MX2x_INT_GPT3 24 -#define MX2x_INT_GPT2 25 -#define MX2x_INT_GPT1 26 -#define MX2x_INT_WDOG 27 -#define MX2x_INT_PCMCIA 28 -#define MX2x_INT_NANDFC 29 -#define MX2x_INT_CSI 31 -#define MX2x_INT_DMACH0 32 -#define MX2x_INT_DMACH1 33 -#define MX2x_INT_DMACH2 34 -#define MX2x_INT_DMACH3 35 -#define MX2x_INT_DMACH4 36 -#define MX2x_INT_DMACH5 37 -#define MX2x_INT_DMACH6 38 -#define MX2x_INT_DMACH7 39 -#define MX2x_INT_DMACH8 40 -#define MX2x_INT_DMACH9 41 -#define MX2x_INT_DMACH10 42 -#define MX2x_INT_DMACH11 43 -#define MX2x_INT_DMACH12 44 -#define MX2x_INT_DMACH13 45 -#define MX2x_INT_DMACH14 46 -#define MX2x_INT_DMACH15 47 -#define MX2x_INT_EMMAPRP 51 -#define MX2x_INT_EMMAPP 52 -#define MX2x_INT_SLCDC 60 -#define MX2x_INT_LCDC 61 +#include +#define MX2x_INT_CSPI3 (NR_IRQS_LEGACY + 6) +#define MX2x_INT_GPIO (NR_IRQS_LEGACY + 8) +#define MX2x_INT_SDHC2 (NR_IRQS_LEGACY + 10) +#define MX2x_INT_SDHC1 (NR_IRQS_LEGACY + 11) +#define MX2x_INT_I2C (NR_IRQS_LEGACY + 12) +#define MX2x_INT_SSI2 (NR_IRQS_LEGACY + 13) +#define MX2x_INT_SSI1 (NR_IRQS_LEGACY + 14) +#define MX2x_INT_CSPI2 (NR_IRQS_LEGACY + 15) +#define MX2x_INT_CSPI1 (NR_IRQS_LEGACY + 16) +#define MX2x_INT_UART4 (NR_IRQS_LEGACY + 17) +#define MX2x_INT_UART3 (NR_IRQS_LEGACY + 18) +#define MX2x_INT_UART2 (NR_IRQS_LEGACY + 19) +#define MX2x_INT_UART1 (NR_IRQS_LEGACY + 20) +#define MX2x_INT_KPP (NR_IRQS_LEGACY + 21) +#define MX2x_INT_RTC (NR_IRQS_LEGACY + 22) +#define MX2x_INT_PWM (NR_IRQS_LEGACY + 23) +#define MX2x_INT_GPT3 (NR_IRQS_LEGACY + 24) +#define MX2x_INT_GPT2 (NR_IRQS_LEGACY + 25) +#define MX2x_INT_GPT1 (NR_IRQS_LEGACY + 26) +#define MX2x_INT_WDOG (NR_IRQS_LEGACY + 27) +#define MX2x_INT_PCMCIA (NR_IRQS_LEGACY + 28) +#define MX2x_INT_NANDFC (NR_IRQS_LEGACY + 29) +#define MX2x_INT_CSI (NR_IRQS_LEGACY + 31) +#define MX2x_INT_DMACH0 (NR_IRQS_LEGACY + 32) +#define MX2x_INT_DMACH1 (NR_IRQS_LEGACY + 33) +#define MX2x_INT_DMACH2 (NR_IRQS_LEGACY + 34) +#define MX2x_INT_DMACH3 (NR_IRQS_LEGACY + 35) +#define MX2x_INT_DMACH4 (NR_IRQS_LEGACY + 36) +#define MX2x_INT_DMACH5 (NR_IRQS_LEGACY + 37) +#define MX2x_INT_DMACH6 (NR_IRQS_LEGACY + 38) +#define MX2x_INT_DMACH7 (NR_IRQS_LEGACY + 39) +#define MX2x_INT_DMACH8 (NR_IRQS_LEGACY + 40) +#define MX2x_INT_DMACH9 (NR_IRQS_LEGACY + 41) +#define MX2x_INT_DMACH10 (NR_IRQS_LEGACY + 42) +#define MX2x_INT_DMACH11 (NR_IRQS_LEGACY + 43) +#define MX2x_INT_DMACH12 (NR_IRQS_LEGACY + 44) +#define MX2x_INT_DMACH13 (NR_IRQS_LEGACY + 45) +#define MX2x_INT_DMACH14 (NR_IRQS_LEGACY + 46) +#define MX2x_INT_DMACH15 (NR_IRQS_LEGACY + 47) +#define MX2x_INT_EMMAPRP (NR_IRQS_LEGACY + 51) +#define MX2x_INT_EMMAPP (NR_IRQS_LEGACY + 52) +#define MX2x_INT_SLCDC (NR_IRQS_LEGACY + 60) +#define MX2x_INT_LCDC (NR_IRQS_LEGACY + 61) /* fixed DMA request numbers */ #define MX2x_DMA_REQ_CSPI3_RX 1 diff --git a/arch/arm/plat-mxc/include/mach/mx31.h b/arch/arm/plat-mxc/include/mach/mx31.h index e27619e442c0..dbced61d9fda 100644 --- a/arch/arm/plat-mxc/include/mach/mx31.h +++ b/arch/arm/plat-mxc/include/mach/mx31.h @@ -118,63 +118,67 @@ #define MX31_IO_P2V(x) IMX_IO_P2V(x) #define MX31_IO_ADDRESS(x) IOMEM(MX31_IO_P2V(x)) -#define MX31_INT_I2C3 3 -#define MX31_INT_I2C2 4 -#define MX31_INT_MPEG4_ENCODER 5 -#define MX31_INT_RTIC 6 -#define MX31_INT_FIRI 7 -#define MX31_INT_SDHC2 8 -#define MX31_INT_SDHC1 9 -#define MX31_INT_I2C1 10 -#define MX31_INT_SSI2 11 -#define MX31_INT_SSI1 12 -#define MX31_INT_CSPI2 13 -#define MX31_INT_CSPI1 14 -#define MX31_INT_ATA 15 -#define MX31_INT_MBX 16 -#define MX31_INT_CSPI3 17 -#define MX31_INT_UART3 18 -#define MX31_INT_IIM 19 -#define MX31_INT_SIM2 20 -#define MX31_INT_SIM1 21 -#define MX31_INT_RNGA 22 -#define MX31_INT_EVTMON 23 -#define MX31_INT_KPP 24 -#define MX31_INT_RTC 25 -#define MX31_INT_PWM 26 -#define MX31_INT_EPIT2 27 -#define MX31_INT_EPIT1 28 -#define MX31_INT_GPT 29 -#define MX31_INT_POWER_FAIL 30 -#define MX31_INT_CCM_DVFS 31 -#define MX31_INT_UART2 32 -#define MX31_INT_NFC 33 -#define MX31_INT_SDMA 34 -#define MX31_INT_USB_HS1 35 -#define MX31_INT_USB_HS2 36 -#define MX31_INT_USB_OTG 37 -#define MX31_INT_MSHC1 39 -#define MX31_INT_MSHC2 40 -#define MX31_INT_IPU_ERR 41 -#define MX31_INT_IPU_SYN 42 -#define MX31_INT_UART1 45 -#define MX31_INT_UART4 46 -#define MX31_INT_UART5 47 -#define MX31_INT_ECT 48 -#define MX31_INT_SCC_SCM 49 -#define MX31_INT_SCC_SMN 50 -#define MX31_INT_GPIO2 51 -#define MX31_INT_GPIO1 52 -#define MX31_INT_CCM 53 -#define MX31_INT_PCMCIA 54 -#define MX31_INT_WDOG 55 -#define MX31_INT_GPIO3 56 -#define MX31_INT_EXT_POWER 58 -#define MX31_INT_EXT_TEMPER 59 -#define MX31_INT_EXT_SENSOR60 60 -#define MX31_INT_EXT_SENSOR61 61 -#define MX31_INT_EXT_WDOG 62 -#define MX31_INT_EXT_TV 63 +/* + * Interrupt numbers + */ +#include +#define MX31_INT_I2C3 (NR_IRQS_LEGACY + 3) +#define MX31_INT_I2C2 (NR_IRQS_LEGACY + 4) +#define MX31_INT_MPEG4_ENCODER (NR_IRQS_LEGACY + 5) +#define MX31_INT_RTIC (NR_IRQS_LEGACY + 6) +#define MX31_INT_FIRI (NR_IRQS_LEGACY + 7) +#define MX31_INT_SDHC2 (NR_IRQS_LEGACY + 8) +#define MX31_INT_SDHC1 (NR_IRQS_LEGACY + 9) +#define MX31_INT_I2C1 (NR_IRQS_LEGACY + 10) +#define MX31_INT_SSI2 (NR_IRQS_LEGACY + 11) +#define MX31_INT_SSI1 (NR_IRQS_LEGACY + 12) +#define MX31_INT_CSPI2 (NR_IRQS_LEGACY + 13) +#define MX31_INT_CSPI1 (NR_IRQS_LEGACY + 14) +#define MX31_INT_ATA (NR_IRQS_LEGACY + 15) +#define MX31_INT_MBX (NR_IRQS_LEGACY + 16) +#define MX31_INT_CSPI3 (NR_IRQS_LEGACY + 17) +#define MX31_INT_UART3 (NR_IRQS_LEGACY + 18) +#define MX31_INT_IIM (NR_IRQS_LEGACY + 19) +#define MX31_INT_SIM2 (NR_IRQS_LEGACY + 20) +#define MX31_INT_SIM1 (NR_IRQS_LEGACY + 21) +#define MX31_INT_RNGA (NR_IRQS_LEGACY + 22) +#define MX31_INT_EVTMON (NR_IRQS_LEGACY + 23) +#define MX31_INT_KPP (NR_IRQS_LEGACY + 24) +#define MX31_INT_RTC (NR_IRQS_LEGACY + 25) +#define MX31_INT_PWM (NR_IRQS_LEGACY + 26) +#define MX31_INT_EPIT2 (NR_IRQS_LEGACY + 27) +#define MX31_INT_EPIT1 (NR_IRQS_LEGACY + 28) +#define MX31_INT_GPT (NR_IRQS_LEGACY + 29) +#define MX31_INT_POWER_FAIL (NR_IRQS_LEGACY + 30) +#define MX31_INT_CCM_DVFS (NR_IRQS_LEGACY + 31) +#define MX31_INT_UART2 (NR_IRQS_LEGACY + 32) +#define MX31_INT_NFC (NR_IRQS_LEGACY + 33) +#define MX31_INT_SDMA (NR_IRQS_LEGACY + 34) +#define MX31_INT_USB_HS1 (NR_IRQS_LEGACY + 35) +#define MX31_INT_USB_HS2 (NR_IRQS_LEGACY + 36) +#define MX31_INT_USB_OTG (NR_IRQS_LEGACY + 37) +#define MX31_INT_MSHC1 (NR_IRQS_LEGACY + 39) +#define MX31_INT_MSHC2 (NR_IRQS_LEGACY + 40) +#define MX31_INT_IPU_ERR (NR_IRQS_LEGACY + 41) +#define MX31_INT_IPU_SYN (NR_IRQS_LEGACY + 42) +#define MX31_INT_UART1 (NR_IRQS_LEGACY + 45) +#define MX31_INT_UART4 (NR_IRQS_LEGACY + 46) +#define MX31_INT_UART5 (NR_IRQS_LEGACY + 47) +#define MX31_INT_ECT (NR_IRQS_LEGACY + 48) +#define MX31_INT_SCC_SCM (NR_IRQS_LEGACY + 49) +#define MX31_INT_SCC_SMN (NR_IRQS_LEGACY + 50) +#define MX31_INT_GPIO2 (NR_IRQS_LEGACY + 51) +#define MX31_INT_GPIO1 (NR_IRQS_LEGACY + 52) +#define MX31_INT_CCM (NR_IRQS_LEGACY + 53) +#define MX31_INT_PCMCIA (NR_IRQS_LEGACY + 54) +#define MX31_INT_WDOG (NR_IRQS_LEGACY + 55) +#define MX31_INT_GPIO3 (NR_IRQS_LEGACY + 56) +#define MX31_INT_EXT_POWER (NR_IRQS_LEGACY + 58) +#define MX31_INT_EXT_TEMPER (NR_IRQS_LEGACY + 59) +#define MX31_INT_EXT_SENSOR60 (NR_IRQS_LEGACY + 60) +#define MX31_INT_EXT_SENSOR61 (NR_IRQS_LEGACY + 61) +#define MX31_INT_EXT_WDOG (NR_IRQS_LEGACY + 62) +#define MX31_INT_EXT_TV (NR_IRQS_LEGACY + 63) #define MX31_DMA_REQ_SDHC1 20 #define MX31_DMA_REQ_SDHC2 21 diff --git a/arch/arm/plat-mxc/include/mach/mx35.h b/arch/arm/plat-mxc/include/mach/mx35.h index 80965a99aa55..2af5d3a699c7 100644 --- a/arch/arm/plat-mxc/include/mach/mx35.h +++ b/arch/arm/plat-mxc/include/mach/mx35.h @@ -120,60 +120,61 @@ /* * Interrupt numbers */ -#define MX35_INT_OWIRE 2 -#define MX35_INT_I2C3 3 -#define MX35_INT_I2C2 4 -#define MX35_INT_RTIC 6 -#define MX35_INT_ESDHC1 7 -#define MX35_INT_ESDHC2 8 -#define MX35_INT_ESDHC3 9 -#define MX35_INT_I2C1 10 -#define MX35_INT_SSI1 11 -#define MX35_INT_SSI2 12 -#define MX35_INT_CSPI2 13 -#define MX35_INT_CSPI1 14 -#define MX35_INT_ATA 15 -#define MX35_INT_GPU2D 16 -#define MX35_INT_ASRC 17 -#define MX35_INT_UART3 18 -#define MX35_INT_IIM 19 -#define MX35_INT_RNGA 22 -#define MX35_INT_EVTMON 23 -#define MX35_INT_KPP 24 -#define MX35_INT_RTC 25 -#define MX35_INT_PWM 26 -#define MX35_INT_EPIT2 27 -#define MX35_INT_EPIT1 28 -#define MX35_INT_GPT 29 -#define MX35_INT_POWER_FAIL 30 -#define MX35_INT_UART2 32 -#define MX35_INT_NFC 33 -#define MX35_INT_SDMA 34 -#define MX35_INT_USB_HS 35 -#define MX35_INT_USB_OTG 37 -#define MX35_INT_MSHC1 39 -#define MX35_INT_ESAI 40 -#define MX35_INT_IPU_ERR 41 -#define MX35_INT_IPU_SYN 42 -#define MX35_INT_CAN1 43 -#define MX35_INT_CAN2 44 -#define MX35_INT_UART1 45 -#define MX35_INT_MLB 46 -#define MX35_INT_SPDIF 47 -#define MX35_INT_ECT 48 -#define MX35_INT_SCC_SCM 49 -#define MX35_INT_SCC_SMN 50 -#define MX35_INT_GPIO2 51 -#define MX35_INT_GPIO1 52 -#define MX35_INT_WDOG 55 -#define MX35_INT_GPIO3 56 -#define MX35_INT_FEC 57 -#define MX35_INT_EXT_POWER 58 -#define MX35_INT_EXT_TEMPER 59 -#define MX35_INT_EXT_SENSOR60 60 -#define MX35_INT_EXT_SENSOR61 61 -#define MX35_INT_EXT_WDOG 62 -#define MX35_INT_EXT_TV 63 +#include +#define MX35_INT_OWIRE (NR_IRQS_LEGACY + 2) +#define MX35_INT_I2C3 (NR_IRQS_LEGACY + 3) +#define MX35_INT_I2C2 (NR_IRQS_LEGACY + 4) +#define MX35_INT_RTIC (NR_IRQS_LEGACY + 6) +#define MX35_INT_ESDHC1 (NR_IRQS_LEGACY + 7) +#define MX35_INT_ESDHC2 (NR_IRQS_LEGACY + 8) +#define MX35_INT_ESDHC3 (NR_IRQS_LEGACY + 9) +#define MX35_INT_I2C1 (NR_IRQS_LEGACY + 10) +#define MX35_INT_SSI1 (NR_IRQS_LEGACY + 11) +#define MX35_INT_SSI2 (NR_IRQS_LEGACY + 12) +#define MX35_INT_CSPI2 (NR_IRQS_LEGACY + 13) +#define MX35_INT_CSPI1 (NR_IRQS_LEGACY + 14) +#define MX35_INT_ATA (NR_IRQS_LEGACY + 15) +#define MX35_INT_GPU2D (NR_IRQS_LEGACY + 16) +#define MX35_INT_ASRC (NR_IRQS_LEGACY + 17) +#define MX35_INT_UART3 (NR_IRQS_LEGACY + 18) +#define MX35_INT_IIM (NR_IRQS_LEGACY + 19) +#define MX35_INT_RNGA (NR_IRQS_LEGACY + 22) +#define MX35_INT_EVTMON (NR_IRQS_LEGACY + 23) +#define MX35_INT_KPP (NR_IRQS_LEGACY + 24) +#define MX35_INT_RTC (NR_IRQS_LEGACY + 25) +#define MX35_INT_PWM (NR_IRQS_LEGACY + 26) +#define MX35_INT_EPIT2 (NR_IRQS_LEGACY + 27) +#define MX35_INT_EPIT1 (NR_IRQS_LEGACY + 28) +#define MX35_INT_GPT (NR_IRQS_LEGACY + 29) +#define MX35_INT_POWER_FAIL (NR_IRQS_LEGACY + 30) +#define MX35_INT_UART2 (NR_IRQS_LEGACY + 32) +#define MX35_INT_NFC (NR_IRQS_LEGACY + 33) +#define MX35_INT_SDMA (NR_IRQS_LEGACY + 34) +#define MX35_INT_USB_HS (NR_IRQS_LEGACY + 35) +#define MX35_INT_USB_OTG (NR_IRQS_LEGACY + 37) +#define MX35_INT_MSHC1 (NR_IRQS_LEGACY + 39) +#define MX35_INT_ESAI (NR_IRQS_LEGACY + 40) +#define MX35_INT_IPU_ERR (NR_IRQS_LEGACY + 41) +#define MX35_INT_IPU_SYN (NR_IRQS_LEGACY + 42) +#define MX35_INT_CAN1 (NR_IRQS_LEGACY + 43) +#define MX35_INT_CAN2 (NR_IRQS_LEGACY + 44) +#define MX35_INT_UART1 (NR_IRQS_LEGACY + 45) +#define MX35_INT_MLB (NR_IRQS_LEGACY + 46) +#define MX35_INT_SPDIF (NR_IRQS_LEGACY + 47) +#define MX35_INT_ECT (NR_IRQS_LEGACY + 48) +#define MX35_INT_SCC_SCM (NR_IRQS_LEGACY + 49) +#define MX35_INT_SCC_SMN (NR_IRQS_LEGACY + 50) +#define MX35_INT_GPIO2 (NR_IRQS_LEGACY + 51) +#define MX35_INT_GPIO1 (NR_IRQS_LEGACY + 52) +#define MX35_INT_WDOG (NR_IRQS_LEGACY + 55) +#define MX35_INT_GPIO3 (NR_IRQS_LEGACY + 56) +#define MX35_INT_FEC (NR_IRQS_LEGACY + 57) +#define MX35_INT_EXT_POWER (NR_IRQS_LEGACY + 58) +#define MX35_INT_EXT_TEMPER (NR_IRQS_LEGACY + 59) +#define MX35_INT_EXT_SENSOR60 (NR_IRQS_LEGACY + 60) +#define MX35_INT_EXT_SENSOR61 (NR_IRQS_LEGACY + 61) +#define MX35_INT_EXT_WDOG (NR_IRQS_LEGACY + 62) +#define MX35_INT_EXT_TV (NR_IRQS_LEGACY + 63) #define MX35_DMA_REQ_SSI2_RX1 22 #define MX35_DMA_REQ_SSI2_TX1 23 diff --git a/arch/arm/plat-mxc/include/mach/mx3x.h b/arch/arm/plat-mxc/include/mach/mx3x.h index 30dbf424583e..96fb4fbc8ad7 100644 --- a/arch/arm/plat-mxc/include/mach/mx3x.h +++ b/arch/arm/plat-mxc/include/mach/mx3x.h @@ -143,44 +143,45 @@ /* * Interrupt numbers */ -#define MX3x_INT_I2C3 3 -#define MX3x_INT_I2C2 4 -#define MX3x_INT_RTIC 6 -#define MX3x_INT_I2C 10 -#define MX3x_INT_CSPI2 13 -#define MX3x_INT_CSPI1 14 -#define MX3x_INT_ATA 15 -#define MX3x_INT_UART3 18 -#define MX3x_INT_IIM 19 -#define MX3x_INT_RNGA 22 -#define MX3x_INT_EVTMON 23 -#define MX3x_INT_KPP 24 -#define MX3x_INT_RTC 25 -#define MX3x_INT_PWM 26 -#define MX3x_INT_EPIT2 27 -#define MX3x_INT_EPIT1 28 -#define MX3x_INT_GPT 29 -#define MX3x_INT_POWER_FAIL 30 -#define MX3x_INT_UART2 32 -#define MX3x_INT_NANDFC 33 -#define MX3x_INT_SDMA 34 -#define MX3x_INT_MSHC1 39 -#define MX3x_INT_IPU_ERR 41 -#define MX3x_INT_IPU_SYN 42 -#define MX3x_INT_UART1 45 -#define MX3x_INT_ECT 48 -#define MX3x_INT_SCC_SCM 49 -#define MX3x_INT_SCC_SMN 50 -#define MX3x_INT_GPIO2 51 -#define MX3x_INT_GPIO1 52 -#define MX3x_INT_WDOG 55 -#define MX3x_INT_GPIO3 56 -#define MX3x_INT_EXT_POWER 58 -#define MX3x_INT_EXT_TEMPER 59 -#define MX3x_INT_EXT_SENSOR60 60 -#define MX3x_INT_EXT_SENSOR61 61 -#define MX3x_INT_EXT_WDOG 62 -#define MX3x_INT_EXT_TV 63 +#include +#define MX3x_INT_I2C3 (NR_IRQS_LEGACY + 3) +#define MX3x_INT_I2C2 (NR_IRQS_LEGACY + 4) +#define MX3x_INT_RTIC (NR_IRQS_LEGACY + 6) +#define MX3x_INT_I2C (NR_IRQS_LEGACY + 10) +#define MX3x_INT_CSPI2 (NR_IRQS_LEGACY + 13) +#define MX3x_INT_CSPI1 (NR_IRQS_LEGACY + 14) +#define MX3x_INT_ATA (NR_IRQS_LEGACY + 15) +#define MX3x_INT_UART3 (NR_IRQS_LEGACY + 18) +#define MX3x_INT_IIM (NR_IRQS_LEGACY + 19) +#define MX3x_INT_RNGA (NR_IRQS_LEGACY + 22) +#define MX3x_INT_EVTMON (NR_IRQS_LEGACY + 23) +#define MX3x_INT_KPP (NR_IRQS_LEGACY + 24) +#define MX3x_INT_RTC (NR_IRQS_LEGACY + 25) +#define MX3x_INT_PWM (NR_IRQS_LEGACY + 26) +#define MX3x_INT_EPIT2 (NR_IRQS_LEGACY + 27) +#define MX3x_INT_EPIT1 (NR_IRQS_LEGACY + 28) +#define MX3x_INT_GPT (NR_IRQS_LEGACY + 29) +#define MX3x_INT_POWER_FAIL (NR_IRQS_LEGACY + 30) +#define MX3x_INT_UART2 (NR_IRQS_LEGACY + 32) +#define MX3x_INT_NANDFC (NR_IRQS_LEGACY + 33) +#define MX3x_INT_SDMA (NR_IRQS_LEGACY + 34) +#define MX3x_INT_MSHC1 (NR_IRQS_LEGACY + 39) +#define MX3x_INT_IPU_ERR (NR_IRQS_LEGACY + 41) +#define MX3x_INT_IPU_SYN (NR_IRQS_LEGACY + 42) +#define MX3x_INT_UART1 (NR_IRQS_LEGACY + 45) +#define MX3x_INT_ECT (NR_IRQS_LEGACY + 48) +#define MX3x_INT_SCC_SCM (NR_IRQS_LEGACY + 49) +#define MX3x_INT_SCC_SMN (NR_IRQS_LEGACY + 50) +#define MX3x_INT_GPIO2 (NR_IRQS_LEGACY + 51) +#define MX3x_INT_GPIO1 (NR_IRQS_LEGACY + 52) +#define MX3x_INT_WDOG (NR_IRQS_LEGACY + 55) +#define MX3x_INT_GPIO3 (NR_IRQS_LEGACY + 56) +#define MX3x_INT_EXT_POWER (NR_IRQS_LEGACY + 58) +#define MX3x_INT_EXT_TEMPER (NR_IRQS_LEGACY + 59) +#define MX3x_INT_EXT_SENSOR60 (NR_IRQS_LEGACY + 60) +#define MX3x_INT_EXT_SENSOR61 (NR_IRQS_LEGACY + 61) +#define MX3x_INT_EXT_WDOG (NR_IRQS_LEGACY + 62) +#define MX3x_INT_EXT_TV (NR_IRQS_LEGACY + 63) #define MX3x_PROD_SIGNATURE 0x1 /* For MX31 */ diff --git a/arch/arm/plat-mxc/include/mach/mx50.h b/arch/arm/plat-mxc/include/mach/mx50.h index 5f2da75a47f4..09ac19c1570c 100644 --- a/arch/arm/plat-mxc/include/mach/mx50.h +++ b/arch/arm/plat-mxc/include/mach/mx50.h @@ -188,99 +188,100 @@ /* * Interrupt numbers */ -#define MX50_INT_MMC_SDHC1 1 -#define MX50_INT_MMC_SDHC2 2 -#define MX50_INT_MMC_SDHC3 3 -#define MX50_INT_MMC_SDHC4 4 -#define MX50_INT_DAP 5 -#define MX50_INT_SDMA 6 -#define MX50_INT_IOMUX 7 -#define MX50_INT_UART4 13 -#define MX50_INT_USB_H1 14 -#define MX50_INT_USB_OTG 18 -#define MX50_INT_DATABAHN 19 -#define MX50_INT_ELCDIF 20 -#define MX50_INT_EPXP 21 -#define MX50_INT_SRTC_NTZ 24 -#define MX50_INT_SRTC_TZ 25 -#define MX50_INT_EPDC 27 -#define MX50_INT_NIC 28 -#define MX50_INT_SSI1 29 -#define MX50_INT_SSI2 30 -#define MX50_INT_UART1 31 -#define MX50_INT_UART2 32 -#define MX50_INT_UART3 33 -#define MX50_INT_RESV34 34 -#define MX50_INT_RESV35 35 -#define MX50_INT_CSPI1 36 -#define MX50_INT_CSPI2 37 -#define MX50_INT_CSPI 38 -#define MX50_INT_GPT 39 -#define MX50_INT_EPIT1 40 -#define MX50_INT_GPIO1_INT7 42 -#define MX50_INT_GPIO1_INT6 43 -#define MX50_INT_GPIO1_INT5 44 -#define MX50_INT_GPIO1_INT4 45 -#define MX50_INT_GPIO1_INT3 46 -#define MX50_INT_GPIO1_INT2 47 -#define MX50_INT_GPIO1_INT1 48 -#define MX50_INT_GPIO1_INT0 49 -#define MX50_INT_GPIO1_LOW 50 -#define MX50_INT_GPIO1_HIGH 51 -#define MX50_INT_GPIO2_LOW 52 -#define MX50_INT_GPIO2_HIGH 53 -#define MX50_INT_GPIO3_LOW 54 -#define MX50_INT_GPIO3_HIGH 55 -#define MX50_INT_GPIO4_LOW 56 -#define MX50_INT_GPIO4_HIGH 57 -#define MX50_INT_WDOG1 58 -#define MX50_INT_KPP 60 -#define MX50_INT_PWM1 61 -#define MX50_INT_I2C1 62 -#define MX50_INT_I2C2 63 -#define MX50_INT_I2C3 64 -#define MX50_INT_RESV65 65 -#define MX50_INT_DCDC 66 -#define MX50_INT_THERMAL_ALARM 67 -#define MX50_INT_ANA3 68 -#define MX50_INT_ANA4 69 -#define MX50_INT_CCM1 71 -#define MX50_INT_CCM2 72 -#define MX50_INT_GPC1 73 -#define MX50_INT_GPC2 74 -#define MX50_INT_SRC 75 -#define MX50_INT_NM 76 -#define MX50_INT_PMU 77 -#define MX50_INT_CTI_IRQ 78 -#define MX50_INT_CTI1_TG0 79 -#define MX50_INT_CTI1_TG1 80 -#define MX50_INT_GPU2_IRQ 84 -#define MX50_INT_GPU2_BUSY 85 -#define MX50_INT_UART5 86 -#define MX50_INT_FEC 87 -#define MX50_INT_OWIRE 88 -#define MX50_INT_CTI1_TG2 89 -#define MX50_INT_SJC 90 -#define MX50_INT_DCP_CHAN1_3 91 -#define MX50_INT_DCP_CHAN0 92 -#define MX50_INT_PWM2 94 -#define MX50_INT_RNGB 97 -#define MX50_INT_CTI1_TG3 98 -#define MX50_INT_RAWNAND_BCH 100 -#define MX50_INT_RAWNAND_GPMI 102 -#define MX50_INT_GPIO5_LOW 103 -#define MX50_INT_GPIO5_HIGH 104 -#define MX50_INT_GPIO6_LOW 105 -#define MX50_INT_GPIO6_HIGH 106 -#define MX50_INT_MSHC 109 -#define MX50_INT_APBHDMA_CHAN0 110 -#define MX50_INT_APBHDMA_CHAN1 111 -#define MX50_INT_APBHDMA_CHAN2 112 -#define MX50_INT_APBHDMA_CHAN3 113 -#define MX50_INT_APBHDMA_CHAN4 114 -#define MX50_INT_APBHDMA_CHAN5 115 -#define MX50_INT_APBHDMA_CHAN6 116 -#define MX50_INT_APBHDMA_CHAN7 117 +#include +#define MX50_INT_MMC_SDHC1 (NR_IRQS_LEGACY + 1) +#define MX50_INT_MMC_SDHC2 (NR_IRQS_LEGACY + 2) +#define MX50_INT_MMC_SDHC3 (NR_IRQS_LEGACY + 3) +#define MX50_INT_MMC_SDHC4 (NR_IRQS_LEGACY + 4) +#define MX50_INT_DAP (NR_IRQS_LEGACY + 5) +#define MX50_INT_SDMA (NR_IRQS_LEGACY + 6) +#define MX50_INT_IOMUX (NR_IRQS_LEGACY + 7) +#define MX50_INT_UART4 (NR_IRQS_LEGACY + 13) +#define MX50_INT_USB_H1 (NR_IRQS_LEGACY + 14) +#define MX50_INT_USB_OTG (NR_IRQS_LEGACY + 18) +#define MX50_INT_DATABAHN (NR_IRQS_LEGACY + 19) +#define MX50_INT_ELCDIF (NR_IRQS_LEGACY + 20) +#define MX50_INT_EPXP (NR_IRQS_LEGACY + 21) +#define MX50_INT_SRTC_NTZ (NR_IRQS_LEGACY + 24) +#define MX50_INT_SRTC_TZ (NR_IRQS_LEGACY + 25) +#define MX50_INT_EPDC (NR_IRQS_LEGACY + 27) +#define MX50_INT_NIC (NR_IRQS_LEGACY + 28) +#define MX50_INT_SSI1 (NR_IRQS_LEGACY + 29) +#define MX50_INT_SSI2 (NR_IRQS_LEGACY + 30) +#define MX50_INT_UART1 (NR_IRQS_LEGACY + 31) +#define MX50_INT_UART2 (NR_IRQS_LEGACY + 32) +#define MX50_INT_UART3 (NR_IRQS_LEGACY + 33) +#define MX50_INT_RESV34 (NR_IRQS_LEGACY + 34) +#define MX50_INT_RESV35 (NR_IRQS_LEGACY + 35) +#define MX50_INT_CSPI1 (NR_IRQS_LEGACY + 36) +#define MX50_INT_CSPI2 (NR_IRQS_LEGACY + 37) +#define MX50_INT_CSPI (NR_IRQS_LEGACY + 38) +#define MX50_INT_GPT (NR_IRQS_LEGACY + 39) +#define MX50_INT_EPIT1 (NR_IRQS_LEGACY + 40) +#define MX50_INT_GPIO1_INT7 (NR_IRQS_LEGACY + 42) +#define MX50_INT_GPIO1_INT6 (NR_IRQS_LEGACY + 43) +#define MX50_INT_GPIO1_INT5 (NR_IRQS_LEGACY + 44) +#define MX50_INT_GPIO1_INT4 (NR_IRQS_LEGACY + 45) +#define MX50_INT_GPIO1_INT3 (NR_IRQS_LEGACY + 46) +#define MX50_INT_GPIO1_INT2 (NR_IRQS_LEGACY + 47) +#define MX50_INT_GPIO1_INT1 (NR_IRQS_LEGACY + 48) +#define MX50_INT_GPIO1_INT0 (NR_IRQS_LEGACY + 49) +#define MX50_INT_GPIO1_LOW (NR_IRQS_LEGACY + 50) +#define MX50_INT_GPIO1_HIGH (NR_IRQS_LEGACY + 51) +#define MX50_INT_GPIO2_LOW (NR_IRQS_LEGACY + 52) +#define MX50_INT_GPIO2_HIGH (NR_IRQS_LEGACY + 53) +#define MX50_INT_GPIO3_LOW (NR_IRQS_LEGACY + 54) +#define MX50_INT_GPIO3_HIGH (NR_IRQS_LEGACY + 55) +#define MX50_INT_GPIO4_LOW (NR_IRQS_LEGACY + 56) +#define MX50_INT_GPIO4_HIGH (NR_IRQS_LEGACY + 57) +#define MX50_INT_WDOG1 (NR_IRQS_LEGACY + 58) +#define MX50_INT_KPP (NR_IRQS_LEGACY + 60) +#define MX50_INT_PWM1 (NR_IRQS_LEGACY + 61) +#define MX50_INT_I2C1 (NR_IRQS_LEGACY + 62) +#define MX50_INT_I2C2 (NR_IRQS_LEGACY + 63) +#define MX50_INT_I2C3 (NR_IRQS_LEGACY + 64) +#define MX50_INT_RESV65 (NR_IRQS_LEGACY + 65) +#define MX50_INT_DCDC (NR_IRQS_LEGACY + 66) +#define MX50_INT_THERMAL_ALARM (NR_IRQS_LEGACY + 67) +#define MX50_INT_ANA3 (NR_IRQS_LEGACY + 68) +#define MX50_INT_ANA4 (NR_IRQS_LEGACY + 69) +#define MX50_INT_CCM1 (NR_IRQS_LEGACY + 71) +#define MX50_INT_CCM2 (NR_IRQS_LEGACY + 72) +#define MX50_INT_GPC1 (NR_IRQS_LEGACY + 73) +#define MX50_INT_GPC2 (NR_IRQS_LEGACY + 74) +#define MX50_INT_SRC (NR_IRQS_LEGACY + 75) +#define MX50_INT_NM (NR_IRQS_LEGACY + 76) +#define MX50_INT_PMU (NR_IRQS_LEGACY + 77) +#define MX50_INT_CTI_IRQ (NR_IRQS_LEGACY + 78) +#define MX50_INT_CTI1_TG0 (NR_IRQS_LEGACY + 79) +#define MX50_INT_CTI1_TG1 (NR_IRQS_LEGACY + 80) +#define MX50_INT_GPU2_IRQ (NR_IRQS_LEGACY + 84) +#define MX50_INT_GPU2_BUSY (NR_IRQS_LEGACY + 85) +#define MX50_INT_UART5 (NR_IRQS_LEGACY + 86) +#define MX50_INT_FEC (NR_IRQS_LEGACY + 87) +#define MX50_INT_OWIRE (NR_IRQS_LEGACY + 88) +#define MX50_INT_CTI1_TG2 (NR_IRQS_LEGACY + 89) +#define MX50_INT_SJC (NR_IRQS_LEGACY + 90) +#define MX50_INT_DCP_CHAN1_3 (NR_IRQS_LEGACY + 91) +#define MX50_INT_DCP_CHAN0 (NR_IRQS_LEGACY + 92) +#define MX50_INT_PWM2 (NR_IRQS_LEGACY + 94) +#define MX50_INT_RNGB (NR_IRQS_LEGACY + 97) +#define MX50_INT_CTI1_TG3 (NR_IRQS_LEGACY + 98) +#define MX50_INT_RAWNAND_BCH (NR_IRQS_LEGACY + 100) +#define MX50_INT_RAWNAND_GPMI (NR_IRQS_LEGACY + 102) +#define MX50_INT_GPIO5_LOW (NR_IRQS_LEGACY + 103) +#define MX50_INT_GPIO5_HIGH (NR_IRQS_LEGACY + 104) +#define MX50_INT_GPIO6_LOW (NR_IRQS_LEGACY + 105) +#define MX50_INT_GPIO6_HIGH (NR_IRQS_LEGACY + 106) +#define MX50_INT_MSHC (NR_IRQS_LEGACY + 109) +#define MX50_INT_APBHDMA_CHAN0 (NR_IRQS_LEGACY + 110) +#define MX50_INT_APBHDMA_CHAN1 (NR_IRQS_LEGACY + 111) +#define MX50_INT_APBHDMA_CHAN2 (NR_IRQS_LEGACY + 112) +#define MX50_INT_APBHDMA_CHAN3 (NR_IRQS_LEGACY + 113) +#define MX50_INT_APBHDMA_CHAN4 (NR_IRQS_LEGACY + 114) +#define MX50_INT_APBHDMA_CHAN5 (NR_IRQS_LEGACY + 115) +#define MX50_INT_APBHDMA_CHAN6 (NR_IRQS_LEGACY + 116) +#define MX50_INT_APBHDMA_CHAN7 (NR_IRQS_LEGACY + 117) #if !defined(__ASSEMBLY__) && !defined(__MXC_BOOT_UNCOMPRESS) extern int mx50_revision(void); diff --git a/arch/arm/plat-mxc/include/mach/mx51.h b/arch/arm/plat-mxc/include/mach/mx51.h index cdf07c65ec1e..af844f76261a 100644 --- a/arch/arm/plat-mxc/include/mach/mx51.h +++ b/arch/arm/plat-mxc/include/mach/mx51.h @@ -232,110 +232,111 @@ /* * Interrupt numbers */ -#define MX51_INT_BASE 0 -#define MX51_INT_RESV0 0 -#define MX51_INT_ESDHC1 1 -#define MX51_INT_ESDHC2 2 -#define MX51_INT_ESDHC3 3 -#define MX51_INT_ESDHC4 4 -#define MX51_INT_RESV5 5 -#define MX51_INT_SDMA 6 -#define MX51_INT_IOMUX 7 -#define MX51_INT_NFC 8 -#define MX51_INT_VPU 9 -#define MX51_INT_IPU_ERR 10 -#define MX51_INT_IPU_SYN 11 -#define MX51_INT_GPU 12 -#define MX51_INT_RESV13 13 -#define MX51_INT_USB_HS1 14 -#define MX51_INT_EMI 15 -#define MX51_INT_USB_HS2 16 -#define MX51_INT_USB_HS3 17 -#define MX51_INT_USB_OTG 18 -#define MX51_INT_SAHARA_H0 19 -#define MX51_INT_SAHARA_H1 20 -#define MX51_INT_SCC_SMN 21 -#define MX51_INT_SCC_STZ 22 -#define MX51_INT_SCC_SCM 23 -#define MX51_INT_SRTC_NTZ 24 -#define MX51_INT_SRTC_TZ 25 -#define MX51_INT_RTIC 26 -#define MX51_INT_CSU 27 -#define MX51_INT_SLIM_B 28 -#define MX51_INT_SSI1 29 -#define MX51_INT_SSI2 30 -#define MX51_INT_UART1 31 -#define MX51_INT_UART2 32 -#define MX51_INT_UART3 33 -#define MX51_INT_RESV34 34 -#define MX51_INT_RESV35 35 -#define MX51_INT_ECSPI1 36 -#define MX51_INT_ECSPI2 37 -#define MX51_INT_CSPI 38 -#define MX51_INT_GPT 39 -#define MX51_INT_EPIT1 40 -#define MX51_INT_EPIT2 41 -#define MX51_INT_GPIO1_INT7 42 -#define MX51_INT_GPIO1_INT6 43 -#define MX51_INT_GPIO1_INT5 44 -#define MX51_INT_GPIO1_INT4 45 -#define MX51_INT_GPIO1_INT3 46 -#define MX51_INT_GPIO1_INT2 47 -#define MX51_INT_GPIO1_INT1 48 -#define MX51_INT_GPIO1_INT0 49 -#define MX51_INT_GPIO1_LOW 50 -#define MX51_INT_GPIO1_HIGH 51 -#define MX51_INT_GPIO2_LOW 52 -#define MX51_INT_GPIO2_HIGH 53 -#define MX51_INT_GPIO3_LOW 54 -#define MX51_INT_GPIO3_HIGH 55 -#define MX51_INT_GPIO4_LOW 56 -#define MX51_INT_GPIO4_HIGH 57 -#define MX51_INT_WDOG1 58 -#define MX51_INT_WDOG2 59 -#define MX51_INT_KPP 60 -#define MX51_INT_PWM1 61 -#define MX51_INT_I2C1 62 -#define MX51_INT_I2C2 63 -#define MX51_INT_HS_I2C 64 -#define MX51_INT_RESV65 65 -#define MX51_INT_RESV66 66 -#define MX51_INT_SIM_IPB 67 -#define MX51_INT_SIM_DAT 68 -#define MX51_INT_IIM 69 -#define MX51_INT_ATA 70 -#define MX51_INT_CCM1 71 -#define MX51_INT_CCM2 72 -#define MX51_INT_GPC1 73 -#define MX51_INT_GPC2 74 -#define MX51_INT_SRC 75 -#define MX51_INT_NM 76 -#define MX51_INT_PMU 77 -#define MX51_INT_CTI_IRQ 78 -#define MX51_INT_CTI1_TG0 79 -#define MX51_INT_CTI1_TG1 80 -#define MX51_INT_MCG_ERR 81 -#define MX51_INT_MCG_TMR 82 -#define MX51_INT_MCG_FUNC 83 -#define MX51_INT_GPU2_IRQ 84 -#define MX51_INT_GPU2_BUSY 85 -#define MX51_INT_RESV86 86 -#define MX51_INT_FEC 87 -#define MX51_INT_OWIRE 88 -#define MX51_INT_CTI1_TG2 89 -#define MX51_INT_SJC 90 -#define MX51_INT_SPDIF 91 -#define MX51_INT_TVE 92 -#define MX51_INT_FIRI 93 -#define MX51_INT_PWM2 94 -#define MX51_INT_SLIM_EXP 95 -#define MX51_INT_SSI3 96 -#define MX51_INT_EMI_BOOT 97 -#define MX51_INT_CTI1_TG3 98 -#define MX51_INT_SMC_RX 99 -#define MX51_INT_VPU_IDLE 100 -#define MX51_INT_EMI_NFC 101 -#define MX51_INT_GPU_IDLE 102 +#include +#define MX51_INT_BASE (NR_IRQS_LEGACY + 0) +#define MX51_INT_RESV0 (NR_IRQS_LEGACY + 0) +#define MX51_INT_ESDHC1 (NR_IRQS_LEGACY + 1) +#define MX51_INT_ESDHC2 (NR_IRQS_LEGACY + 2) +#define MX51_INT_ESDHC3 (NR_IRQS_LEGACY + 3) +#define MX51_INT_ESDHC4 (NR_IRQS_LEGACY + 4) +#define MX51_INT_RESV5 (NR_IRQS_LEGACY + 5) +#define MX51_INT_SDMA (NR_IRQS_LEGACY + 6) +#define MX51_INT_IOMUX (NR_IRQS_LEGACY + 7) +#define MX51_INT_NFC (NR_IRQS_LEGACY + 8) +#define MX51_INT_VPU (NR_IRQS_LEGACY + 9) +#define MX51_INT_IPU_ERR (NR_IRQS_LEGACY + 10) +#define MX51_INT_IPU_SYN (NR_IRQS_LEGACY + 11) +#define MX51_INT_GPU (NR_IRQS_LEGACY + 12) +#define MX51_INT_RESV13 (NR_IRQS_LEGACY + 13) +#define MX51_INT_USB_HS1 (NR_IRQS_LEGACY + 14) +#define MX51_INT_EMI (NR_IRQS_LEGACY + 15) +#define MX51_INT_USB_HS2 (NR_IRQS_LEGACY + 16) +#define MX51_INT_USB_HS3 (NR_IRQS_LEGACY + 17) +#define MX51_INT_USB_OTG (NR_IRQS_LEGACY + 18) +#define MX51_INT_SAHARA_H0 (NR_IRQS_LEGACY + 19) +#define MX51_INT_SAHARA_H1 (NR_IRQS_LEGACY + 20) +#define MX51_INT_SCC_SMN (NR_IRQS_LEGACY + 21) +#define MX51_INT_SCC_STZ (NR_IRQS_LEGACY + 22) +#define MX51_INT_SCC_SCM (NR_IRQS_LEGACY + 23) +#define MX51_INT_SRTC_NTZ (NR_IRQS_LEGACY + 24) +#define MX51_INT_SRTC_TZ (NR_IRQS_LEGACY + 25) +#define MX51_INT_RTIC (NR_IRQS_LEGACY + 26) +#define MX51_INT_CSU (NR_IRQS_LEGACY + 27) +#define MX51_INT_SLIM_B (NR_IRQS_LEGACY + 28) +#define MX51_INT_SSI1 (NR_IRQS_LEGACY + 29) +#define MX51_INT_SSI2 (NR_IRQS_LEGACY + 30) +#define MX51_INT_UART1 (NR_IRQS_LEGACY + 31) +#define MX51_INT_UART2 (NR_IRQS_LEGACY + 32) +#define MX51_INT_UART3 (NR_IRQS_LEGACY + 33) +#define MX51_INT_RESV34 (NR_IRQS_LEGACY + 34) +#define MX51_INT_RESV35 (NR_IRQS_LEGACY + 35) +#define MX51_INT_ECSPI1 (NR_IRQS_LEGACY + 36) +#define MX51_INT_ECSPI2 (NR_IRQS_LEGACY + 37) +#define MX51_INT_CSPI (NR_IRQS_LEGACY + 38) +#define MX51_INT_GPT (NR_IRQS_LEGACY + 39) +#define MX51_INT_EPIT1 (NR_IRQS_LEGACY + 40) +#define MX51_INT_EPIT2 (NR_IRQS_LEGACY + 41) +#define MX51_INT_GPIO1_INT7 (NR_IRQS_LEGACY + 42) +#define MX51_INT_GPIO1_INT6 (NR_IRQS_LEGACY + 43) +#define MX51_INT_GPIO1_INT5 (NR_IRQS_LEGACY + 44) +#define MX51_INT_GPIO1_INT4 (NR_IRQS_LEGACY + 45) +#define MX51_INT_GPIO1_INT3 (NR_IRQS_LEGACY + 46) +#define MX51_INT_GPIO1_INT2 (NR_IRQS_LEGACY + 47) +#define MX51_INT_GPIO1_INT1 (NR_IRQS_LEGACY + 48) +#define MX51_INT_GPIO1_INT0 (NR_IRQS_LEGACY + 49) +#define MX51_INT_GPIO1_LOW (NR_IRQS_LEGACY + 50) +#define MX51_INT_GPIO1_HIGH (NR_IRQS_LEGACY + 51) +#define MX51_INT_GPIO2_LOW (NR_IRQS_LEGACY + 52) +#define MX51_INT_GPIO2_HIGH (NR_IRQS_LEGACY + 53) +#define MX51_INT_GPIO3_LOW (NR_IRQS_LEGACY + 54) +#define MX51_INT_GPIO3_HIGH (NR_IRQS_LEGACY + 55) +#define MX51_INT_GPIO4_LOW (NR_IRQS_LEGACY + 56) +#define MX51_INT_GPIO4_HIGH (NR_IRQS_LEGACY + 57) +#define MX51_INT_WDOG1 (NR_IRQS_LEGACY + 58) +#define MX51_INT_WDOG2 (NR_IRQS_LEGACY + 59) +#define MX51_INT_KPP (NR_IRQS_LEGACY + 60) +#define MX51_INT_PWM1 (NR_IRQS_LEGACY + 61) +#define MX51_INT_I2C1 (NR_IRQS_LEGACY + 62) +#define MX51_INT_I2C2 (NR_IRQS_LEGACY + 63) +#define MX51_INT_HS_I2C (NR_IRQS_LEGACY + 64) +#define MX51_INT_RESV65 (NR_IRQS_LEGACY + 65) +#define MX51_INT_RESV66 (NR_IRQS_LEGACY + 66) +#define MX51_INT_SIM_IPB (NR_IRQS_LEGACY + 67) +#define MX51_INT_SIM_DAT (NR_IRQS_LEGACY + 68) +#define MX51_INT_IIM (NR_IRQS_LEGACY + 69) +#define MX51_INT_ATA (NR_IRQS_LEGACY + 70) +#define MX51_INT_CCM1 (NR_IRQS_LEGACY + 71) +#define MX51_INT_CCM2 (NR_IRQS_LEGACY + 72) +#define MX51_INT_GPC1 (NR_IRQS_LEGACY + 73) +#define MX51_INT_GPC2 (NR_IRQS_LEGACY + 74) +#define MX51_INT_SRC (NR_IRQS_LEGACY + 75) +#define MX51_INT_NM (NR_IRQS_LEGACY + 76) +#define MX51_INT_PMU (NR_IRQS_LEGACY + 77) +#define MX51_INT_CTI_IRQ (NR_IRQS_LEGACY + 78) +#define MX51_INT_CTI1_TG0 (NR_IRQS_LEGACY + 79) +#define MX51_INT_CTI1_TG1 (NR_IRQS_LEGACY + 80) +#define MX51_INT_MCG_ERR (NR_IRQS_LEGACY + 81) +#define MX51_INT_MCG_TMR (NR_IRQS_LEGACY + 82) +#define MX51_INT_MCG_FUNC (NR_IRQS_LEGACY + 83) +#define MX51_INT_GPU2_IRQ (NR_IRQS_LEGACY + 84) +#define MX51_INT_GPU2_BUSY (NR_IRQS_LEGACY + 85) +#define MX51_INT_RESV86 (NR_IRQS_LEGACY + 86) +#define MX51_INT_FEC (NR_IRQS_LEGACY + 87) +#define MX51_INT_OWIRE (NR_IRQS_LEGACY + 88) +#define MX51_INT_CTI1_TG2 (NR_IRQS_LEGACY + 89) +#define MX51_INT_SJC (NR_IRQS_LEGACY + 90) +#define MX51_INT_SPDIF (NR_IRQS_LEGACY + 91) +#define MX51_INT_TVE (NR_IRQS_LEGACY + 92) +#define MX51_INT_FIRI (NR_IRQS_LEGACY + 93) +#define MX51_INT_PWM2 (NR_IRQS_LEGACY + 94) +#define MX51_INT_SLIM_EXP (NR_IRQS_LEGACY + 95) +#define MX51_INT_SSI3 (NR_IRQS_LEGACY + 96) +#define MX51_INT_EMI_BOOT (NR_IRQS_LEGACY + 97) +#define MX51_INT_CTI1_TG3 (NR_IRQS_LEGACY + 98) +#define MX51_INT_SMC_RX (NR_IRQS_LEGACY + 99) +#define MX51_INT_VPU_IDLE (NR_IRQS_LEGACY + 100) +#define MX51_INT_EMI_NFC (NR_IRQS_LEGACY + 101) +#define MX51_INT_GPU_IDLE (NR_IRQS_LEGACY + 102) #if !defined(__ASSEMBLY__) && !defined(__MXC_BOOT_UNCOMPRESS) extern int mx51_revision(void); diff --git a/arch/arm/plat-mxc/include/mach/mx53.h b/arch/arm/plat-mxc/include/mach/mx53.h index a37e8c353994..f829d1c22501 100644 --- a/arch/arm/plat-mxc/include/mach/mx53.h +++ b/arch/arm/plat-mxc/include/mach/mx53.h @@ -229,113 +229,114 @@ /* * Interrupt numbers */ -#define MX53_INT_RESV0 0 -#define MX53_INT_ESDHC1 1 -#define MX53_INT_ESDHC2 2 -#define MX53_INT_ESDHC3 3 -#define MX53_INT_ESDHC4 4 -#define MX53_INT_DAP 5 -#define MX53_INT_SDMA 6 -#define MX53_INT_IOMUX 7 -#define MX53_INT_NFC 8 -#define MX53_INT_VPU 9 -#define MX53_INT_IPU_ERR 10 -#define MX53_INT_IPU_SYN 11 -#define MX53_INT_GPU 12 -#define MX53_INT_UART4 13 -#define MX53_INT_USB_H1 14 -#define MX53_INT_EMI 15 -#define MX53_INT_USB_H2 16 -#define MX53_INT_USB_H3 17 -#define MX53_INT_USB_OTG 18 -#define MX53_INT_SAHARA_H0 19 -#define MX53_INT_SAHARA_H1 20 -#define MX53_INT_SCC_SMN 21 -#define MX53_INT_SCC_STZ 22 -#define MX53_INT_SCC_SCM 23 -#define MX53_INT_SRTC_NTZ 24 -#define MX53_INT_SRTC_TZ 25 -#define MX53_INT_RTIC 26 -#define MX53_INT_CSU 27 -#define MX53_INT_SATA 28 -#define MX53_INT_SSI1 29 -#define MX53_INT_SSI2 30 -#define MX53_INT_UART1 31 -#define MX53_INT_UART2 32 -#define MX53_INT_UART3 33 -#define MX53_INT_RTC 34 -#define MX53_INT_PTP 35 -#define MX53_INT_ECSPI1 36 -#define MX53_INT_ECSPI2 37 -#define MX53_INT_CSPI 38 -#define MX53_INT_GPT 39 -#define MX53_INT_EPIT1 40 -#define MX53_INT_EPIT2 41 -#define MX53_INT_GPIO1_INT7 42 -#define MX53_INT_GPIO1_INT6 43 -#define MX53_INT_GPIO1_INT5 44 -#define MX53_INT_GPIO1_INT4 45 -#define MX53_INT_GPIO1_INT3 46 -#define MX53_INT_GPIO1_INT2 47 -#define MX53_INT_GPIO1_INT1 48 -#define MX53_INT_GPIO1_INT0 49 -#define MX53_INT_GPIO1_LOW 50 -#define MX53_INT_GPIO1_HIGH 51 -#define MX53_INT_GPIO2_LOW 52 -#define MX53_INT_GPIO2_HIGH 53 -#define MX53_INT_GPIO3_LOW 54 -#define MX53_INT_GPIO3_HIGH 55 -#define MX53_INT_GPIO4_LOW 56 -#define MX53_INT_GPIO4_HIGH 57 -#define MX53_INT_WDOG1 58 -#define MX53_INT_WDOG2 59 -#define MX53_INT_KPP 60 -#define MX53_INT_PWM1 61 -#define MX53_INT_I2C1 62 -#define MX53_INT_I2C2 63 -#define MX53_INT_I2C3 64 -#define MX53_INT_MLB 65 -#define MX53_INT_ASRC 66 -#define MX53_INT_SPDIF 67 -#define MX53_INT_SIM_DAT 68 -#define MX53_INT_IIM 69 -#define MX53_INT_ATA 70 -#define MX53_INT_CCM1 71 -#define MX53_INT_CCM2 72 -#define MX53_INT_GPC1 73 -#define MX53_INT_GPC2 74 -#define MX53_INT_SRC 75 -#define MX53_INT_NM 76 -#define MX53_INT_PMU 77 -#define MX53_INT_CTI_IRQ 78 -#define MX53_INT_CTI1_TG0 79 -#define MX53_INT_CTI1_TG1 80 -#define MX53_INT_ESAI 81 -#define MX53_INT_CAN1 82 -#define MX53_INT_CAN2 83 -#define MX53_INT_GPU2_IRQ 84 -#define MX53_INT_GPU2_BUSY 85 -#define MX53_INT_UART5 86 -#define MX53_INT_FEC 87 -#define MX53_INT_OWIRE 88 -#define MX53_INT_CTI1_TG2 89 -#define MX53_INT_SJC 90 -#define MX53_INT_TVE 92 -#define MX53_INT_FIRI 93 -#define MX53_INT_PWM2 94 -#define MX53_INT_SLIM_EXP 95 -#define MX53_INT_SSI3 96 -#define MX53_INT_EMI_BOOT 97 -#define MX53_INT_CTI1_TG3 98 -#define MX53_INT_SMC_RX 99 -#define MX53_INT_VPU_IDLE 100 -#define MX53_INT_EMI_NFC 101 -#define MX53_INT_GPU_IDLE 102 -#define MX53_INT_GPIO5_LOW 103 -#define MX53_INT_GPIO5_HIGH 104 -#define MX53_INT_GPIO6_LOW 105 -#define MX53_INT_GPIO6_HIGH 106 -#define MX53_INT_GPIO7_LOW 107 -#define MX53_INT_GPIO7_HIGH 108 +#include +#define MX53_INT_RESV0 (NR_IRQS_LEGACY + 0) +#define MX53_INT_ESDHC1 (NR_IRQS_LEGACY + 1) +#define MX53_INT_ESDHC2 (NR_IRQS_LEGACY + 2) +#define MX53_INT_ESDHC3 (NR_IRQS_LEGACY + 3) +#define MX53_INT_ESDHC4 (NR_IRQS_LEGACY + 4) +#define MX53_INT_DAP (NR_IRQS_LEGACY + 5) +#define MX53_INT_SDMA (NR_IRQS_LEGACY + 6) +#define MX53_INT_IOMUX (NR_IRQS_LEGACY + 7) +#define MX53_INT_NFC (NR_IRQS_LEGACY + 8) +#define MX53_INT_VPU (NR_IRQS_LEGACY + 9) +#define MX53_INT_IPU_ERR (NR_IRQS_LEGACY + 10) +#define MX53_INT_IPU_SYN (NR_IRQS_LEGACY + 11) +#define MX53_INT_GPU (NR_IRQS_LEGACY + 12) +#define MX53_INT_UART4 (NR_IRQS_LEGACY + 13) +#define MX53_INT_USB_H1 (NR_IRQS_LEGACY + 14) +#define MX53_INT_EMI (NR_IRQS_LEGACY + 15) +#define MX53_INT_USB_H2 (NR_IRQS_LEGACY + 16) +#define MX53_INT_USB_H3 (NR_IRQS_LEGACY + 17) +#define MX53_INT_USB_OTG (NR_IRQS_LEGACY + 18) +#define MX53_INT_SAHARA_H0 (NR_IRQS_LEGACY + 19) +#define MX53_INT_SAHARA_H1 (NR_IRQS_LEGACY + 20) +#define MX53_INT_SCC_SMN (NR_IRQS_LEGACY + 21) +#define MX53_INT_SCC_STZ (NR_IRQS_LEGACY + 22) +#define MX53_INT_SCC_SCM (NR_IRQS_LEGACY + 23) +#define MX53_INT_SRTC_NTZ (NR_IRQS_LEGACY + 24) +#define MX53_INT_SRTC_TZ (NR_IRQS_LEGACY + 25) +#define MX53_INT_RTIC (NR_IRQS_LEGACY + 26) +#define MX53_INT_CSU (NR_IRQS_LEGACY + 27) +#define MX53_INT_SATA (NR_IRQS_LEGACY + 28) +#define MX53_INT_SSI1 (NR_IRQS_LEGACY + 29) +#define MX53_INT_SSI2 (NR_IRQS_LEGACY + 30) +#define MX53_INT_UART1 (NR_IRQS_LEGACY + 31) +#define MX53_INT_UART2 (NR_IRQS_LEGACY + 32) +#define MX53_INT_UART3 (NR_IRQS_LEGACY + 33) +#define MX53_INT_RTC (NR_IRQS_LEGACY + 34) +#define MX53_INT_PTP (NR_IRQS_LEGACY + 35) +#define MX53_INT_ECSPI1 (NR_IRQS_LEGACY + 36) +#define MX53_INT_ECSPI2 (NR_IRQS_LEGACY + 37) +#define MX53_INT_CSPI (NR_IRQS_LEGACY + 38) +#define MX53_INT_GPT (NR_IRQS_LEGACY + 39) +#define MX53_INT_EPIT1 (NR_IRQS_LEGACY + 40) +#define MX53_INT_EPIT2 (NR_IRQS_LEGACY + 41) +#define MX53_INT_GPIO1_INT7 (NR_IRQS_LEGACY + 42) +#define MX53_INT_GPIO1_INT6 (NR_IRQS_LEGACY + 43) +#define MX53_INT_GPIO1_INT5 (NR_IRQS_LEGACY + 44) +#define MX53_INT_GPIO1_INT4 (NR_IRQS_LEGACY + 45) +#define MX53_INT_GPIO1_INT3 (NR_IRQS_LEGACY + 46) +#define MX53_INT_GPIO1_INT2 (NR_IRQS_LEGACY + 47) +#define MX53_INT_GPIO1_INT1 (NR_IRQS_LEGACY + 48) +#define MX53_INT_GPIO1_INT0 (NR_IRQS_LEGACY + 49) +#define MX53_INT_GPIO1_LOW (NR_IRQS_LEGACY + 50) +#define MX53_INT_GPIO1_HIGH (NR_IRQS_LEGACY + 51) +#define MX53_INT_GPIO2_LOW (NR_IRQS_LEGACY + 52) +#define MX53_INT_GPIO2_HIGH (NR_IRQS_LEGACY + 53) +#define MX53_INT_GPIO3_LOW (NR_IRQS_LEGACY + 54) +#define MX53_INT_GPIO3_HIGH (NR_IRQS_LEGACY + 55) +#define MX53_INT_GPIO4_LOW (NR_IRQS_LEGACY + 56) +#define MX53_INT_GPIO4_HIGH (NR_IRQS_LEGACY + 57) +#define MX53_INT_WDOG1 (NR_IRQS_LEGACY + 58) +#define MX53_INT_WDOG2 (NR_IRQS_LEGACY + 59) +#define MX53_INT_KPP (NR_IRQS_LEGACY + 60) +#define MX53_INT_PWM1 (NR_IRQS_LEGACY + 61) +#define MX53_INT_I2C1 (NR_IRQS_LEGACY + 62) +#define MX53_INT_I2C2 (NR_IRQS_LEGACY + 63) +#define MX53_INT_I2C3 (NR_IRQS_LEGACY + 64) +#define MX53_INT_MLB (NR_IRQS_LEGACY + 65) +#define MX53_INT_ASRC (NR_IRQS_LEGACY + 66) +#define MX53_INT_SPDIF (NR_IRQS_LEGACY + 67) +#define MX53_INT_SIM_DAT (NR_IRQS_LEGACY + 68) +#define MX53_INT_IIM (NR_IRQS_LEGACY + 69) +#define MX53_INT_ATA (NR_IRQS_LEGACY + 70) +#define MX53_INT_CCM1 (NR_IRQS_LEGACY + 71) +#define MX53_INT_CCM2 (NR_IRQS_LEGACY + 72) +#define MX53_INT_GPC1 (NR_IRQS_LEGACY + 73) +#define MX53_INT_GPC2 (NR_IRQS_LEGACY + 74) +#define MX53_INT_SRC (NR_IRQS_LEGACY + 75) +#define MX53_INT_NM (NR_IRQS_LEGACY + 76) +#define MX53_INT_PMU (NR_IRQS_LEGACY + 77) +#define MX53_INT_CTI_IRQ (NR_IRQS_LEGACY + 78) +#define MX53_INT_CTI1_TG0 (NR_IRQS_LEGACY + 79) +#define MX53_INT_CTI1_TG1 (NR_IRQS_LEGACY + 80) +#define MX53_INT_ESAI (NR_IRQS_LEGACY + 81) +#define MX53_INT_CAN1 (NR_IRQS_LEGACY + 82) +#define MX53_INT_CAN2 (NR_IRQS_LEGACY + 83) +#define MX53_INT_GPU2_IRQ (NR_IRQS_LEGACY + 84) +#define MX53_INT_GPU2_BUSY (NR_IRQS_LEGACY + 85) +#define MX53_INT_UART5 (NR_IRQS_LEGACY + 86) +#define MX53_INT_FEC (NR_IRQS_LEGACY + 87) +#define MX53_INT_OWIRE (NR_IRQS_LEGACY + 88) +#define MX53_INT_CTI1_TG2 (NR_IRQS_LEGACY + 89) +#define MX53_INT_SJC (NR_IRQS_LEGACY + 90) +#define MX53_INT_TVE (NR_IRQS_LEGACY + 92) +#define MX53_INT_FIRI (NR_IRQS_LEGACY + 93) +#define MX53_INT_PWM2 (NR_IRQS_LEGACY + 94) +#define MX53_INT_SLIM_EXP (NR_IRQS_LEGACY + 95) +#define MX53_INT_SSI3 (NR_IRQS_LEGACY + 96) +#define MX53_INT_EMI_BOOT (NR_IRQS_LEGACY + 97) +#define MX53_INT_CTI1_TG3 (NR_IRQS_LEGACY + 98) +#define MX53_INT_SMC_RX (NR_IRQS_LEGACY + 99) +#define MX53_INT_VPU_IDLE (NR_IRQS_LEGACY + 100) +#define MX53_INT_EMI_NFC (NR_IRQS_LEGACY + 101) +#define MX53_INT_GPU_IDLE (NR_IRQS_LEGACY + 102) +#define MX53_INT_GPIO5_LOW (NR_IRQS_LEGACY + 103) +#define MX53_INT_GPIO5_HIGH (NR_IRQS_LEGACY + 104) +#define MX53_INT_GPIO6_LOW (NR_IRQS_LEGACY + 105) +#define MX53_INT_GPIO6_HIGH (NR_IRQS_LEGACY + 106) +#define MX53_INT_GPIO7_LOW (NR_IRQS_LEGACY + 107) +#define MX53_INT_GPIO7_HIGH (NR_IRQS_LEGACY + 108) #endif /* ifndef __MACH_MX53_H__ */ diff --git a/drivers/media/video/mx1_camera.c b/drivers/media/video/mx1_camera.c index 4296a8350298..d2e6f82ecfac 100644 --- a/drivers/media/video/mx1_camera.c +++ b/drivers/media/video/mx1_camera.c @@ -43,6 +43,7 @@ #include #include #include +#include #include /* diff --git a/sound/soc/fsl/imx-pcm-fiq.c b/sound/soc/fsl/imx-pcm-fiq.c index 456b7d723d66..ee27ba3933bd 100644 --- a/sound/soc/fsl/imx-pcm-fiq.c +++ b/sound/soc/fsl/imx-pcm-fiq.c @@ -29,6 +29,7 @@ #include +#include #include #include "imx-ssi.h" -- cgit v1.2.3 From 4dab0e5fe8ceaaf267003b5d7aa0c31c1092bee0 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Thu, 5 Jul 2012 22:52:34 -0300 Subject: [media] em28xx: fix em28xx-rc load The logic that checks if a device has remote control is wrong. Due to that, the em28xx RC module is not loaded by default. Fix the logic, in order to make it work properly. Signed-off-by: Mauro Carvalho Chehab --- drivers/media/video/em28xx/em28xx-cards.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers/media/video') diff --git a/drivers/media/video/em28xx/em28xx-cards.c b/drivers/media/video/em28xx/em28xx-cards.c index 92da7c28b6f0..862c6575c557 100644 --- a/drivers/media/video/em28xx/em28xx-cards.c +++ b/drivers/media/video/em28xx/em28xx-cards.c @@ -2893,7 +2893,7 @@ static void request_module_async(struct work_struct *work) if (dev->board.has_dvb) request_module("em28xx-dvb"); - if (dev->board.has_ir_i2c && !disable_ir) + if (dev->board.ir_codes && !disable_ir) request_module("em28xx-rc"); } -- cgit v1.2.3 From a7deca6fa79d5c65575532e780f3c93f6bf8ddad Mon Sep 17 00:00:00 2001 From: David Dillow Date: Mon, 18 Jun 2012 00:15:21 -0300 Subject: [media] cx231xx: don't DMA to random addresses Commit 7a6f6c29d264cdd2fe0eb3d923217eed5f0ad134 (cx231xx: use URB_NO_TRANSFER_DMA_MAP) was intended to avoid mapping the DMA buffer for URB twice. This works for the URBs allocated with usb_alloc_urb(), as those are allocated from cohernent DMA pools, but the flag was also added for the VBI and audio URBs, which have a manually allocated area. This leaves the random trash in the structure after allocation as the DMA address, corrupting memory and preventing VBI and audio from working. Letting the USB core map the buffers solves the problem. Cc: stable@kernel.org Signed-off-by: David Dillow Cc: Sri Deevi Signed-off-by: Mauro Carvalho Chehab --- drivers/media/video/cx231xx/cx231xx-audio.c | 4 ++-- drivers/media/video/cx231xx/cx231xx-vbi.c | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) (limited to 'drivers/media/video') diff --git a/drivers/media/video/cx231xx/cx231xx-audio.c b/drivers/media/video/cx231xx/cx231xx-audio.c index 068f78dc5d13..b4c99c7270cf 100644 --- a/drivers/media/video/cx231xx/cx231xx-audio.c +++ b/drivers/media/video/cx231xx/cx231xx-audio.c @@ -307,7 +307,7 @@ static int cx231xx_init_audio_isoc(struct cx231xx *dev) urb->context = dev; urb->pipe = usb_rcvisocpipe(dev->udev, dev->adev.end_point_addr); - urb->transfer_flags = URB_ISO_ASAP | URB_NO_TRANSFER_DMA_MAP; + urb->transfer_flags = URB_ISO_ASAP; urb->transfer_buffer = dev->adev.transfer_buffer[i]; urb->interval = 1; urb->complete = cx231xx_audio_isocirq; @@ -368,7 +368,7 @@ static int cx231xx_init_audio_bulk(struct cx231xx *dev) urb->context = dev; urb->pipe = usb_rcvbulkpipe(dev->udev, dev->adev.end_point_addr); - urb->transfer_flags = URB_NO_TRANSFER_DMA_MAP; + urb->transfer_flags = 0; urb->transfer_buffer = dev->adev.transfer_buffer[i]; urb->complete = cx231xx_audio_bulkirq; urb->transfer_buffer_length = sb_size; diff --git a/drivers/media/video/cx231xx/cx231xx-vbi.c b/drivers/media/video/cx231xx/cx231xx-vbi.c index 3d15314e1f88..ac7db52f404f 100644 --- a/drivers/media/video/cx231xx/cx231xx-vbi.c +++ b/drivers/media/video/cx231xx/cx231xx-vbi.c @@ -448,7 +448,7 @@ int cx231xx_init_vbi_isoc(struct cx231xx *dev, int max_packets, return -ENOMEM; } dev->vbi_mode.bulk_ctl.urb[i] = urb; - urb->transfer_flags = URB_NO_TRANSFER_DMA_MAP; + urb->transfer_flags = 0; dev->vbi_mode.bulk_ctl.transfer_buffer[i] = kzalloc(sb_size, GFP_KERNEL); -- cgit v1.2.3 From a65c3262a766311d4704a9ea29354480c5e8590d Mon Sep 17 00:00:00 2001 From: Kamil Debski Date: Tue, 26 Jun 2012 04:44:40 -0300 Subject: [media] s5p-mfc: Fixed setup of custom controls in decoder and encoder Fixed bugs in functions that initialize custom controls. Signed-off-by: Kamil Debski Signed-off-by: Kyungmin Park Signed-off-by: Mauro Carvalho Chehab --- drivers/media/video/s5p-mfc/s5p_mfc_dec.c | 1 + drivers/media/video/s5p-mfc/s5p_mfc_enc.c | 1 + 2 files changed, 2 insertions(+) (limited to 'drivers/media/video') diff --git a/drivers/media/video/s5p-mfc/s5p_mfc_dec.c b/drivers/media/video/s5p-mfc/s5p_mfc_dec.c index 4dd32fc8fd82..feea867f318c 100644 --- a/drivers/media/video/s5p-mfc/s5p_mfc_dec.c +++ b/drivers/media/video/s5p-mfc/s5p_mfc_dec.c @@ -996,6 +996,7 @@ int s5p_mfc_dec_ctrls_setup(struct s5p_mfc_ctx *ctx) for (i = 0; i < NUM_CTRLS; i++) { if (IS_MFC51_PRIV(controls[i].id)) { + memset(&cfg, 0, sizeof(struct v4l2_ctrl_config)); cfg.ops = &s5p_mfc_dec_ctrl_ops; cfg.id = controls[i].id; cfg.min = controls[i].minimum; diff --git a/drivers/media/video/s5p-mfc/s5p_mfc_enc.c b/drivers/media/video/s5p-mfc/s5p_mfc_enc.c index 03d83340e7fb..158b78989b89 100644 --- a/drivers/media/video/s5p-mfc/s5p_mfc_enc.c +++ b/drivers/media/video/s5p-mfc/s5p_mfc_enc.c @@ -1773,6 +1773,7 @@ int s5p_mfc_enc_ctrls_setup(struct s5p_mfc_ctx *ctx) } for (i = 0; i < NUM_CTRLS; i++) { if (IS_MFC51_PRIV(controls[i].id)) { + memset(&cfg, 0, sizeof(struct v4l2_ctrl_config)); cfg.ops = &s5p_mfc_enc_ctrl_ops; cfg.id = controls[i].id; cfg.min = controls[i].minimum; -- cgit v1.2.3 From ba50e7e16b86e25048290b682f7a4e09e069d321 Mon Sep 17 00:00:00 2001 From: Devin Heitmueller Date: Sun, 1 Jul 2012 16:15:09 -0300 Subject: [media] cx25840: fix regression in HVR-1800 analog support The refactoring of the cx25840 driver to support the cx23888 caused breakage with the existing support for cx23885/cx23887 analog support. Rework the routines such that the new code is only used for the 888. Validated with the following boards: HVR-1800 retail (0070:7801) HVR-1800 OEM (0070:7809) HVR_1850 retail (0070:8541) Thanks to Steven Toth and Hauppauge for loaning me various boards to regression test with. Reported-by: Jonathan Thanks-to: Steven Toth Signed-off-by: Devin Heitmueler Signed-off-by: Mauro Carvalho Chehab --- drivers/media/video/cx25840/cx25840-core.c | 23 +++++++++++++---------- 1 file changed, 13 insertions(+), 10 deletions(-) (limited to 'drivers/media/video') diff --git a/drivers/media/video/cx25840/cx25840-core.c b/drivers/media/video/cx25840/cx25840-core.c index fc1ff69cffd0..a82b7045f8c9 100644 --- a/drivers/media/video/cx25840/cx25840-core.c +++ b/drivers/media/video/cx25840/cx25840-core.c @@ -84,7 +84,7 @@ MODULE_PARM_DESC(debug, "Debugging messages [0=Off (default) 1=On]"); /* ----------------------------------------------------------------------- */ -static void cx23885_std_setup(struct i2c_client *client); +static void cx23888_std_setup(struct i2c_client *client); int cx25840_write(struct i2c_client *client, u16 addr, u8 value) { @@ -638,10 +638,13 @@ static void cx23885_initialize(struct i2c_client *client) finish_wait(&state->fw_wait, &wait); destroy_workqueue(q); - /* Call the cx23885 specific std setup func, we no longer rely on + /* Call the cx23888 specific std setup func, we no longer rely on * the generic cx24840 func. */ - cx23885_std_setup(client); + if (is_cx23888(state)) + cx23888_std_setup(client); + else + cx25840_std_setup(client); /* (re)set input */ set_input(client, state->vid_input, state->aud_input); @@ -1298,8 +1301,8 @@ static int set_v4lstd(struct i2c_client *client) } cx25840_and_or(client, 0x400, ~0xf, fmt); cx25840_and_or(client, 0x403, ~0x3, pal_m); - if (is_cx2388x(state)) - cx23885_std_setup(client); + if (is_cx23888(state)) + cx23888_std_setup(client); else cx25840_std_setup(client); if (!is_cx2583x(state)) @@ -1782,8 +1785,8 @@ static int cx25840_s_video_routing(struct v4l2_subdev *sd, struct cx25840_state *state = to_state(sd); struct i2c_client *client = v4l2_get_subdevdata(sd); - if (is_cx2388x(state)) - cx23885_std_setup(client); + if (is_cx23888(state)) + cx23888_std_setup(client); return set_input(client, input, state->aud_input); } @@ -1794,8 +1797,8 @@ static int cx25840_s_audio_routing(struct v4l2_subdev *sd, struct cx25840_state *state = to_state(sd); struct i2c_client *client = v4l2_get_subdevdata(sd); - if (is_cx2388x(state)) - cx23885_std_setup(client); + if (is_cx23888(state)) + cx23888_std_setup(client); return set_input(client, state->vid_input, input); } @@ -4939,7 +4942,7 @@ void cx23885_dif_setup(struct i2c_client *client, u32 ifHz) } } -static void cx23885_std_setup(struct i2c_client *client) +static void cx23888_std_setup(struct i2c_client *client) { struct cx25840_state *state = to_state(i2c_get_clientdata(client)); v4l2_std_id std = state->std; -- cgit v1.2.3 From e6d0db1d47c0ac4d61c842a95988cbe8712df447 Mon Sep 17 00:00:00 2001 From: Devin Heitmueller Date: Sun, 1 Jul 2012 16:15:10 -0300 Subject: [media] cx25840: fix regression in analog support hue/saturation controls Fix regression in HVR-1800 analog support hue/saturation controls. The changes made for the cx23888 caused regressions in the analog support for cx23885/cx23887 based boards (partly due to changes in the locations of the hue/saturation controls). As a result the wrong registers were being overwritten. Add code to use the correct registers if it's a cx23888 Validated with the following boards: HVR-1800 retail (0070:7801) HVR-1800 OEM (0070:7809) HVR-1850 retail (0070:8541) Thanks to Steven Toth and Hauppauge for loaning me various boards to regression test with. Reported-by: Jonathan Thanks-to: Steven Toth Signed-off-by: Devin Heitmueler Signed-off-by: Mauro Carvalho Chehab --- drivers/media/video/cx25840/cx25840-core.c | 33 +++++++++++++++++++++++++----- 1 file changed, 28 insertions(+), 5 deletions(-) (limited to 'drivers/media/video') diff --git a/drivers/media/video/cx25840/cx25840-core.c b/drivers/media/video/cx25840/cx25840-core.c index a82b7045f8c9..e12b3b0d7f35 100644 --- a/drivers/media/video/cx25840/cx25840-core.c +++ b/drivers/media/video/cx25840/cx25840-core.c @@ -1106,9 +1106,23 @@ static int set_input(struct i2c_client *client, enum cx25840_video_input vid_inp cx25840_write4(client, 0x410, 0xffff0dbf); cx25840_write4(client, 0x414, 0x00137d03); - cx25840_write4(client, 0x418, 0x01008080); + + /* on the 887, 0x418 is HSCALE_CTRL, on the 888 it is + CHROMA_CTRL */ + if (is_cx23888(state)) + cx25840_write4(client, 0x418, 0x01008080); + else + cx25840_write4(client, 0x418, 0x01000000); + cx25840_write4(client, 0x41c, 0x00000000); - cx25840_write4(client, 0x420, 0x001c3e0f); + + /* on the 887, 0x420 is CHROMA_CTRL, on the 888 it is + CRUSH_CTRL */ + if (is_cx23888(state)) + cx25840_write4(client, 0x420, 0x001c3e0f); + else + cx25840_write4(client, 0x420, 0x001c8282); + cx25840_write4(client, 0x42c, 0x42600000); cx25840_write4(client, 0x430, 0x0000039b); cx25840_write4(client, 0x438, 0x00000000); @@ -1315,6 +1329,7 @@ static int set_v4lstd(struct i2c_client *client) static int cx25840_s_ctrl(struct v4l2_ctrl *ctrl) { struct v4l2_subdev *sd = to_sd(ctrl); + struct cx25840_state *state = to_state(sd); struct i2c_client *client = v4l2_get_subdevdata(sd); switch (ctrl->id) { @@ -1327,12 +1342,20 @@ static int cx25840_s_ctrl(struct v4l2_ctrl *ctrl) break; case V4L2_CID_SATURATION: - cx25840_write(client, 0x420, ctrl->val << 1); - cx25840_write(client, 0x421, ctrl->val << 1); + if (is_cx23888(state)) { + cx25840_write(client, 0x418, ctrl->val << 1); + cx25840_write(client, 0x419, ctrl->val << 1); + } else { + cx25840_write(client, 0x420, ctrl->val << 1); + cx25840_write(client, 0x421, ctrl->val << 1); + } break; case V4L2_CID_HUE: - cx25840_write(client, 0x422, ctrl->val); + if (is_cx23888(state)) + cx25840_write(client, 0x41a, ctrl->val); + else + cx25840_write(client, 0x422, ctrl->val); break; default: -- cgit v1.2.3 From d90133ec58d4fad822ff322557b6885c5b77f127 Mon Sep 17 00:00:00 2001 From: Devin Heitmueller Date: Sun, 1 Jul 2012 16:15:11 -0300 Subject: [media] cx25840: fix regression in HVR-1800 analog audio The refactoring of the cx25840 driver to support the cx23888 caused breakage with the existing support for cx23885/cx23887 analog audio support. Tweak the code so that it only uses the code if it really is a cx23888 instead of applying it to all cx2388x based devices. Validated with the following boards: HVR-1800 retail (0070:7801) HVR-1800 OEM (0070:7809) HVR_1850 retail (0070:8541) Thanks to Steven Toth and Hauppauge for loaning me various boards to regression test with. Reported-by: Jonathan Thanks-to: Steven Toth Signed-off-by: Devin Heitmueler Signed-off-by: Mauro Carvalho Chehab --- drivers/media/video/cx25840/cx25840-core.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers/media/video') diff --git a/drivers/media/video/cx25840/cx25840-core.c b/drivers/media/video/cx25840/cx25840-core.c index e12b3b0d7f35..7dc7bb155dff 100644 --- a/drivers/media/video/cx25840/cx25840-core.c +++ b/drivers/media/video/cx25840/cx25840-core.c @@ -1250,7 +1250,7 @@ static int set_input(struct i2c_client *client, enum cx25840_video_input vid_inp cx25840_write4(client, 0x8d0, 0x1f063870); } - if (is_cx2388x(state)) { + if (is_cx23888(state)) { /* HVR1850 */ /* AUD_IO_CTRL - I2S Input, Parallel1*/ /* - Channel 1 src - Parallel1 (Merlin out) */ -- cgit v1.2.3 From b5c5c17babfaf83f274ca8f0a7660284882d8d4d Mon Sep 17 00:00:00 2001 From: Devin Heitmueller Date: Sun, 1 Jul 2012 16:15:12 -0300 Subject: [media] cx25840: fix vsrc/hsrc usage on cx23888 designs The location of the vsrc/hsrc registers moved in the cx23888, causing the s_mbus call to fail prematurely indicating that "720x480 is not a valid size". The function bailed out before many pertinent registers were set related to the scaler (causing unexpected results in video rendering when doing raw video capture). Use the correct registers for the cx23888. Validated with the following boards: HVR-1800 retail (0070:7801) HVR-1800 OEM (0070:7809) HVR-1850 retail (0070:8541) Thanks to Steven Toth and Hauppauge for loaning me various boards to regression test with. Reported-by: Jonathan Thanks-to: Steven Toth Signed-off-by: Devin Heitmueler Signed-off-by: Mauro Carvalho Chehab --- drivers/media/video/cx25840/cx25840-core.c | 18 ++++++++++++++---- 1 file changed, 14 insertions(+), 4 deletions(-) (limited to 'drivers/media/video') diff --git a/drivers/media/video/cx25840/cx25840-core.c b/drivers/media/video/cx25840/cx25840-core.c index 7dc7bb155dff..d8eac3e30a7e 100644 --- a/drivers/media/video/cx25840/cx25840-core.c +++ b/drivers/media/video/cx25840/cx25840-core.c @@ -1380,11 +1380,21 @@ static int cx25840_s_mbus_fmt(struct v4l2_subdev *sd, struct v4l2_mbus_framefmt fmt->field = V4L2_FIELD_INTERLACED; fmt->colorspace = V4L2_COLORSPACE_SMPTE170M; - Vsrc = (cx25840_read(client, 0x476) & 0x3f) << 4; - Vsrc |= (cx25840_read(client, 0x475) & 0xf0) >> 4; + if (is_cx23888(state)) { + Vsrc = (cx25840_read(client, 0x42a) & 0x3f) << 4; + Vsrc |= (cx25840_read(client, 0x429) & 0xf0) >> 4; + } else { + Vsrc = (cx25840_read(client, 0x476) & 0x3f) << 4; + Vsrc |= (cx25840_read(client, 0x475) & 0xf0) >> 4; + } - Hsrc = (cx25840_read(client, 0x472) & 0x3f) << 4; - Hsrc |= (cx25840_read(client, 0x471) & 0xf0) >> 4; + if (is_cx23888(state)) { + Hsrc = (cx25840_read(client, 0x426) & 0x3f) << 4; + Hsrc |= (cx25840_read(client, 0x425) & 0xf0) >> 4; + } else { + Hsrc = (cx25840_read(client, 0x472) & 0x3f) << 4; + Hsrc |= (cx25840_read(client, 0x471) & 0xf0) >> 4; + } Vlines = fmt->height + (is_50Hz ? 4 : 7); -- cgit v1.2.3 From d214ddc86807fb1995fd3400347a202826332710 Mon Sep 17 00:00:00 2001 From: Devin Heitmueller Date: Sun, 1 Jul 2012 16:15:13 -0300 Subject: [media] cx23885: make analog support work for HVR_1250 (cx23885 variant) The analog support in the cx23885 driver was completely broken for the HVR-1250. Add the necessary code. Note that this only implements analog for the composite and s-video inputs. The tuner input continues to be non-functional due to a lack of analog support in the mt2131 driver. Validated with the following boards: HVR-1250 (0070:7911) Thanks to Steven Toth and Hauppauge for loaning me various boards to regression test with. Thanks-to: Steven Toth Signed-off-by: Devin Heitmueler Signed-off-by: Mauro Carvalho Chehab --- drivers/media/video/cx23885/cx23885-cards.c | 31 +++++++++++++++++++++-------- drivers/media/video/cx23885/cx23885-video.c | 1 + 2 files changed, 24 insertions(+), 8 deletions(-) (limited to 'drivers/media/video') diff --git a/drivers/media/video/cx23885/cx23885-cards.c b/drivers/media/video/cx23885/cx23885-cards.c index 13739e002a63..f8664f2ccfda 100644 --- a/drivers/media/video/cx23885/cx23885-cards.c +++ b/drivers/media/video/cx23885/cx23885-cards.c @@ -127,22 +127,37 @@ struct cx23885_board cx23885_boards[] = { }, [CX23885_BOARD_HAUPPAUGE_HVR1250] = { .name = "Hauppauge WinTV-HVR1250", + .porta = CX23885_ANALOG_VIDEO, .portc = CX23885_MPEG_DVB, +#ifdef MT2131_NO_ANALOG_SUPPORT_YET + .tuner_type = TUNER_PHILIPS_TDA8290, + .tuner_addr = 0x42, /* 0x84 >> 1 */ + .tuner_bus = 1, +#endif + .force_bff = 1, .input = {{ +#ifdef MT2131_NO_ANALOG_SUPPORT_YET .type = CX23885_VMUX_TELEVISION, - .vmux = 0, + .vmux = CX25840_VIN7_CH3 | + CX25840_VIN5_CH2 | + CX25840_VIN2_CH1, + .amux = CX25840_AUDIO8, .gpio0 = 0xff00, }, { - .type = CX23885_VMUX_DEBUG, - .vmux = 0, - .gpio0 = 0xff01, - }, { +#endif .type = CX23885_VMUX_COMPOSITE1, - .vmux = 1, + .vmux = CX25840_VIN7_CH3 | + CX25840_VIN4_CH2 | + CX25840_VIN6_CH1, + .amux = CX25840_AUDIO7, .gpio0 = 0xff02, }, { .type = CX23885_VMUX_SVIDEO, - .vmux = 2, + .vmux = CX25840_VIN7_CH3 | + CX25840_VIN4_CH2 | + CX25840_VIN8_CH1 | + CX25840_SVIDEO_ON, + .amux = CX25840_AUDIO7, .gpio0 = 0xff02, } }, }, @@ -1526,10 +1541,10 @@ void cx23885_card_setup(struct cx23885_dev *dev) */ switch (dev->board) { case CX23885_BOARD_TEVII_S470: - case CX23885_BOARD_HAUPPAUGE_HVR1250: /* Currently only enabled for the integrated IR controller */ if (!enable_885_ir) break; + case CX23885_BOARD_HAUPPAUGE_HVR1250: case CX23885_BOARD_HAUPPAUGE_HVR1800: case CX23885_BOARD_HAUPPAUGE_HVR1800lp: case CX23885_BOARD_HAUPPAUGE_HVR1700: diff --git a/drivers/media/video/cx23885/cx23885-video.c b/drivers/media/video/cx23885/cx23885-video.c index c654bdc7ccb2..4d05689df426 100644 --- a/drivers/media/video/cx23885/cx23885-video.c +++ b/drivers/media/video/cx23885/cx23885-video.c @@ -505,6 +505,7 @@ static int cx23885_video_mux(struct cx23885_dev *dev, unsigned int input) if ((dev->board == CX23885_BOARD_HAUPPAUGE_HVR1800) || (dev->board == CX23885_BOARD_MPX885) || + (dev->board == CX23885_BOARD_HAUPPAUGE_HVR1250) || (dev->board == CX23885_BOARD_HAUPPAUGE_HVR1850)) { /* Configure audio routing */ v4l2_subdev_call(dev->sd_cx25840, audio, s_routing, -- cgit v1.2.3 From 0ac60acb5491df565141c0e3a87d7148a865fe36 Mon Sep 17 00:00:00 2001 From: Devin Heitmueller Date: Sun, 1 Jul 2012 16:15:14 -0300 Subject: [media] cx23885: add support for HVR-1255 analog (cx23888 variant) Get the HVR-1255 analog support working for all supported inputs. This includes introduction of a new board profile for an OEM variant which doesn't have all the same inputs as the retail version of the board. Validated with the following boards: HVR-1255 (0070:2259) Thanks to Steven Toth and Hauppauge for loaning me various boards to regression test with. Thanks-to: Steven Toth Signed-off-by: Devin Heitmueler Signed-off-by: Mauro Carvalho Chehab --- drivers/media/video/cx23885/cx23885-cards.c | 56 ++++++++++++++++++++++++++++- drivers/media/video/cx23885/cx23885-dvb.c | 6 ++++ drivers/media/video/cx23885/cx23885-video.c | 8 ++++- drivers/media/video/cx23885/cx23885.h | 1 + 4 files changed, 69 insertions(+), 2 deletions(-) (limited to 'drivers/media/video') diff --git a/drivers/media/video/cx23885/cx23885-cards.c b/drivers/media/video/cx23885/cx23885-cards.c index f8664f2ccfda..bf79003bd8f6 100644 --- a/drivers/media/video/cx23885/cx23885-cards.c +++ b/drivers/media/video/cx23885/cx23885-cards.c @@ -282,7 +282,55 @@ struct cx23885_board cx23885_boards[] = { }, [CX23885_BOARD_HAUPPAUGE_HVR1255] = { .name = "Hauppauge WinTV-HVR1255", + .porta = CX23885_ANALOG_VIDEO, .portc = CX23885_MPEG_DVB, + .tuner_type = TUNER_ABSENT, + .tuner_addr = 0x42, /* 0x84 >> 1 */ + .force_bff = 1, + .input = {{ + .type = CX23885_VMUX_TELEVISION, + .vmux = CX25840_VIN7_CH3 | + CX25840_VIN5_CH2 | + CX25840_VIN2_CH1 | + CX25840_DIF_ON, + .amux = CX25840_AUDIO8, + }, { + .type = CX23885_VMUX_COMPOSITE1, + .vmux = CX25840_VIN7_CH3 | + CX25840_VIN4_CH2 | + CX25840_VIN6_CH1, + .amux = CX25840_AUDIO7, + }, { + .type = CX23885_VMUX_SVIDEO, + .vmux = CX25840_VIN7_CH3 | + CX25840_VIN4_CH2 | + CX25840_VIN8_CH1 | + CX25840_SVIDEO_ON, + .amux = CX25840_AUDIO7, + } }, + }, + [CX23885_BOARD_HAUPPAUGE_HVR1255_22111] = { + .name = "Hauppauge WinTV-HVR1255", + .porta = CX23885_ANALOG_VIDEO, + .portc = CX23885_MPEG_DVB, + .tuner_type = TUNER_ABSENT, + .tuner_addr = 0x42, /* 0x84 >> 1 */ + .force_bff = 1, + .input = {{ + .type = CX23885_VMUX_TELEVISION, + .vmux = CX25840_VIN7_CH3 | + CX25840_VIN5_CH2 | + CX25840_VIN2_CH1 | + CX25840_DIF_ON, + .amux = CX25840_AUDIO8, + }, { + .type = CX23885_VMUX_SVIDEO, + .vmux = CX25840_VIN7_CH3 | + CX25840_VIN4_CH2 | + CX25840_VIN8_CH1 | + CX25840_SVIDEO_ON, + .amux = CX25840_AUDIO7, + } }, }, [CX23885_BOARD_HAUPPAUGE_HVR1210] = { .name = "Hauppauge WinTV-HVR1210", @@ -639,7 +687,7 @@ struct cx23885_subid cx23885_subids[] = { }, { .subvendor = 0x0070, .subdevice = 0x2259, - .card = CX23885_BOARD_HAUPPAUGE_HVR1255, + .card = CX23885_BOARD_HAUPPAUGE_HVR1255_22111, }, { .subvendor = 0x0070, .subdevice = 0x2291, @@ -1145,6 +1193,7 @@ void cx23885_gpio_setup(struct cx23885_dev *dev) case CX23885_BOARD_HAUPPAUGE_HVR1270: case CX23885_BOARD_HAUPPAUGE_HVR1275: case CX23885_BOARD_HAUPPAUGE_HVR1255: + case CX23885_BOARD_HAUPPAUGE_HVR1255_22111: case CX23885_BOARD_HAUPPAUGE_HVR1210: /* GPIO-5 RF Control: 0 = RF1 Terrestrial, 1 = RF2 Cable */ /* GPIO-6 I2C Gate which can isolate the demod from the bus */ @@ -1282,6 +1331,7 @@ int cx23885_ir_init(struct cx23885_dev *dev) case CX23885_BOARD_HAUPPAUGE_HVR1400: case CX23885_BOARD_HAUPPAUGE_HVR1275: case CX23885_BOARD_HAUPPAUGE_HVR1255: + case CX23885_BOARD_HAUPPAUGE_HVR1255_22111: case CX23885_BOARD_HAUPPAUGE_HVR1210: /* FIXME: Implement me */ break; @@ -1439,6 +1489,7 @@ void cx23885_card_setup(struct cx23885_dev *dev) case CX23885_BOARD_HAUPPAUGE_HVR1270: case CX23885_BOARD_HAUPPAUGE_HVR1275: case CX23885_BOARD_HAUPPAUGE_HVR1255: + case CX23885_BOARD_HAUPPAUGE_HVR1255_22111: case CX23885_BOARD_HAUPPAUGE_HVR1210: case CX23885_BOARD_HAUPPAUGE_HVR1850: case CX23885_BOARD_HAUPPAUGE_HVR1290: @@ -1526,6 +1577,7 @@ void cx23885_card_setup(struct cx23885_dev *dev) case CX23885_BOARD_HAUPPAUGE_HVR1270: case CX23885_BOARD_HAUPPAUGE_HVR1275: case CX23885_BOARD_HAUPPAUGE_HVR1255: + case CX23885_BOARD_HAUPPAUGE_HVR1255_22111: case CX23885_BOARD_HAUPPAUGE_HVR1210: case CX23885_BOARD_COMPRO_VIDEOMATE_E800: case CX23885_BOARD_HAUPPAUGE_HVR1290: @@ -1554,6 +1606,8 @@ void cx23885_card_setup(struct cx23885_dev *dev) case CX23885_BOARD_NETUP_DUAL_DVBS2_CI: case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: case CX23885_BOARD_COMPRO_VIDEOMATE_E800: + case CX23885_BOARD_HAUPPAUGE_HVR1255: + case CX23885_BOARD_HAUPPAUGE_HVR1255_22111: case CX23885_BOARD_HAUPPAUGE_HVR1270: case CX23885_BOARD_HAUPPAUGE_HVR1850: case CX23885_BOARD_MYGICA_X8506: diff --git a/drivers/media/video/cx23885/cx23885-dvb.c b/drivers/media/video/cx23885/cx23885-dvb.c index a80a92c47455..cd542684ba02 100644 --- a/drivers/media/video/cx23885/cx23885-dvb.c +++ b/drivers/media/video/cx23885/cx23885-dvb.c @@ -712,6 +712,7 @@ static int dvb_register(struct cx23885_tsport *port) } break; case CX23885_BOARD_HAUPPAUGE_HVR1255: + case CX23885_BOARD_HAUPPAUGE_HVR1255_22111: i2c_bus = &dev->i2c_bus[0]; fe0->dvb.frontend = dvb_attach(s5h1411_attach, &hcw_s5h1411_config, @@ -721,6 +722,11 @@ static int dvb_register(struct cx23885_tsport *port) 0x60, &dev->i2c_bus[1].i2c_adap, &hauppauge_tda18271_config); } + + tda18271_attach(&dev->ts1.analog_fe, + 0x60, &dev->i2c_bus[1].i2c_adap, + &hauppauge_tda18271_config); + break; case CX23885_BOARD_HAUPPAUGE_HVR1800: i2c_bus = &dev->i2c_bus[0]; diff --git a/drivers/media/video/cx23885/cx23885-video.c b/drivers/media/video/cx23885/cx23885-video.c index 4d05689df426..22f8e7fbd665 100644 --- a/drivers/media/video/cx23885/cx23885-video.c +++ b/drivers/media/video/cx23885/cx23885-video.c @@ -506,6 +506,8 @@ static int cx23885_video_mux(struct cx23885_dev *dev, unsigned int input) if ((dev->board == CX23885_BOARD_HAUPPAUGE_HVR1800) || (dev->board == CX23885_BOARD_MPX885) || (dev->board == CX23885_BOARD_HAUPPAUGE_HVR1250) || + (dev->board == CX23885_BOARD_HAUPPAUGE_HVR1255) || + (dev->board == CX23885_BOARD_HAUPPAUGE_HVR1255_22111) || (dev->board == CX23885_BOARD_HAUPPAUGE_HVR1850)) { /* Configure audio routing */ v4l2_subdev_call(dev->sd_cx25840, audio, s_routing, @@ -1579,7 +1581,9 @@ static int cx23885_set_freq_via_ops(struct cx23885_dev *dev, fe = vfe->dvb.frontend; - if (dev->board == CX23885_BOARD_HAUPPAUGE_HVR1850) + if ((dev->board == CX23885_BOARD_HAUPPAUGE_HVR1850) || + (dev->board == CX23885_BOARD_HAUPPAUGE_HVR1255) || + (dev->board == CX23885_BOARD_HAUPPAUGE_HVR1255_22111)) fe = &dev->ts1.analog_fe; if (fe && fe->ops.tuner_ops.set_analog_params) { @@ -1609,6 +1613,8 @@ int cx23885_set_frequency(struct file *file, void *priv, int ret; switch (dev->board) { + case CX23885_BOARD_HAUPPAUGE_HVR1255: + case CX23885_BOARD_HAUPPAUGE_HVR1255_22111: case CX23885_BOARD_HAUPPAUGE_HVR1850: ret = cx23885_set_freq_via_ops(dev, f); break; diff --git a/drivers/media/video/cx23885/cx23885.h b/drivers/media/video/cx23885/cx23885.h index d884784a1c85..13c37ec07ae7 100644 --- a/drivers/media/video/cx23885/cx23885.h +++ b/drivers/media/video/cx23885/cx23885.h @@ -90,6 +90,7 @@ #define CX23885_BOARD_MYGICA_X8507 33 #define CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL 34 #define CX23885_BOARD_TEVII_S471 35 +#define CX23885_BOARD_HAUPPAUGE_HVR1255_22111 36 #define GPIO_0 0x00000001 #define GPIO_1 0x00000002 -- cgit v1.2.3 From c6cff169268bba9de687acf317ac24aa038cc263 Mon Sep 17 00:00:00 2001 From: Anton Blanchard Date: Sun, 1 Jul 2012 21:38:03 -0300 Subject: [media] cx23885: Silence unknown command warnings I am seeing a constant stream of warnings on my cx23885 based card: cx23885_tuner_callback(): Unknown command 0x2. Add a check in cx23885_tuner_callback to silence it. Signed-off-by: Anton Blanchard Signed-off-by: Mauro Carvalho Chehab --- drivers/media/video/cx23885/cx23885-cards.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers/media/video') diff --git a/drivers/media/video/cx23885/cx23885-cards.c b/drivers/media/video/cx23885/cx23885-cards.c index bf79003bd8f6..080e11157e5f 100644 --- a/drivers/media/video/cx23885/cx23885-cards.c +++ b/drivers/media/video/cx23885/cx23885-cards.c @@ -963,7 +963,7 @@ int cx23885_tuner_callback(void *priv, int component, int command, int arg) struct cx23885_dev *dev = port->dev; u32 bitmask = 0; - if (command == XC2028_RESET_CLK) + if ((command == XC2028_RESET_CLK) || (command == XC2028_I2C_FLUSH)) return 0; if (command != 0) { -- cgit v1.2.3 From 7103180b4385de908d69815dbd6807879d371cbf Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Thu, 5 Jul 2012 14:31:33 -0300 Subject: [media] omap3isp: preview: Fix output size computation depending on input format The preview engine crops 4 columns and 4 lines when CFA is enabled. Commit b2da46e52fe7871cba36e1a435844502c0eccf39 ("omap3isp: preview: Add support for greyscale input") inverted the condition by mistake, fix this. Reported-by: Florian Neuhaus Signed-off-by: Laurent Pinchart Tested-by: Florian Neuhaus Signed-off-by: Mauro Carvalho Chehab --- drivers/media/video/omap3isp/isppreview.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers/media/video') diff --git a/drivers/media/video/omap3isp/isppreview.c b/drivers/media/video/omap3isp/isppreview.c index 8a4935ecc655..a48a747b6fcc 100644 --- a/drivers/media/video/omap3isp/isppreview.c +++ b/drivers/media/video/omap3isp/isppreview.c @@ -1102,7 +1102,7 @@ static void preview_config_input_size(struct isp_prev_device *prev, u32 active) unsigned int elv = prev->crop.top + prev->crop.height - 1; u32 features; - if (format->code == V4L2_MBUS_FMT_Y10_1X10) { + if (format->code != V4L2_MBUS_FMT_Y10_1X10) { sph -= 2; eph += 2; slv -= 2; -- cgit v1.2.3 From 5aedc1094041335598c6aa73c5cf882f30886cd7 Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Fri, 6 Jul 2012 08:41:25 -0300 Subject: [media] omap3isp: preview: Fix contrast and brightness handling Commit bac387efbb88cf0e8df6f46a38387897cea464ee ("omap3isp: preview: Simplify configuration parameters access") added three fields to the preview_update structure, but failed to properly update the related initializers. Fix this. Signed-off-by: Laurent Pinchart Signed-off-by: Mauro Carvalho Chehab --- drivers/media/video/omap3isp/isppreview.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'drivers/media/video') diff --git a/drivers/media/video/omap3isp/isppreview.c b/drivers/media/video/omap3isp/isppreview.c index a48a747b6fcc..dd91da26f1b0 100644 --- a/drivers/media/video/omap3isp/isppreview.c +++ b/drivers/media/video/omap3isp/isppreview.c @@ -888,12 +888,12 @@ static const struct preview_update update_attrs[] = { preview_config_contrast, NULL, offsetof(struct prev_params, contrast), - 0, true, + 0, 0, true, }, /* OMAP3ISP_PREV_BRIGHTNESS */ { preview_config_brightness, NULL, offsetof(struct prev_params, brightness), - 0, true, + 0, 0, true, }, }; -- cgit v1.2.3 From 4e39da01027eb73556c1ad416945e37f2771464e Mon Sep 17 00:00:00 2001 From: Sylwester Nawrocki Date: Mon, 4 Jun 2012 13:15:56 -0300 Subject: [media] s5p-fimc: Add missing FIMC-LITE file operations locking commit 5126f2590bee412e3053de851cb07f531e4be36a "v4l2-dev: add flag to have the core lock all file operations" introduced an additional bit flag (V4L2_FL_LOCK_ALL_FOPS) that should be set by drivers that use the v4l2 core lock for all file operations. Since this driver has been merged at the same time as the core changes it doesn't set this flags and thus its all file operations except IOCTL are not properly serialized. Fix this by adding file ops locking in the driver. Signed-off-by: Sylwester Nawrocki Signed-off-by: Kyungmin Park Signed-off-by: Mauro Carvalho Chehab --- drivers/media/video/s5p-fimc/fimc-lite.c | 61 +++++++++++++++++++++++--------- 1 file changed, 44 insertions(+), 17 deletions(-) (limited to 'drivers/media/video') diff --git a/drivers/media/video/s5p-fimc/fimc-lite.c b/drivers/media/video/s5p-fimc/fimc-lite.c index 4d269b8fa1ef..74ff310db30c 100644 --- a/drivers/media/video/s5p-fimc/fimc-lite.c +++ b/drivers/media/video/s5p-fimc/fimc-lite.c @@ -453,34 +453,42 @@ static int fimc_lite_open(struct file *file) struct fimc_lite *fimc = video_drvdata(file); int ret; + if (mutex_lock_interruptible(&fimc->lock)) + return -ERESTARTSYS; + set_bit(ST_FLITE_IN_USE, &fimc->state); ret = pm_runtime_get_sync(&fimc->pdev->dev); if (ret < 0) - return ret; - - if (++fimc->ref_count != 1 || fimc->out_path != FIMC_IO_DMA) - return 0; + goto done; ret = v4l2_fh_open(file); if (ret < 0) - return ret; + goto done; - ret = fimc_pipeline_initialize(&fimc->pipeline, &fimc->vfd->entity, - true); - if (ret < 0) { - pm_runtime_put_sync(&fimc->pdev->dev); - fimc->ref_count--; - v4l2_fh_release(file); - clear_bit(ST_FLITE_IN_USE, &fimc->state); - } + if (++fimc->ref_count == 1 && fimc->out_path == FIMC_IO_DMA) { + ret = fimc_pipeline_initialize(&fimc->pipeline, + &fimc->vfd->entity, true); + if (ret < 0) { + pm_runtime_put_sync(&fimc->pdev->dev); + fimc->ref_count--; + v4l2_fh_release(file); + clear_bit(ST_FLITE_IN_USE, &fimc->state); + } - fimc_lite_clear_event_counters(fimc); + fimc_lite_clear_event_counters(fimc); + } +done: + mutex_unlock(&fimc->lock); return ret; } static int fimc_lite_close(struct file *file) { struct fimc_lite *fimc = video_drvdata(file); + int ret; + + if (mutex_lock_interruptible(&fimc->lock)) + return -ERESTARTSYS; if (--fimc->ref_count == 0 && fimc->out_path == FIMC_IO_DMA) { clear_bit(ST_FLITE_IN_USE, &fimc->state); @@ -494,20 +502,39 @@ static int fimc_lite_close(struct file *file) if (fimc->ref_count == 0) vb2_queue_release(&fimc->vb_queue); - return v4l2_fh_release(file); + ret = v4l2_fh_release(file); + + mutex_unlock(&fimc->lock); + return ret; } static unsigned int fimc_lite_poll(struct file *file, struct poll_table_struct *wait) { struct fimc_lite *fimc = video_drvdata(file); - return vb2_poll(&fimc->vb_queue, file, wait); + int ret; + + if (mutex_lock_interruptible(&fimc->lock)) + return POLL_ERR; + + ret = vb2_poll(&fimc->vb_queue, file, wait); + mutex_unlock(&fimc->lock); + + return ret; } static int fimc_lite_mmap(struct file *file, struct vm_area_struct *vma) { struct fimc_lite *fimc = video_drvdata(file); - return vb2_mmap(&fimc->vb_queue, vma); + int ret; + + if (mutex_lock_interruptible(&fimc->lock)) + return -ERESTARTSYS; + + ret = vb2_mmap(&fimc->vb_queue, vma); + mutex_unlock(&fimc->lock); + + return ret; } static const struct v4l2_file_operations fimc_lite_fops = { -- cgit v1.2.3 From 6c6ee53c55dd0d3d9c3b42d4770bb82842d99727 Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Sun, 8 Jul 2012 19:41:14 +0200 Subject: gspca_sn9c20x: Fix NULL pointer dereference MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Don't call v4l2_ctrl_g_ctrl on ctrls which the model cam in question does not have. Reported-by: Frank Schäfer Signed-off-by: Hans de Goede [ Taken directly, since Mauro is on vacation ] Signed-off-by: Linus Torvalds --- drivers/media/video/gspca/sn9c20x.c | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-) (limited to 'drivers/media/video') diff --git a/drivers/media/video/gspca/sn9c20x.c b/drivers/media/video/gspca/sn9c20x.c index 6c31e46a1fd2..b9c6f17eabb2 100644 --- a/drivers/media/video/gspca/sn9c20x.c +++ b/drivers/media/video/gspca/sn9c20x.c @@ -2070,10 +2070,13 @@ static int sd_start(struct gspca_dev *gspca_dev) set_gamma(gspca_dev, v4l2_ctrl_g_ctrl(sd->gamma)); set_redblue(gspca_dev, v4l2_ctrl_g_ctrl(sd->blue), v4l2_ctrl_g_ctrl(sd->red)); - set_gain(gspca_dev, v4l2_ctrl_g_ctrl(sd->gain)); - set_exposure(gspca_dev, v4l2_ctrl_g_ctrl(sd->exposure)); - set_hvflip(gspca_dev, v4l2_ctrl_g_ctrl(sd->hflip), - v4l2_ctrl_g_ctrl(sd->vflip)); + if (sd->gain) + set_gain(gspca_dev, v4l2_ctrl_g_ctrl(sd->gain)); + if (sd->exposure) + set_exposure(gspca_dev, v4l2_ctrl_g_ctrl(sd->exposure)); + if (sd->hflip) + set_hvflip(gspca_dev, v4l2_ctrl_g_ctrl(sd->hflip), + v4l2_ctrl_g_ctrl(sd->vflip)); reg_w1(gspca_dev, 0x1007, 0x20); reg_w1(gspca_dev, 0x1061, 0x03); @@ -2176,7 +2179,7 @@ static void sd_dqcallback(struct gspca_dev *gspca_dev) struct sd *sd = (struct sd *) gspca_dev; int avg_lum; - if (!v4l2_ctrl_g_ctrl(sd->autogain)) + if (sd->autogain == NULL || !v4l2_ctrl_g_ctrl(sd->autogain)) return; avg_lum = atomic_read(&sd->avg_lum); -- cgit v1.2.3 From 8a76e5383fb5f58868fdd3a2fe1f4b95988f10a8 Mon Sep 17 00:00:00 2001 From: Javier Martin Date: Wed, 11 Jul 2012 17:34:54 +0200 Subject: media: mx2_camera: Fix mbus format handling Do not use MX2_CAMERA_SWAP16 and MX2_CAMERA_PACK_DIR_MSB flags. The driver must negotiate with the attached sensor whether the mbus format is UYUV or YUYV and set CSICR1 configuration accordingly. This is needed for the video function on mach-imx27_visstrim_m10.c to perform properly, since an earlier version of this patch has been proven wrong and has been reverted and a commit, depending on it: "[media] i.MX27: visstrim_m10: Remove use of MX2_CAMERA_SWAP16" is in the mainline. Signed-off-by: Javier Martin Reviewed-by: Mauro Carvalho Chehab Acked-by: Laurent Pinchart [ g.liakhovetski@gmx.de: move a macro definition to a more logical place ] Signed-off-by: Guennadi Liakhovetski [ Applying directly because Mauro is on vacation - Linus ] Signed-off-by: Linus Torvalds --- drivers/media/video/mx2_camera.c | 27 ++++++++++++++++++++++----- 1 file changed, 22 insertions(+), 5 deletions(-) (limited to 'drivers/media/video') diff --git a/drivers/media/video/mx2_camera.c b/drivers/media/video/mx2_camera.c index 41f9a254b245..637bde8aca28 100644 --- a/drivers/media/video/mx2_camera.c +++ b/drivers/media/video/mx2_camera.c @@ -83,6 +83,7 @@ #define CSICR1_INV_DATA (1 << 3) #define CSICR1_INV_PCLK (1 << 2) #define CSICR1_REDGE (1 << 1) +#define CSICR1_FMT_MASK (CSICR1_PACK_DIR | CSICR1_SWAP16_EN) #define SHIFT_STATFF_LEVEL 22 #define SHIFT_RXFF_LEVEL 19 @@ -230,6 +231,7 @@ struct mx2_prp_cfg { u32 src_pixel; u32 ch1_pixel; u32 irq_flags; + u32 csicr1; }; /* prp resizing parameters */ @@ -330,6 +332,7 @@ static struct mx2_fmt_cfg mx27_emma_prp_table[] = { .ch1_pixel = 0x2ca00565, /* RGB565 */ .irq_flags = PRP_INTR_RDERR | PRP_INTR_CH1WERR | PRP_INTR_CH1FC | PRP_INTR_LBOVF, + .csicr1 = 0, } }, { @@ -343,6 +346,21 @@ static struct mx2_fmt_cfg mx27_emma_prp_table[] = { .irq_flags = PRP_INTR_RDERR | PRP_INTR_CH2WERR | PRP_INTR_CH2FC | PRP_INTR_LBOVF | PRP_INTR_CH2OVF, + .csicr1 = CSICR1_PACK_DIR, + } + }, + { + .in_fmt = V4L2_MBUS_FMT_UYVY8_2X8, + .out_fmt = V4L2_PIX_FMT_YUV420, + .cfg = { + .channel = 2, + .in_fmt = PRP_CNTL_DATA_IN_YUV422, + .out_fmt = PRP_CNTL_CH2_OUT_YUV420, + .src_pixel = 0x22000888, /* YUV422 (YUYV) */ + .irq_flags = PRP_INTR_RDERR | PRP_INTR_CH2WERR | + PRP_INTR_CH2FC | PRP_INTR_LBOVF | + PRP_INTR_CH2OVF, + .csicr1 = CSICR1_SWAP16_EN, } }, }; @@ -1015,14 +1033,14 @@ static int mx2_camera_set_bus_param(struct soc_camera_device *icd) return ret; } + csicr1 = (csicr1 & ~CSICR1_FMT_MASK) | pcdev->emma_prp->cfg.csicr1; + if (common_flags & V4L2_MBUS_PCLK_SAMPLE_RISING) csicr1 |= CSICR1_REDGE; if (common_flags & V4L2_MBUS_VSYNC_ACTIVE_HIGH) csicr1 |= CSICR1_SOF_POL; if (common_flags & V4L2_MBUS_HSYNC_ACTIVE_HIGH) csicr1 |= CSICR1_HSYNC_POL; - if (pcdev->platform_flags & MX2_CAMERA_SWAP16) - csicr1 |= CSICR1_SWAP16_EN; if (pcdev->platform_flags & MX2_CAMERA_EXT_VSYNC) csicr1 |= CSICR1_EXT_VSYNC; if (pcdev->platform_flags & MX2_CAMERA_CCIR) @@ -1033,8 +1051,6 @@ static int mx2_camera_set_bus_param(struct soc_camera_device *icd) csicr1 |= CSICR1_GCLK_MODE; if (pcdev->platform_flags & MX2_CAMERA_INV_DATA) csicr1 |= CSICR1_INV_DATA; - if (pcdev->platform_flags & MX2_CAMERA_PACK_DIR_MSB) - csicr1 |= CSICR1_PACK_DIR; pcdev->csicr1 = csicr1; @@ -1109,7 +1125,8 @@ static int mx2_camera_get_formats(struct soc_camera_device *icd, return 0; } - if (code == V4L2_MBUS_FMT_YUYV8_2X8) { + if (code == V4L2_MBUS_FMT_YUYV8_2X8 || + code == V4L2_MBUS_FMT_UYVY8_2X8) { formats++; if (xlate) { /* -- cgit v1.2.3 From c1e3209623ccd92f2f391a31ecf3895daa0238f3 Mon Sep 17 00:00:00 2001 From: Hans Verkuil Date: Wed, 11 Jul 2012 14:12:45 +0200 Subject: v4l2-dev: forgot to add VIDIOC_DV_TIMINGS_CAP. The VIDIOC_DV_TIMINGS_CAP ioctl check wasn't added to determine_valid_ioctls(). This caused this ioctl to always return -ENOTTY. The cause for this was that for 3.5 two patch series were merged, one changing V4L2 core ioctl handling and one adding new functionality, and some of the new functionality wasn't handled by the new V4L2 core code. Signed-off-by: Hans Verkuil [ Taking it directly due to vacations - Linus ] Signed-off-by: Linus Torvalds --- drivers/media/video/v4l2-dev.c | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers/media/video') diff --git a/drivers/media/video/v4l2-dev.c b/drivers/media/video/v4l2-dev.c index 83dbb2ddff10..0cbada18f6f5 100644 --- a/drivers/media/video/v4l2-dev.c +++ b/drivers/media/video/v4l2-dev.c @@ -681,6 +681,7 @@ static void determine_valid_ioctls(struct video_device *vdev) SET_VALID_IOCTL(ops, VIDIOC_G_DV_TIMINGS, vidioc_g_dv_timings); SET_VALID_IOCTL(ops, VIDIOC_ENUM_DV_TIMINGS, vidioc_enum_dv_timings); SET_VALID_IOCTL(ops, VIDIOC_QUERY_DV_TIMINGS, vidioc_query_dv_timings); + SET_VALID_IOCTL(ops, VIDIOC_DV_TIMINGS_CAP, vidioc_dv_timings_cap); /* yes, really vidioc_subscribe_event */ SET_VALID_IOCTL(ops, VIDIOC_DQEVENT, vidioc_subscribe_event); SET_VALID_IOCTL(ops, VIDIOC_SUBSCRIBE_EVENT, vidioc_subscribe_event); -- cgit v1.2.3 From 380e99fc44d79bc35af9ff1d3316ef4027ce775e Mon Sep 17 00:00:00 2001 From: Ezequiel Garcia Date: Wed, 18 Jul 2012 10:05:26 -0300 Subject: cx25821: Remove bad strcpy to read-only char* The strcpy was being used to set the name of the board. Since the destination char* was read-only and the name is set statically at compile time; this was both wrong and redundant. The type of char* is changed to const char* to prevent future errors. Reported-by: Radek Masin Signed-off-by: Ezequiel Garcia [ Taking directly due to vacations - Linus ] Signed-off-by: Linus Torvalds --- drivers/media/video/cx25821/cx25821-core.c | 3 --- drivers/media/video/cx25821/cx25821.h | 2 +- 2 files changed, 1 insertion(+), 4 deletions(-) (limited to 'drivers/media/video') diff --git a/drivers/media/video/cx25821/cx25821-core.c b/drivers/media/video/cx25821/cx25821-core.c index 83c1aa6b2e6c..f11f6f07e915 100644 --- a/drivers/media/video/cx25821/cx25821-core.c +++ b/drivers/media/video/cx25821/cx25821-core.c @@ -904,9 +904,6 @@ static int cx25821_dev_setup(struct cx25821_dev *dev) list_add_tail(&dev->devlist, &cx25821_devlist); mutex_unlock(&cx25821_devlist_mutex); - strcpy(cx25821_boards[UNKNOWN_BOARD].name, "unknown"); - strcpy(cx25821_boards[CX25821_BOARD].name, "cx25821"); - if (dev->pci->device != 0x8210) { pr_info("%s(): Exiting. Incorrect Hardware device = 0x%02x\n", __func__, dev->pci->device); diff --git a/drivers/media/video/cx25821/cx25821.h b/drivers/media/video/cx25821/cx25821.h index b9aa801b00a7..029f2934a6d8 100644 --- a/drivers/media/video/cx25821/cx25821.h +++ b/drivers/media/video/cx25821/cx25821.h @@ -187,7 +187,7 @@ enum port { }; struct cx25821_board { - char *name; + const char *name; enum port porta; enum port portb; enum port portc; -- cgit v1.2.3 From 3b6456d2c3fc9d0c4ec1db5d6594f40098ff0a6f Mon Sep 17 00:00:00 2001 From: Al Viro Date: Sat, 14 Jul 2012 13:49:40 +0400 Subject: zoran: don't bother with struct file * in zoran_map all we need it for is file->private_data, which is assign-once, already assigned by that point and, incidentally, its value is already in use by zoran ->mmap() anyway. So just store that pointer instead... Signed-off-by: Al Viro --- drivers/media/video/zoran/zoran.h | 4 +++- drivers/media/video/zoran/zoran_driver.c | 4 ++-- 2 files changed, 5 insertions(+), 3 deletions(-) (limited to 'drivers/media/video') diff --git a/drivers/media/video/zoran/zoran.h b/drivers/media/video/zoran/zoran.h index d7166afc255e..ca2754a3cd63 100644 --- a/drivers/media/video/zoran/zoran.h +++ b/drivers/media/video/zoran/zoran.h @@ -172,8 +172,10 @@ struct zoran_jpg_settings { struct v4l2_jpegcompression jpg_comp; /* JPEG-specific capture settings */ }; +struct zoran_fh; + struct zoran_mapping { - struct file *file; + struct zoran_fh *fh; int count; }; diff --git a/drivers/media/video/zoran/zoran_driver.c b/drivers/media/video/zoran/zoran_driver.c index c57310931810..c6ccdeb6d8d6 100644 --- a/drivers/media/video/zoran/zoran_driver.c +++ b/drivers/media/video/zoran/zoran_driver.c @@ -2811,7 +2811,7 @@ static void zoran_vm_close (struct vm_area_struct *vma) { struct zoran_mapping *map = vma->vm_private_data; - struct zoran_fh *fh = map->file->private_data; + struct zoran_fh *fh = map->fh; struct zoran *zr = fh->zr; int i; @@ -2938,7 +2938,7 @@ zoran_mmap (struct file *file, res = -ENOMEM; goto mmap_unlock_and_return; } - map->file = file; + map->fh = fh; map->count = 1; vma->vm_ops = &zoran_vm_ops; -- cgit v1.2.3