From c22b1a29497c3919b86dc2c87292d24b5965e4a5 Mon Sep 17 00:00:00 2001 From: Dikshita Agarwal Date: Fri, 2 Apr 2021 12:06:40 +0200 Subject: media: venus: core,pm: Vote for min clk freq during venus boot Vote for min clk frequency for core clks during prepare and enable clocks at boot sequence. Without this the controller clock runs at very low value (9.6MHz) which is not sufficient to boot venus. Signed-off-by: Dikshita Agarwal Signed-off-by: Bryan O'Donoghue Signed-off-by: Stanimir Varbanov Signed-off-by: Mauro Carvalho Chehab --- drivers/media/platform/qcom/venus/pm_helpers.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) (limited to 'drivers/media/platform') diff --git a/drivers/media/platform/qcom/venus/pm_helpers.c b/drivers/media/platform/qcom/venus/pm_helpers.c index a23e490b6139..a91dc24de2a4 100644 --- a/drivers/media/platform/qcom/venus/pm_helpers.c +++ b/drivers/media/platform/qcom/venus/pm_helpers.c @@ -41,10 +41,24 @@ static int core_clks_get(struct venus_core *core) static int core_clks_enable(struct venus_core *core) { const struct venus_resources *res = core->res; + const struct freq_tbl *freq_tbl = core->res->freq_tbl; + unsigned int freq_tbl_size = core->res->freq_tbl_size; + unsigned long freq; unsigned int i; int ret; + if (!freq_tbl) + return -EINVAL; + + freq = freq_tbl[freq_tbl_size - 1].freq; + for (i = 0; i < res->clks_num; i++) { + if (IS_V6(core)) { + ret = clk_set_rate(core->clks[i], freq); + if (ret) + goto err; + } + ret = clk_prepare_enable(core->clks[i]); if (ret) goto err; -- cgit v1.2.3