From 6dd0d0e1ae7f3e129c6943cd351d47d194bde238 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Sat, 9 May 2015 13:08:25 -0300 Subject: gpu: ipu-v3: ipu-csi: bool test doesn't need a comparison to false Bool initializations should use true and false. Bool tests don't need comparisons. Based on contributions from Joe Perches, Rusty Russell and Bruce W Allan. The semantic patch that makes this change is available in scripts/coccinelle/misc/boolinit.cocci. More information about semantic patching is available at http://coccinelle.lip6.fr/ Signed-off-by: Fabio Estevam Signed-off-by: Philipp Zabel --- drivers/gpu/ipu-v3/ipu-csi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers/gpu') diff --git a/drivers/gpu/ipu-v3/ipu-csi.c b/drivers/gpu/ipu-v3/ipu-csi.c index 752cdd2da89a..eec5adb3ed7b 100644 --- a/drivers/gpu/ipu-v3/ipu-csi.c +++ b/drivers/gpu/ipu-v3/ipu-csi.c @@ -538,7 +538,7 @@ void ipu_csi_set_test_generator(struct ipu_csi *csi, bool active, temp = ipu_csi_read(csi, CSI_TST_CTRL); - if (active == false) { + if (!active) { temp &= ~CSI_TEST_GEN_MODE_EN; ipu_csi_write(csi, temp, CSI_TST_CTRL); } else { -- cgit v1.2.3 From 0cb8b75792d6b752df945993cc5d455c75bf6884 Mon Sep 17 00:00:00 2001 From: Philipp Zabel Date: Fri, 12 Dec 2014 13:40:14 +0100 Subject: gpu: ipu-v3: add support for 15-bit RGB with 1-bit alpha formats This patch adds support for ARGB1555, ABGR1555, RGBA5551, and BGRA5551 in-memory formats. Signed-off-by: Philipp Zabel --- drivers/gpu/ipu-v3/ipu-common.c | 4 ++++ drivers/gpu/ipu-v3/ipu-cpmem.c | 44 +++++++++++++++++++++++++++++++++++++++++ 2 files changed, 48 insertions(+) (limited to 'drivers/gpu') diff --git a/drivers/gpu/ipu-v3/ipu-common.c b/drivers/gpu/ipu-v3/ipu-common.c index e5a38d202a21..c0b19160a946 100644 --- a/drivers/gpu/ipu-v3/ipu-common.c +++ b/drivers/gpu/ipu-v3/ipu-common.c @@ -57,6 +57,10 @@ EXPORT_SYMBOL_GPL(ipu_srm_dp_sync_update); enum ipu_color_space ipu_drm_fourcc_to_colorspace(u32 drm_fourcc) { switch (drm_fourcc) { + case DRM_FORMAT_ARGB1555: + case DRM_FORMAT_ABGR1555: + case DRM_FORMAT_RGBA5551: + case DRM_FORMAT_BGRA5551: case DRM_FORMAT_RGB565: case DRM_FORMAT_BGR565: case DRM_FORMAT_RGB888: diff --git a/drivers/gpu/ipu-v3/ipu-cpmem.c b/drivers/gpu/ipu-v3/ipu-cpmem.c index 3bf05bc4ab67..d26b8bee0269 100644 --- a/drivers/gpu/ipu-v3/ipu-cpmem.c +++ b/drivers/gpu/ipu-v3/ipu-cpmem.c @@ -500,6 +500,38 @@ static const struct ipu_rgb def_bgr_16 = { .bits_per_pixel = 16, }; +static const struct ipu_rgb def_argb_16 = { + .red = { .offset = 10, .length = 5, }, + .green = { .offset = 5, .length = 5, }, + .blue = { .offset = 0, .length = 5, }, + .transp = { .offset = 15, .length = 1, }, + .bits_per_pixel = 16, +}; + +static const struct ipu_rgb def_abgr_16 = { + .red = { .offset = 0, .length = 5, }, + .green = { .offset = 5, .length = 5, }, + .blue = { .offset = 10, .length = 5, }, + .transp = { .offset = 15, .length = 1, }, + .bits_per_pixel = 16, +}; + +static const struct ipu_rgb def_rgba_16 = { + .red = { .offset = 11, .length = 5, }, + .green = { .offset = 6, .length = 5, }, + .blue = { .offset = 1, .length = 5, }, + .transp = { .offset = 0, .length = 1, }, + .bits_per_pixel = 16, +}; + +static const struct ipu_rgb def_bgra_16 = { + .red = { .offset = 1, .length = 5, }, + .green = { .offset = 6, .length = 5, }, + .blue = { .offset = 11, .length = 5, }, + .transp = { .offset = 0, .length = 1, }, + .bits_per_pixel = 16, +}; + #define Y_OFFSET(pix, x, y) ((x) + pix->width * (y)) #define U_OFFSET(pix, x, y) ((pix->width * pix->height) + \ (pix->width * (y) / 4) + (x) / 2) @@ -581,6 +613,18 @@ int ipu_cpmem_set_fmt(struct ipuv3_channel *ch, u32 drm_fourcc) case DRM_FORMAT_BGR565: ipu_cpmem_set_format_rgb(ch, &def_bgr_16); break; + case DRM_FORMAT_ARGB1555: + ipu_cpmem_set_format_rgb(ch, &def_argb_16); + break; + case DRM_FORMAT_ABGR1555: + ipu_cpmem_set_format_rgb(ch, &def_abgr_16); + break; + case DRM_FORMAT_RGBA5551: + ipu_cpmem_set_format_rgb(ch, &def_rgba_16); + break; + case DRM_FORMAT_BGRA5551: + ipu_cpmem_set_format_rgb(ch, &def_bgra_16); + break; default: return -EINVAL; } -- cgit v1.2.3 From c639a1cfc4930684300860abdac5ebcb619523ea Mon Sep 17 00:00:00 2001 From: Philipp Zabel Date: Fri, 12 Dec 2014 13:40:38 +0100 Subject: drm/imx: enable 15-bit RGB with 1-bit alpha formats This patch enables the ARGB1555, ABGR1555, RGBA5551, and BGRA5551 formats to be used on planes. Signed-off-by: Philipp Zabel --- drivers/gpu/drm/imx/ipuv3-plane.c | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'drivers/gpu') diff --git a/drivers/gpu/drm/imx/ipuv3-plane.c b/drivers/gpu/drm/imx/ipuv3-plane.c index 878a643d72e4..d13dbb687f64 100644 --- a/drivers/gpu/drm/imx/ipuv3-plane.c +++ b/drivers/gpu/drm/imx/ipuv3-plane.c @@ -23,8 +23,12 @@ #define to_ipu_plane(x) container_of(x, struct ipu_plane, base) static const uint32_t ipu_plane_formats[] = { + DRM_FORMAT_ARGB1555, DRM_FORMAT_XRGB1555, + DRM_FORMAT_ABGR1555, DRM_FORMAT_XBGR1555, + DRM_FORMAT_RGBA5551, + DRM_FORMAT_BGRA5551, DRM_FORMAT_ARGB8888, DRM_FORMAT_XRGB8888, DRM_FORMAT_ABGR8888, @@ -175,6 +179,10 @@ int ipu_plane_mode_set(struct ipu_plane *ipu_plane, struct drm_crtc *crtc, ipu_dp_set_window_pos(ipu_plane->dp, crtc_x, crtc_y); /* Enable local alpha on partial plane */ switch (fb->pixel_format) { + case DRM_FORMAT_ARGB1555: + case DRM_FORMAT_ABGR1555: + case DRM_FORMAT_RGBA5551: + case DRM_FORMAT_BGRA5551: case DRM_FORMAT_ARGB8888: case DRM_FORMAT_ABGR8888: ipu_dp_set_global_alpha(ipu_plane->dp, false, 0, false); -- cgit v1.2.3 From 067f4aa402ac2c41e70e25abda97af30333d9581 Mon Sep 17 00:00:00 2001 From: Philipp Zabel Date: Thu, 16 Apr 2015 15:27:04 +0200 Subject: gpu: ipu-v3: add support for RGBX8888 and RGBA8888 pixel formats This patch adds support for the RGBA8888, RGBX8888, BGRA8888, and BGRX8888 in-memory formats. Signed-off-by: Philipp Zabel --- drivers/gpu/ipu-v3/ipu-cpmem.c | 32 ++++++++++++++++++++++++++++---- 1 file changed, 28 insertions(+), 4 deletions(-) (limited to 'drivers/gpu') diff --git a/drivers/gpu/ipu-v3/ipu-cpmem.c b/drivers/gpu/ipu-v3/ipu-cpmem.c index d26b8bee0269..0e6b8687c61a 100644 --- a/drivers/gpu/ipu-v3/ipu-cpmem.c +++ b/drivers/gpu/ipu-v3/ipu-cpmem.c @@ -452,7 +452,7 @@ void ipu_cpmem_set_yuv_planar(struct ipuv3_channel *ch, } EXPORT_SYMBOL_GPL(ipu_cpmem_set_yuv_planar); -static const struct ipu_rgb def_rgb_32 = { +static const struct ipu_rgb def_xrgb_32 = { .red = { .offset = 16, .length = 8, }, .green = { .offset = 8, .length = 8, }, .blue = { .offset = 0, .length = 8, }, @@ -460,7 +460,7 @@ static const struct ipu_rgb def_rgb_32 = { .bits_per_pixel = 32, }; -static const struct ipu_rgb def_bgr_32 = { +static const struct ipu_rgb def_xbgr_32 = { .red = { .offset = 0, .length = 8, }, .green = { .offset = 8, .length = 8, }, .blue = { .offset = 16, .length = 8, }, @@ -468,6 +468,22 @@ static const struct ipu_rgb def_bgr_32 = { .bits_per_pixel = 32, }; +static const struct ipu_rgb def_rgbx_32 = { + .red = { .offset = 24, .length = 8, }, + .green = { .offset = 16, .length = 8, }, + .blue = { .offset = 8, .length = 8, }, + .transp = { .offset = 0, .length = 8, }, + .bits_per_pixel = 32, +}; + +static const struct ipu_rgb def_bgrx_32 = { + .red = { .offset = 8, .length = 8, }, + .green = { .offset = 16, .length = 8, }, + .blue = { .offset = 24, .length = 8, }, + .transp = { .offset = 0, .length = 8, }, + .bits_per_pixel = 32, +}; + static const struct ipu_rgb def_rgb_24 = { .red = { .offset = 16, .length = 8, }, .green = { .offset = 8, .length = 8, }, @@ -595,11 +611,19 @@ int ipu_cpmem_set_fmt(struct ipuv3_channel *ch, u32 drm_fourcc) break; case DRM_FORMAT_ABGR8888: case DRM_FORMAT_XBGR8888: - ipu_cpmem_set_format_rgb(ch, &def_bgr_32); + ipu_cpmem_set_format_rgb(ch, &def_xbgr_32); break; case DRM_FORMAT_ARGB8888: case DRM_FORMAT_XRGB8888: - ipu_cpmem_set_format_rgb(ch, &def_rgb_32); + ipu_cpmem_set_format_rgb(ch, &def_xrgb_32); + break; + case DRM_FORMAT_RGBA8888: + case DRM_FORMAT_RGBX8888: + ipu_cpmem_set_format_rgb(ch, &def_rgbx_32); + break; + case DRM_FORMAT_BGRA8888: + case DRM_FORMAT_BGRX8888: + ipu_cpmem_set_format_rgb(ch, &def_bgrx_32); break; case DRM_FORMAT_BGR888: ipu_cpmem_set_format_rgb(ch, &def_bgr_24); -- cgit v1.2.3 From 59d6b7189a968d627af37fc26a410dced0854b99 Mon Sep 17 00:00:00 2001 From: Philipp Zabel Date: Thu, 16 Apr 2015 15:56:40 +0200 Subject: drm/imx: ipuv3-plane: enable support for RGBX8888 and RGBA8888 pixel formats This patch allows to use the RGBX and RGBA 8:8:8:8 formats. Signed-off-by: Philipp Zabel --- drivers/gpu/drm/imx/ipuv3-plane.c | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'drivers/gpu') diff --git a/drivers/gpu/drm/imx/ipuv3-plane.c b/drivers/gpu/drm/imx/ipuv3-plane.c index d13dbb687f64..d0309900e634 100644 --- a/drivers/gpu/drm/imx/ipuv3-plane.c +++ b/drivers/gpu/drm/imx/ipuv3-plane.c @@ -33,6 +33,10 @@ static const uint32_t ipu_plane_formats[] = { DRM_FORMAT_XRGB8888, DRM_FORMAT_ABGR8888, DRM_FORMAT_XBGR8888, + DRM_FORMAT_RGBA8888, + DRM_FORMAT_RGBX8888, + DRM_FORMAT_BGRA8888, + DRM_FORMAT_BGRA8888, DRM_FORMAT_YUYV, DRM_FORMAT_YVYU, DRM_FORMAT_YUV420, @@ -185,6 +189,8 @@ int ipu_plane_mode_set(struct ipu_plane *ipu_plane, struct drm_crtc *crtc, case DRM_FORMAT_BGRA5551: case DRM_FORMAT_ARGB8888: case DRM_FORMAT_ABGR8888: + case DRM_FORMAT_RGBA8888: + case DRM_FORMAT_BGRA8888: ipu_dp_set_global_alpha(ipu_plane->dp, false, 0, false); break; default: -- cgit v1.2.3 From 7d2e8a204aa04b83aca2beb5f1441262c3aa26c8 Mon Sep 17 00:00:00 2001 From: Lucas Stach Date: Tue, 4 Aug 2015 17:21:04 +0200 Subject: gpu: ipu-v3: add support for ARGB4444 16-bit color format This patch adds support for the ARGB4444 color format. Signed-off-by: Lucas Stach Signed-off-by: Philipp Zabel --- drivers/gpu/ipu-v3/ipu-common.c | 1 + drivers/gpu/ipu-v3/ipu-cpmem.c | 11 +++++++++++ 2 files changed, 12 insertions(+) (limited to 'drivers/gpu') diff --git a/drivers/gpu/ipu-v3/ipu-common.c b/drivers/gpu/ipu-v3/ipu-common.c index c0b19160a946..ba47b30d28fa 100644 --- a/drivers/gpu/ipu-v3/ipu-common.c +++ b/drivers/gpu/ipu-v3/ipu-common.c @@ -65,6 +65,7 @@ enum ipu_color_space ipu_drm_fourcc_to_colorspace(u32 drm_fourcc) case DRM_FORMAT_BGR565: case DRM_FORMAT_RGB888: case DRM_FORMAT_BGR888: + case DRM_FORMAT_ARGB4444: case DRM_FORMAT_XRGB8888: case DRM_FORMAT_XBGR8888: case DRM_FORMAT_RGBX8888: diff --git a/drivers/gpu/ipu-v3/ipu-cpmem.c b/drivers/gpu/ipu-v3/ipu-cpmem.c index 0e6b8687c61a..63eb16bf2cf0 100644 --- a/drivers/gpu/ipu-v3/ipu-cpmem.c +++ b/drivers/gpu/ipu-v3/ipu-cpmem.c @@ -524,6 +524,14 @@ static const struct ipu_rgb def_argb_16 = { .bits_per_pixel = 16, }; +static const struct ipu_rgb def_argb_16_4444 = { + .red = { .offset = 8, .length = 4, }, + .green = { .offset = 4, .length = 4, }, + .blue = { .offset = 0, .length = 4, }, + .transp = { .offset = 12, .length = 4, }, + .bits_per_pixel = 16, +}; + static const struct ipu_rgb def_abgr_16 = { .red = { .offset = 0, .length = 5, }, .green = { .offset = 5, .length = 5, }, @@ -649,6 +657,9 @@ int ipu_cpmem_set_fmt(struct ipuv3_channel *ch, u32 drm_fourcc) case DRM_FORMAT_BGRA5551: ipu_cpmem_set_format_rgb(ch, &def_bgra_16); break; + case DRM_FORMAT_ARGB4444: + ipu_cpmem_set_format_rgb(ch, &def_argb_16_4444); + break; default: return -EINVAL; } -- cgit v1.2.3 From cb166a302589f1494a62b6f1ca108fddb3925e31 Mon Sep 17 00:00:00 2001 From: Lucas Stach Date: Tue, 4 Aug 2015 17:22:06 +0200 Subject: drm/imx: enable ARGB4444 16-bit color format This patch allows to use the ARGB4444 color format on planes. Signed-off-by: Lucas Stach Signed-off-by: Philipp Zabel --- drivers/gpu/drm/imx/ipuv3-plane.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'drivers/gpu') diff --git a/drivers/gpu/drm/imx/ipuv3-plane.c b/drivers/gpu/drm/imx/ipuv3-plane.c index d0309900e634..575f4c84388f 100644 --- a/drivers/gpu/drm/imx/ipuv3-plane.c +++ b/drivers/gpu/drm/imx/ipuv3-plane.c @@ -29,6 +29,7 @@ static const uint32_t ipu_plane_formats[] = { DRM_FORMAT_XBGR1555, DRM_FORMAT_RGBA5551, DRM_FORMAT_BGRA5551, + DRM_FORMAT_ARGB4444, DRM_FORMAT_ARGB8888, DRM_FORMAT_XRGB8888, DRM_FORMAT_ABGR8888, @@ -187,6 +188,7 @@ int ipu_plane_mode_set(struct ipu_plane *ipu_plane, struct drm_crtc *crtc, case DRM_FORMAT_ABGR1555: case DRM_FORMAT_RGBA5551: case DRM_FORMAT_BGRA5551: + case DRM_FORMAT_ARGB4444: case DRM_FORMAT_ARGB8888: case DRM_FORMAT_ABGR8888: case DRM_FORMAT_RGBA8888: -- cgit v1.2.3 From 3e8b2246c36f4a340febc97d140db5dd727bb3c6 Mon Sep 17 00:00:00 2001 From: Philippe De Muyter Date: Fri, 18 Sep 2015 15:41:55 +0200 Subject: gpu: ipu-v3: csi: add support for 8 bpp grayscale sensors. Enable the MEDIA_BUS_FMT_Y8_1X8 format. Signed-off-by: Philippe De Muyter Signed-off-by: Philipp Zabel --- drivers/gpu/ipu-v3/ipu-csi.c | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers/gpu') diff --git a/drivers/gpu/ipu-v3/ipu-csi.c b/drivers/gpu/ipu-v3/ipu-csi.c index eec5adb3ed7b..3bdb7058fcca 100644 --- a/drivers/gpu/ipu-v3/ipu-csi.c +++ b/drivers/gpu/ipu-v3/ipu-csi.c @@ -271,6 +271,7 @@ static int mbus_code_to_bus_cfg(struct ipu_csi_bus_config *cfg, u32 mbus_code) case MEDIA_BUS_FMT_SGBRG8_1X8: case MEDIA_BUS_FMT_SGRBG8_1X8: case MEDIA_BUS_FMT_SRGGB8_1X8: + case MEDIA_BUS_FMT_Y8_1X8: cfg->data_fmt = CSI_SENS_CONF_DATA_FMT_BAYER; cfg->mipi_dt = MIPI_DT_RAW8; cfg->data_width = IPU_CSI_DATA_WIDTH_8; -- cgit v1.2.3 From 9b6d0d33c848661c859ccee331b9d2c2ba74489b Mon Sep 17 00:00:00 2001 From: Andrzej Hajda Date: Mon, 21 Sep 2015 15:33:48 +0200 Subject: gpu: ipu-v3: fix div_ratio type The variable can be negative. The problem has been detected using proposed semantic patch scripts/coccinelle/tests/unsigned_lesser_than_zero.cocci [1]. [1]: http://permalink.gmane.org/gmane.linux.kernel/2038576 Signed-off-by: Andrzej Hajda Signed-off-by: Philipp Zabel --- drivers/gpu/ipu-v3/ipu-csi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers/gpu') diff --git a/drivers/gpu/ipu-v3/ipu-csi.c b/drivers/gpu/ipu-v3/ipu-csi.c index 3bdb7058fcca..06631ac61b04 100644 --- a/drivers/gpu/ipu-v3/ipu-csi.c +++ b/drivers/gpu/ipu-v3/ipu-csi.c @@ -202,7 +202,7 @@ static int ipu_csi_set_testgen_mclk(struct ipu_csi *csi, u32 pixel_clk, u32 ipu_clk) { u32 temp; - u32 div_ratio; + int div_ratio; div_ratio = (ipu_clk / pixel_clk) - 1; -- cgit v1.2.3 From a5f4185c4b8c131c0ccafa6b1b00cd4e5413e47e Mon Sep 17 00:00:00 2001 From: Lucas Stach Date: Thu, 15 Oct 2015 15:42:17 +0200 Subject: drm/imx: hdmi: fix HDMI setup to allow modes larger than FullHD This worked before the dw-hdmi bridge code was changed to validate the setup data more strictly. Add back support for modes with a pixel clock up to 216MHz. Even higher clocks should work, but we are missing the required setup data for now. Also change the mode validate callbacks to disallow modes with higher pixelclocks, so we don't end up failing the modeset later on. Signed-off-by: Lucas Stach Signed-off-by: Philipp Zabel --- drivers/gpu/drm/imx/dw_hdmi-imx.c | 16 ++++++++++++---- 1 file changed, 12 insertions(+), 4 deletions(-) (limited to 'drivers/gpu') diff --git a/drivers/gpu/drm/imx/dw_hdmi-imx.c b/drivers/gpu/drm/imx/dw_hdmi-imx.c index 644edf65dbe0..98605ea2ad9d 100644 --- a/drivers/gpu/drm/imx/dw_hdmi-imx.c +++ b/drivers/gpu/drm/imx/dw_hdmi-imx.c @@ -48,11 +48,17 @@ static const struct dw_hdmi_mpll_config imx_mpll_cfg[] = { { 0x40a2, 0x000a }, }, }, { - ~0UL, { + 216000000, { { 0x00a0, 0x000a }, { 0x2001, 0x000f }, { 0x4002, 0x000f }, }, + }, { + ~0UL, { + { 0x0000, 0x0000 }, + { 0x0000, 0x0000 }, + { 0x0000, 0x0000 }, + }, } }; @@ -82,7 +88,7 @@ static const struct dw_hdmi_curr_ctrl imx_cur_ctr[] = { */ static const struct dw_hdmi_phy_config imx_phy_config[] = { /*pixelclk symbol term vlev */ - { 148500000, 0x800d, 0x0005, 0x01ad}, + { 216000000, 0x800d, 0x0005, 0x01ad}, { ~0UL, 0x0000, 0x0000, 0x0000} }; @@ -148,7 +154,8 @@ static enum drm_mode_status imx6q_hdmi_mode_valid(struct drm_connector *con, { if (mode->clock < 13500) return MODE_CLOCK_LOW; - if (mode->clock > 266000) + /* FIXME: Hardware is capable of 266MHz, but setup data is missing. */ + if (mode->clock > 216000) return MODE_CLOCK_HIGH; return MODE_OK; @@ -159,7 +166,8 @@ static enum drm_mode_status imx6dl_hdmi_mode_valid(struct drm_connector *con, { if (mode->clock < 13500) return MODE_CLOCK_LOW; - if (mode->clock > 270000) + /* FIXME: Hardware is capable of 270MHz, but setup data is missing. */ + if (mode->clock > 216000) return MODE_CLOCK_HIGH; return MODE_OK; -- cgit v1.2.3