From 9376cad2073d2c122864754ea5f80025c8507b0b Mon Sep 17 00:00:00 2001 From: Christophe Jaillet Date: Fri, 28 Oct 2016 11:09:45 +0200 Subject: drm/tegra: dpaux: Fix error handling The devm_pinctrl_register() function returns an error pointer or a valid handle. So checking for NULL here is pointless and can never trigger. Check the returned value with IS_ERR instead and propagate this value as done in the other functions which call devm_pinctrl_register(). Fixes: 0751bb5c44fe ("drm/tegra: dpaux: Add pinctrl support") Signed-off-by: Christophe JAILLET Acked-by: Jon Hunter Signed-off-by: Thierry Reding --- drivers/gpu/drm/tegra/dpaux.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'drivers/gpu/drm') diff --git a/drivers/gpu/drm/tegra/dpaux.c b/drivers/gpu/drm/tegra/dpaux.c index 059f409556d5..2fde44c3a1b3 100644 --- a/drivers/gpu/drm/tegra/dpaux.c +++ b/drivers/gpu/drm/tegra/dpaux.c @@ -539,9 +539,9 @@ static int tegra_dpaux_probe(struct platform_device *pdev) dpaux->desc.owner = THIS_MODULE; dpaux->pinctrl = devm_pinctrl_register(&pdev->dev, &dpaux->desc, dpaux); - if (!dpaux->pinctrl) { + if (IS_ERR(dpaux->pinctrl)) { dev_err(&pdev->dev, "failed to register pincontrol\n"); - return -ENODEV; + return PTR_ERR(dpaux->pinctrl); } #endif /* enable and clear all interrupts */ -- cgit v1.2.3 From 87ba3e15fb6e94d8dcce838b5de71814b2d1a768 Mon Sep 17 00:00:00 2001 From: Christophe Jaillet Date: Sun, 3 Jul 2016 08:18:57 +0200 Subject: drm/tegra: Fix error handling It is likely that checking 'gr3d->clk_secondary' instead of 'gr3d->clk' is expected here. Signed-off-by: Christophe JAILLET Reviewed-by: Alexandre Courbot Signed-off-by: Thierry Reding --- drivers/gpu/drm/tegra/gr3d.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'drivers/gpu/drm') diff --git a/drivers/gpu/drm/tegra/gr3d.c b/drivers/gpu/drm/tegra/gr3d.c index 0b3f2b977ba0..13f0d1b7cd98 100644 --- a/drivers/gpu/drm/tegra/gr3d.c +++ b/drivers/gpu/drm/tegra/gr3d.c @@ -268,9 +268,9 @@ static int gr3d_probe(struct platform_device *pdev) if (of_device_is_compatible(np, "nvidia,tegra30-gr3d")) { gr3d->clk_secondary = devm_clk_get(&pdev->dev, "3d2"); - if (IS_ERR(gr3d->clk)) { + if (IS_ERR(gr3d->clk_secondary)) { dev_err(&pdev->dev, "cannot get secondary clock\n"); - return PTR_ERR(gr3d->clk); + return PTR_ERR(gr3d->clk_secondary); } gr3d->rst_secondary = devm_reset_control_get(&pdev->dev, -- cgit v1.2.3 From 4141e7448b501227967ff274af5f4eadadb6068b Mon Sep 17 00:00:00 2001 From: Christophe Jaillet Date: Sat, 24 Sep 2016 22:07:30 +0200 Subject: drm/tegra: sor: No need to free devm_ allocated memory Memory for the brick clock is allocated by devm_kzalloc(), so there is no need here to free it explicitly. The only function that calls tegra_clk_sor_brick_register() is the probe function and it correctly checks and handles the return value, which, on failure, will cause devm_ allocated memory to be freed automatically. Signed-off-by: Christophe JAILLET Signed-off-by: Thierry Reding --- drivers/gpu/drm/tegra/sor.c | 2 -- 1 file changed, 2 deletions(-) (limited to 'drivers/gpu/drm') diff --git a/drivers/gpu/drm/tegra/sor.c b/drivers/gpu/drm/tegra/sor.c index 74d0540b8d4c..a8f528925009 100644 --- a/drivers/gpu/drm/tegra/sor.c +++ b/drivers/gpu/drm/tegra/sor.c @@ -349,8 +349,6 @@ static struct clk *tegra_clk_sor_brick_register(struct tegra_sor *sor, brick->hw.init = &init; clk = devm_clk_register(sor->dev, &brick->hw); - if (IS_ERR(clk)) - kfree(brick); return clk; } -- cgit v1.2.3 From cc09cb6da9b0eefe4b4e47a73170a349c4cf3426 Mon Sep 17 00:00:00 2001 From: Christophe JAILLET Date: Sun, 30 Oct 2016 16:50:29 +0100 Subject: drm/tegra: gem: Remove some dead code dma_buf_map_attachment() never returns NULL, so there is no need to check for it. Signed-off-by: Christophe JAILLET Signed-off-by: Thierry Reding --- drivers/gpu/drm/tegra/gem.c | 5 ----- 1 file changed, 5 deletions(-) (limited to 'drivers/gpu/drm') diff --git a/drivers/gpu/drm/tegra/gem.c b/drivers/gpu/drm/tegra/gem.c index 95e622e31931..19bf9cdf1f11 100644 --- a/drivers/gpu/drm/tegra/gem.c +++ b/drivers/gpu/drm/tegra/gem.c @@ -318,11 +318,6 @@ static struct tegra_bo *tegra_bo_import(struct drm_device *drm, get_dma_buf(buf); bo->sgt = dma_buf_map_attachment(attach, DMA_TO_DEVICE); - if (!bo->sgt) { - err = -ENOMEM; - goto detach; - } - if (IS_ERR(bo->sgt)) { err = PTR_ERR(bo->sgt); goto detach; -- cgit v1.2.3 From 7ecada3cc44798c88d2c3deed38746b9a7a9b746 Mon Sep 17 00:00:00 2001 From: Arto Merilainen Date: Tue, 8 Nov 2016 19:51:34 +0200 Subject: drm/tegra: Support kernel mappings with IOMMU host1x command buffer patching requires that the buffer object can be mapped into kernel address space. However, the recent addition of IOMMU support did not account for this requirement. Therefore host1x engines cannot be used if IOMMU is enabled. This patch implements kmap, kunmap, mmap and munmap functions to host1x buffer objects. Signed-off-by: Arto Merilainen Signed-off-by: Mikko Perttunen Signed-off-by: Thierry Reding --- drivers/gpu/drm/tegra/gem.c | 34 +++++++++++++++++++++++++++++++--- 1 file changed, 31 insertions(+), 3 deletions(-) (limited to 'drivers/gpu/drm') diff --git a/drivers/gpu/drm/tegra/gem.c b/drivers/gpu/drm/tegra/gem.c index 19bf9cdf1f11..25083729a89c 100644 --- a/drivers/gpu/drm/tegra/gem.c +++ b/drivers/gpu/drm/tegra/gem.c @@ -2,7 +2,7 @@ * NVIDIA Tegra DRM GEM helper functions * * Copyright (C) 2012 Sascha Hauer, Pengutronix - * Copyright (C) 2013 NVIDIA CORPORATION, All rights reserved. + * Copyright (C) 2013-2015 NVIDIA CORPORATION, All rights reserved. * * Based on the GEM/CMA helpers * @@ -47,23 +47,51 @@ static void *tegra_bo_mmap(struct host1x_bo *bo) { struct tegra_bo *obj = host1x_to_tegra_bo(bo); - return obj->vaddr; + if (obj->vaddr) + return obj->vaddr; + else if (obj->gem.import_attach) + return dma_buf_vmap(obj->gem.import_attach->dmabuf); + else + return vmap(obj->pages, obj->num_pages, VM_MAP, + pgprot_writecombine(PAGE_KERNEL)); } static void tegra_bo_munmap(struct host1x_bo *bo, void *addr) { + struct tegra_bo *obj = host1x_to_tegra_bo(bo); + + if (obj->vaddr) + return; + else if (obj->gem.import_attach) + dma_buf_vunmap(obj->gem.import_attach->dmabuf, addr); + else + vunmap(addr); } static void *tegra_bo_kmap(struct host1x_bo *bo, unsigned int page) { struct tegra_bo *obj = host1x_to_tegra_bo(bo); - return obj->vaddr + page * PAGE_SIZE; + if (obj->vaddr) + return obj->vaddr + page * PAGE_SIZE; + else if (obj->gem.import_attach) + return dma_buf_kmap(obj->gem.import_attach->dmabuf, page); + else + return vmap(obj->pages + page, 1, VM_MAP, + pgprot_writecombine(PAGE_KERNEL)); } static void tegra_bo_kunmap(struct host1x_bo *bo, unsigned int page, void *addr) { + struct tegra_bo *obj = host1x_to_tegra_bo(bo); + + if (obj->vaddr) + return; + else if (obj->gem.import_attach) + dma_buf_kunmap(obj->gem.import_attach->dmabuf, page, addr); + else + vunmap(addr); } static struct host1x_bo *tegra_bo_get(struct host1x_bo *bo) -- cgit v1.2.3 From 585ee0f27ef7b8db46807b960388b7e58b60766d Mon Sep 17 00:00:00 2001 From: Mikko Perttunen Date: Tue, 8 Nov 2016 19:51:35 +0200 Subject: drm/tegra: Set sgt pointer in BO pin Fix tegra_bo_pin() to set the parameter sgt pointer. host1x job pinning requires the sgt to determine physical memory addresses of gathers. Signed-off-by: Mikko Perttunen Signed-off-by: Thierry Reding --- drivers/gpu/drm/tegra/gem.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'drivers/gpu/drm') diff --git a/drivers/gpu/drm/tegra/gem.c b/drivers/gpu/drm/tegra/gem.c index 25083729a89c..c08e5279eeac 100644 --- a/drivers/gpu/drm/tegra/gem.c +++ b/drivers/gpu/drm/tegra/gem.c @@ -36,6 +36,8 @@ static dma_addr_t tegra_bo_pin(struct host1x_bo *bo, struct sg_table **sgt) { struct tegra_bo *obj = host1x_to_tegra_bo(bo); + *sgt = obj->sgt; + return obj->paddr; } -- cgit v1.2.3