From 462c272b9076e80cda8602b9db81f8d105e729b3 Mon Sep 17 00:00:00 2001 From: Tao Zhou Date: Fri, 2 Oct 2020 11:56:29 -0400 Subject: drm/amdgpu: add psp support for dimgrey_cavefish(v2) General psp support for dimgrey_cavefish. v2: remove the checks for asd load and reroute ih. Signed-off-by: Tao Zhou Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c') diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c index d91d951d018e..cad4767ca2bb 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c @@ -101,6 +101,7 @@ static int psp_early_init(void *handle) case CHIP_SIENNA_CICHLID: case CHIP_NAVY_FLOUNDER: case CHIP_VANGOGH: + case CHIP_DIMGREY_CAVEFISH: psp_v11_0_set_psp_funcs(psp); psp->autoload_supported = true; break; @@ -1968,8 +1969,8 @@ static int psp_np_fw_load(struct psp_context *psp) continue; if (psp->autoload_supported && - (adev->asic_type == CHIP_SIENNA_CICHLID || - adev->asic_type == CHIP_NAVY_FLOUNDER) && + (adev->asic_type >= CHIP_SIENNA_CICHLID && + adev->asic_type <= CHIP_DIMGREY_CAVEFISH) && (ucode->ucode_id == AMDGPU_UCODE_ID_SDMA1 || ucode->ucode_id == AMDGPU_UCODE_ID_SDMA2 || ucode->ucode_id == AMDGPU_UCODE_ID_SDMA3)) -- cgit v1.2.3