From a2a2c5fc5ce4369f4d9588bf1298e424dff003b4 Mon Sep 17 00:00:00 2001 From: Chun-Jie Chen Date: Tue, 14 Sep 2021 10:16:17 +0800 Subject: clk: mediatek: Add MT8195 peripheral clock support Add MT8195 peripheral clock controller which provides clock gate control for ethernet/flashif/pcie/ssusb. Signed-off-by: Chun-Jie Chen Reviewed-by: Chen-Yu Tsai Link: https://lore.kernel.org/r/20210914021633.26377-9-chun-jie.chen@mediatek.com Signed-off-by: Stephen Boyd --- drivers/clk/mediatek/Makefile | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'drivers/clk/mediatek/Makefile') diff --git a/drivers/clk/mediatek/Makefile b/drivers/clk/mediatek/Makefile index a142342a0cea..0dbf4ddf4a09 100644 --- a/drivers/clk/mediatek/Makefile +++ b/drivers/clk/mediatek/Makefile @@ -80,6 +80,7 @@ obj-$(CONFIG_COMMON_CLK_MT8192_MSDC) += clk-mt8192-msdc.o obj-$(CONFIG_COMMON_CLK_MT8192_SCP_ADSP) += clk-mt8192-scp_adsp.o obj-$(CONFIG_COMMON_CLK_MT8192_VDECSYS) += clk-mt8192-vdec.o obj-$(CONFIG_COMMON_CLK_MT8192_VENCSYS) += clk-mt8192-venc.o -obj-$(CONFIG_COMMON_CLK_MT8195) += clk-mt8195-apmixedsys.o clk-mt8195-topckgen.o +obj-$(CONFIG_COMMON_CLK_MT8195) += clk-mt8195-apmixedsys.o clk-mt8195-topckgen.o \ + clk-mt8195-peri_ao.o obj-$(CONFIG_COMMON_CLK_MT8516) += clk-mt8516.o obj-$(CONFIG_COMMON_CLK_MT8516_AUDSYS) += clk-mt8516-aud.o -- cgit v1.2.3