From 93b61bddc13d9acf1fe341b39d826e80f3182d1e Mon Sep 17 00:00:00 2001 From: Wolfgang Muees Date: Mon, 6 Apr 2009 19:00:53 -0700 Subject: Blackfin SPI Driver: Make mmc_spi driver work on Blackfin 1. Rewrite of the non-dma data transfer functions to use only ONE mode of TIMOD (TIMOD=0x1). With TIMOD=0, it was not possible to set the TX bit pattern. So the TDBR = 0xFFFF inside the read calls won't work. 2. Clear SPI_RDBR before reading and before duplex transfer. Otherwise the garbage data in RDBR will get read. Since mmc_spi uses a lot of duplex transfers, this is the main cause of mmc_spi failure. 3. Poll RXS for transfer completion. Polling SPIF or TXS cannot guarantee transfer completion. This may interrupt a transfer before it is finished. Also this may leave garbage data in buffer and affect next transfer. [Yi Li : add a field "u16 idle_tx_val" in "struct bfin5xx_spi_chip" to specify the value to transmit if no TX value is supplied.] Signed-off-by: Wolfgang Muees Signed-off-by: Yi Li Signed-off-by: Bryan Wu Cc: David Brownell Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- arch/blackfin/include/asm/bfin5xx_spi.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch') diff --git a/arch/blackfin/include/asm/bfin5xx_spi.h b/arch/blackfin/include/asm/bfin5xx_spi.h index 8c5f8a977a66..aaeb4df10d57 100644 --- a/arch/blackfin/include/asm/bfin5xx_spi.h +++ b/arch/blackfin/include/asm/bfin5xx_spi.h @@ -125,6 +125,8 @@ struct bfin5xx_spi_chip { u8 cs_change_per_word; u16 cs_chg_udelay; /* Some devices require 16-bit delays */ u32 cs_gpio; + /* Value to send if no TX value is supplied, usually 0x0 or 0xFFFF */ + u16 idle_tx_val; }; #endif /* _SPI_CHANNEL_H_ */ -- cgit v1.2.3