From 09ec182c762d3154a106d1184b1e48e86f39a30f Mon Sep 17 00:00:00 2001 From: "carter.li" Date: Thu, 27 Jul 2023 15:42:41 +0800 Subject: riscv: dts: starfive: add sof dsp node for hifi4 init sof_wm8960.dtsi, add sof_dsp node for sof hifi4. Signed-off-by: carter.li --- arch/riscv/boot/dts/starfive/Makefile | 1 + .../riscv/boot/dts/starfive/codecs/sof_wm8960.dtsi | 84 ++++++++++++++++++++++ arch/riscv/boot/dts/starfive/jh7110-common.dtsi | 13 ++-- .../starfive/jh7110-visionfive-v2-sof-wm8960.dts | 36 ++++++++++ .../boot/dts/starfive/jh7110-visionfive-v2.dts | 40 +++++++++++ .../boot/dts/starfive/jh7110-visionfive-v2.dtsi | 16 ++--- arch/riscv/boot/dts/starfive/jh7110.dtsi | 14 ++-- 7 files changed, 177 insertions(+), 27 deletions(-) create mode 100644 arch/riscv/boot/dts/starfive/codecs/sof_wm8960.dtsi create mode 100644 arch/riscv/boot/dts/starfive/jh7110-visionfive-v2-sof-wm8960.dts (limited to 'arch') diff --git a/arch/riscv/boot/dts/starfive/Makefile b/arch/riscv/boot/dts/starfive/Makefile index 93fd8db63f47..9919dcdb9839 100644 --- a/arch/riscv/boot/dts/starfive/Makefile +++ b/arch/riscv/boot/dts/starfive/Makefile @@ -15,4 +15,5 @@ dtb-$(CONFIG_SOC_STARFIVE_JH7110) += jh7110-visionfive-v2.dtb \ jh7110-visionfive-v2-A10.dtb \ jh7110-visionfive-v2-A11.dtb \ jh7110-visionfive-v2-wm8960.dtb \ + jh7110-visionfive-v2-sof-wm8960.dtb \ jh7110-visionfive-v2-ac108.dtb diff --git a/arch/riscv/boot/dts/starfive/codecs/sof_wm8960.dtsi b/arch/riscv/boot/dts/starfive/codecs/sof_wm8960.dtsi new file mode 100644 index 000000000000..8295b3918533 --- /dev/null +++ b/arch/riscv/boot/dts/starfive/codecs/sof_wm8960.dtsi @@ -0,0 +1,84 @@ +&sound6 { + /* sof + wm8960 */ + simple-audio-card,dai-link@0 { + reg = <0>; + format = "dsp_a"; + bitclock-master = <&sndcodec1>; + frame-master = <&sndcodec1>; + + widgets = "Microphone", "Mic Jack", + "Line", "Line In", + "Line", "Line Out", + "Speaker", "Speaker", + "Headphone", "Headphone Jack"; + routing = "Headphone Jack", "HP_L", + "Headphone Jack", "HP_R", + "Speaker", "SPK_LP", + "Speaker", "SPK_LN", + "LINPUT1", "Mic Jack", + "LINPUT3", "Mic Jack", + "RINPUT1", "Mic Jack", + "RINPUT2", "Mic Jack", + "Playback", "SSP0.OUT", + "SSP0.IN", "Capture"; + + cpu { + sound-dai = <&sof_tdm>; + }; + + plat { + sound-dai = <&sof_dsp>; + }; + + sndcodec1:codec { + sound-dai = <&wm8960>; + clocks = <&wm8960_mclk>; + clock-names = "mclk"; + }; + }; +}; + +&soc { + sof_tdm: sof-tdm@0 { + compatible = "starfive,jh7110-sof-dai"; + reg = <0x0 0x10090000 0x0 0x1000>; + reg-names = "tdm"; + clocks = <&clkgen JH7110_TDM_CLK_AHB>, + <&clkgen JH7110_TDM_CLK_APB>, + <&clkgen JH7110_TDM_INTERNAL>, + <&tdm_ext>, + <&clkgen JH7110_TDM_CLK_TDM>, + <&clkgen JH7110_MCLK_INNER>; + clock-names = "clk_tdm_ahb", "clk_tdm_apb", + "clk_tdm_internal", "clk_tdm_ext", + "clk_tdm", "mclk_inner"; + resets = <&rstgen RSTN_U0_TDM16SLOT_AHB>, + <&rstgen RSTN_U0_TDM16SLOT_APB>, + <&rstgen RSTN_U0_TDM16SLOT_TDM>; + reset-names = "tdm_ahb", "tdm_apb", "tdm_rst"; + #sound-dai-cells = <0>; + status = "disabled"; + }; +}; + + +&sof_dsp { + #sound-dai-cells = <0>; + compatible = "starfive,vf2-dsp-v1"; + firmware-name = "sof-vf2.ri"; + tplg-name = "sof-vf2-wm8960.tplg"; + machine-drv-name = "asoc-simple-card"; + status = "disabled"; +}; + +&dma { + dma-channels = <2>; + snps,priority = <0 1>; + snps,block-size = <65536 65536>; +}; + +&sof_tdm { + pinctrl-names = "default"; + pinctrl-0 = <&tdm0_pins>; + status = "disabled"; +}; \ No newline at end of file diff --git a/arch/riscv/boot/dts/starfive/jh7110-common.dtsi b/arch/riscv/boot/dts/starfive/jh7110-common.dtsi index 987fbba5a587..054997b44290 100755 --- a/arch/riscv/boot/dts/starfive/jh7110-common.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7110-common.dtsi @@ -62,11 +62,8 @@ reg = <0x0 0x6ce00000 0x0 0x1600000>; }; - xrp_reserved: xrpbuffer@f0000000 { - reg = <0x0 0x69c00000 0x0 0x01ffffff - 0x0 0x6bc00000 0x0 0x00001000 - 0x0 0x6bc01000 0x0 0x00fff000 - 0x0 0x6cc00000 0x0 0x00001000>; + hifi4_reserved: hifi4@f0000000 { + reg = <0x0 0x69c00000 0x0 0x03001000>; }; }; @@ -751,7 +748,7 @@ status = "disabled"; }; -&xrp { - memory-region = <&xrp_reserved>; - status = "okay"; +&sof_dsp { + memory-region = <&hifi4_reserved>; + status = "disabled"; }; diff --git a/arch/riscv/boot/dts/starfive/jh7110-visionfive-v2-sof-wm8960.dts b/arch/riscv/boot/dts/starfive/jh7110-visionfive-v2-sof-wm8960.dts new file mode 100644 index 000000000000..8be56ab74e3b --- /dev/null +++ b/arch/riscv/boot/dts/starfive/jh7110-visionfive-v2-sof-wm8960.dts @@ -0,0 +1,36 @@ +// SPDX-License-Identifier: GPL-2.0 OR MIT +/* + * Copyright (C) 2022 StarFive Technology Co., Ltd. + * Copyright (C) 2022 Hal Feng + */ + +/dts-v1/; +#include "jh7110-visionfive-v2.dts" +#include "codecs/sof_wm8960.dtsi" + +&i2c0 { + status = "okay"; + wm8960: codec@1a { + compatible = "wlf,wm8960"; + reg = <0x1a>; + #sound-dai-cells = <0>; + + wlf,shared-lrclk; + }; +}; + +&pdm { + status = "disabled"; +}; + +&mailbox_client0 { + status = "disabled"; +}; + +&sof_tdm { + status = "okay"; +}; + +&sof_dsp { + status = "okay"; +}; \ No newline at end of file diff --git a/arch/riscv/boot/dts/starfive/jh7110-visionfive-v2.dts b/arch/riscv/boot/dts/starfive/jh7110-visionfive-v2.dts index 9e4563355cc4..2cdf93d849d6 100644 --- a/arch/riscv/boot/dts/starfive/jh7110-visionfive-v2.dts +++ b/arch/riscv/boot/dts/starfive/jh7110-visionfive-v2.dts @@ -212,6 +212,40 @@ starfive,pin-gpio-doen = ; }; }; + + tdm0_pins: tdm0-pins { + tdm0-pins-tx { + starfive,pins = ; + starfive,pinmux = ; + starfive,pin-ioconfig = ; + starfive,pin-gpio-dout = ; + starfive,pin-gpio-doen = ; + }; + + tdm0-pins-rx { + starfive,pins = ; + starfive,pinmux = ; + starfive,pin-ioconfig = ; + starfive,pin-gpio-doen = ; + starfive,pin-gpio-din = ; + }; + + tdm0-pins-sync { + starfive,pins = ; + starfive,pinmux = ; + starfive,pin-ioconfig = ; + starfive,pin-gpio-doen = ; + starfive,pin-gpio-din = ; + }; + + tdm0-pins-pcmclk { + starfive,pins = ; + starfive,pinmux = ; + starfive,pin-ioconfig = ; + starfive,pin-gpio-doen = ; + starfive,pin-gpio-din = ; + }; + }; }; &uart0 { @@ -257,3 +291,9 @@ clocks = <&clkgen JH7110_CPU_CORE>; clock-names = "cpu"; }; + +&tdm { + pinctrl-names = "default"; + pinctrl-0 = <&tdm0_pins>; + status = "disabled"; +}; diff --git a/arch/riscv/boot/dts/starfive/jh7110-visionfive-v2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-visionfive-v2.dtsi index fbaa2bf0b060..6f26806c0599 100755 --- a/arch/riscv/boot/dts/starfive/jh7110-visionfive-v2.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7110-visionfive-v2.dtsi @@ -67,11 +67,8 @@ reg = <0x0 0x6ce00000 0x0 0x1600000>; }; - xrp_reserved: xrpbuffer@f0000000 { - reg = <0x0 0x69c00000 0x0 0x01ffffff - 0x0 0x6bc00000 0x0 0x00001000 - 0x0 0x6bc01000 0x0 0x00fff000 - 0x0 0x6cc00000 0x0 0x00001000>; + hifi4_reserved: hifi4@f0000000 { + reg = <0x0 0x69c00000 0x0 0x03001000>; }; }; @@ -911,13 +908,12 @@ status = "okay"; }; -&xrp { - memory-region = <&xrp_reserved>; - status = "okay"; -}; - &ptc { pinctrl-names = "default"; pinctrl-0 = <&pwm_pins>; status = "okay"; }; + +&sof_dsp { + memory-region = <&hifi4_reserved>; +}; diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi index 96a6af93134f..1998e00fe8de 100755 --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi @@ -1831,25 +1831,21 @@ dsp@0 {}; }; - xrp: xrp@0 { - compatible = "cdns,xrp"; + sof_dsp: sof_dsp@0 { + compatible = "starfive,vf2-dsp-v1"; dma-coherent; - reg = <0x0 0x10230000 0x0 0x00010000 - 0x0 0x10240000 0x0 0x00010000>; + reg = <0x0 0x20020000 0x0 0x10000>; clocks = <&clkgen JH7110_HIFI4_CLK_CORE>; clock-names = "core_clk"; resets = <&rstgen RSTN_U0_HIFI4_CORE>, <&rstgen RSTN_U0_HIFI4_AXI>; reset-names = "rst_core","rst_axi"; starfive,stg-syscon = <&stg_syscon>; - firmware-name = "hifi4_elf"; + mbox-names = "tx", "rx"; + mboxes = <&mailbox_contrl0 0 1>,<&mailbox_contrl0 1 0>; #address-cells = <1>; #size-cells = <1>; - ranges = <0x40000000 0x0 0x20000000 0x040000 - 0x69c00000 0x0 0x69c00000 0x03000000>; status = "disabled"; - dsp@0 { - }; }; starfive_cpufreq: starfive,jh7110-cpufreq { -- cgit v1.2.3 From ee0f2ba3df175277b5dfda1eda652abd43c01235 Mon Sep 17 00:00:00 2001 From: "carter.li" Date: Thu, 27 Jul 2023 17:25:18 +0800 Subject: riscv: config: hifi4: add sof default config for starfive add sof default config and change mailbox's config to y, because sof need mailbox for ipc. Signed-off-by: carter.li --- arch/riscv/configs/starfive_visionfive2_defconfig | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/riscv/configs/starfive_visionfive2_defconfig b/arch/riscv/configs/starfive_visionfive2_defconfig index 18c79425fcb5..c44bc8eed81a 100644 --- a/arch/riscv/configs/starfive_visionfive2_defconfig +++ b/arch/riscv/configs/starfive_visionfive2_defconfig @@ -232,9 +232,15 @@ CONFIG_SND=y CONFIG_SND_USB_AUDIO=y CONFIG_SND_SOC=y CONFIG_SND_DESIGNWARE_I2S=y +CONFIG_SND_SOC_SOF_TOPLEVEL=y +CONFIG_SND_SOC_SOF_OF=y +CONFIG_SND_SOC_SOF_STARFIVE_TOPLEVEL=y +CONFIG_SND_SOC_SOF_STARFIVE_SUPPORT=y +CONFIG_STARFIVE_DSP=y CONFIG_SND_SOC_STARFIVE=y CONFIG_SND_SOC_STARFIVE_PWMDAC=y CONFIG_SND_SOC_STARFIVE_I2S=y +CONFIG_SND_SOC_STARFIVE_SOF_TDM_DAI=y CONFIG_SND_SOC_AC108=y CONFIG_SND_SOC_WM8960=y CONFIG_SND_SIMPLE_CARD=y @@ -321,7 +327,7 @@ CONFIG_DMATEST=y CONFIG_GOLDFISH=y CONFIG_STARFIVE_TIMER=y CONFIG_MAILBOX=y -CONFIG_STARFIVE_MBOX=m +CONFIG_STARFIVE_MBOX=y CONFIG_STARFIVE_MBOX_TEST=m # CONFIG_IOMMU_SUPPORT is not set CONFIG_RPMSG_CHAR=y -- cgit v1.2.3