From d99434e1760b94e08512821b5a05992398c1aa9e Mon Sep 17 00:00:00 2001 From: Max Filippov Date: Tue, 25 Aug 2015 09:04:12 +0300 Subject: xtensa: xtfpga: fix ethernet controller endianness Ethernet controller is attached to XTFPGA boards as native endian device, mark it as such in DTS and pass correct endianness in platform data. This makes network functional on big-endian CPUs. Signed-off-by: Max Filippov --- arch/xtensa/boot/dts/xtfpga.dtsi | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/xtensa/boot/dts') diff --git a/arch/xtensa/boot/dts/xtfpga.dtsi b/arch/xtensa/boot/dts/xtfpga.dtsi index be3fd769677a..de133badcdc9 100644 --- a/arch/xtensa/boot/dts/xtfpga.dtsi +++ b/arch/xtensa/boot/dts/xtfpga.dtsi @@ -69,6 +69,7 @@ enet0: ethoc@0d030000 { compatible = "opencores,ethoc"; reg = <0x0d030000 0x4000 0x0d800000 0x4000>; + native-endian; interrupts = <1 1>; /* external irq 1 */ local-mac-address = [00 50 c2 13 6f 00]; clocks = <&osc>; -- cgit v1.2.3