From 611cd90c91494d1ff9bd4bc349fe38789828733e Mon Sep 17 00:00:00 2001 From: Michael Ellerman Date: Wed, 6 Aug 2008 09:10:00 +1000 Subject: powerpc: fsl_msi doesn't need it's own of_node The FSL MSI code keeps a pointer to the of_node from the device it represents. However it also has an irq_host, which contains a pointer to the of_node, so use that one instead. Signed-off-by: Michael Ellerman Signed-off-by: Paul Mackerras --- arch/powerpc/sysdev/fsl_msi.c | 12 +++++------- arch/powerpc/sysdev/fsl_msi.h | 3 --- 2 files changed, 5 insertions(+), 10 deletions(-) (limited to 'arch/powerpc/sysdev') diff --git a/arch/powerpc/sysdev/fsl_msi.c b/arch/powerpc/sysdev/fsl_msi.c index 2c5187cc8a24..d49fa9904d53 100644 --- a/arch/powerpc/sysdev/fsl_msi.c +++ b/arch/powerpc/sysdev/fsl_msi.c @@ -108,7 +108,8 @@ static int fsl_msi_free_dt_hwirqs(struct fsl_msi *msi) bitmap_allocate_region(msi->fsl_msi_bitmap, 0, get_count_order(NR_MSI_IRQS)); - p = of_get_property(msi->of_node, "msi-available-ranges", &len); + p = of_get_property(msi->irqhost->of_node, "msi-available-ranges", + &len); if (!p) { /* No msi-available-ranges property, @@ -120,7 +121,7 @@ static int fsl_msi_free_dt_hwirqs(struct fsl_msi *msi) if ((len % (2 * sizeof(u32))) != 0) { printk(KERN_WARNING "fsl_msi: Malformed msi-available-ranges " - "property on %s\n", msi->of_node->full_name); + "property on %s\n", msi->irqhost->of_node->full_name); return -EINVAL; } @@ -317,14 +318,11 @@ static int __devinit fsl_of_msi_probe(struct of_device *dev, goto error_out; } - msi->of_node = of_node_get(dev->node); + msi->irqhost = irq_alloc_host(dev->node, IRQ_HOST_MAP_LINEAR, + NR_MSI_IRQS, &fsl_msi_host_ops, 0); - msi->irqhost = irq_alloc_host(of_node_get(dev->node), - IRQ_HOST_MAP_LINEAR, - NR_MSI_IRQS, &fsl_msi_host_ops, 0); if (msi->irqhost == NULL) { dev_err(&dev->dev, "No memory for MSI irqhost\n"); - of_node_put(dev->node); err = -ENOMEM; goto error_out; } diff --git a/arch/powerpc/sysdev/fsl_msi.h b/arch/powerpc/sysdev/fsl_msi.h index a653468521fa..6574550c00a5 100644 --- a/arch/powerpc/sysdev/fsl_msi.h +++ b/arch/powerpc/sysdev/fsl_msi.h @@ -22,9 +22,6 @@ #define FSL_PIC_IP_IPIC 0x00000002 struct fsl_msi { - /* Device node of the MSI interrupt*/ - struct device_node *of_node; - struct irq_host *irqhost; unsigned long cascade_irq; -- cgit v1.2.3 From 7e302869e0c5261aba779e059cddcd2fbf7aedbe Mon Sep 17 00:00:00 2001 From: Michael Ellerman Date: Wed, 6 Aug 2008 09:10:01 +1000 Subject: powerpc: Split-out common MSI bitmap logic into msi_bitmap.c There are now two almost identical implementations of an MSI bitmap allocator, one in mpic_msi.c and the other in fsl_msi.c. Merge them together and put the result in msi_bitmap.c. Some of the MPIC bits will remain to provide a nicer interface for the MPIC users. In the process we fix two buglets. The first is that the allocation routines, now msi_bitmap_alloc_hwirqs(), returned an unsigned result, even though they use -1 to indicate allocation failure. Although all the callers were checking correctly, it is much better for the routine to just return an int. At least until someone wants > ~2 billion MSIs. The second buglet is that the device tree reservation logic only allowed power-of-two reservations. AFAICT that didn't effect any existing code but it's nicer if we can reserve arbitrary irqs from MSI use. We also add some selftests, which exposed the two buglets and now test for them, as well as some basic sanity tests. The tests are only built when CONFIG_DEBUG_KERNEL=y. Signed-off-by: Michael Ellerman Signed-off-by: Paul Mackerras --- arch/powerpc/Kconfig.debug | 5 + arch/powerpc/include/asm/msi_bitmap.h | 35 +++++ arch/powerpc/sysdev/Kconfig | 6 + arch/powerpc/sysdev/Makefile | 1 + arch/powerpc/sysdev/msi_bitmap.c | 247 ++++++++++++++++++++++++++++++++++ 5 files changed, 294 insertions(+) create mode 100644 arch/powerpc/include/asm/msi_bitmap.h create mode 100644 arch/powerpc/sysdev/msi_bitmap.c (limited to 'arch/powerpc/sysdev') diff --git a/arch/powerpc/Kconfig.debug b/arch/powerpc/Kconfig.debug index 4ebc52a19f0a..15eb27861fc7 100644 --- a/arch/powerpc/Kconfig.debug +++ b/arch/powerpc/Kconfig.debug @@ -51,6 +51,11 @@ config FTR_FIXUP_SELFTEST depends on DEBUG_KERNEL default n +config MSI_BITMAP_SELFTEST + bool "Run self-tests of the MSI bitmap code." + depends on DEBUG_KERNEL + default n + config XMON bool "Include xmon kernel debugger" depends on DEBUG_KERNEL diff --git a/arch/powerpc/include/asm/msi_bitmap.h b/arch/powerpc/include/asm/msi_bitmap.h new file mode 100644 index 000000000000..97ac3f46ae0d --- /dev/null +++ b/arch/powerpc/include/asm/msi_bitmap.h @@ -0,0 +1,35 @@ +#ifndef _POWERPC_SYSDEV_MSI_BITMAP_H +#define _POWERPC_SYSDEV_MSI_BITMAP_H + +/* + * Copyright 2008, Michael Ellerman, IBM Corporation. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; version 2 of the + * License. + * + */ + +#include +#include + +struct msi_bitmap { + struct device_node *of_node; + unsigned long *bitmap; + spinlock_t lock; + unsigned int irq_count; +}; + +int msi_bitmap_alloc_hwirqs(struct msi_bitmap *bmp, int num); +void msi_bitmap_free_hwirqs(struct msi_bitmap *bmp, unsigned int offset, + unsigned int num); +void msi_bitmap_reserve_hwirq(struct msi_bitmap *bmp, unsigned int hwirq); + +int msi_bitmap_reserve_dt_hwirqs(struct msi_bitmap *bmp); + +int msi_bitmap_alloc(struct msi_bitmap *bmp, unsigned int irq_count, + struct device_node *of_node); +void msi_bitmap_free(struct msi_bitmap *bmp); + +#endif /* _POWERPC_SYSDEV_MSI_BITMAP_H */ diff --git a/arch/powerpc/sysdev/Kconfig b/arch/powerpc/sysdev/Kconfig index 72fb35b9ebca..396582835cb5 100644 --- a/arch/powerpc/sysdev/Kconfig +++ b/arch/powerpc/sysdev/Kconfig @@ -6,3 +6,9 @@ config PPC4xx_PCI_EXPRESS bool depends on PCI && 4xx default n + +config PPC_MSI_BITMAP + bool + depends on PCI_MSI + default y if MPIC + default y if FSL_PCI diff --git a/arch/powerpc/sysdev/Makefile b/arch/powerpc/sysdev/Makefile index a90054b56d5c..b6c269eb2650 100644 --- a/arch/powerpc/sysdev/Makefile +++ b/arch/powerpc/sysdev/Makefile @@ -5,6 +5,7 @@ endif mpic-msi-obj-$(CONFIG_PCI_MSI) += mpic_msi.o mpic_u3msi.o mpic_pasemi_msi.o obj-$(CONFIG_MPIC) += mpic.o $(mpic-msi-obj-y) fsl-msi-obj-$(CONFIG_PCI_MSI) += fsl_msi.o +obj-$(CONFIG_PPC_MSI_BITMAP) += msi_bitmap.o obj-$(CONFIG_PPC_MPC106) += grackle.o obj-$(CONFIG_PPC_DCR_NATIVE) += dcr-low.o diff --git a/arch/powerpc/sysdev/msi_bitmap.c b/arch/powerpc/sysdev/msi_bitmap.c new file mode 100644 index 000000000000..f84217b8863a --- /dev/null +++ b/arch/powerpc/sysdev/msi_bitmap.c @@ -0,0 +1,247 @@ +/* + * Copyright 2006-2008, Michael Ellerman, IBM Corporation. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; version 2 of the + * License. + * + */ + +#include +#include +#include + +int msi_bitmap_alloc_hwirqs(struct msi_bitmap *bmp, int num) +{ + unsigned long flags; + int offset, order = get_count_order(num); + + spin_lock_irqsave(&bmp->lock, flags); + /* + * This is fast, but stricter than we need. We might want to add + * a fallback routine which does a linear search with no alignment. + */ + offset = bitmap_find_free_region(bmp->bitmap, bmp->irq_count, order); + spin_unlock_irqrestore(&bmp->lock, flags); + + pr_debug("msi_bitmap: allocated 0x%x (2^%d) at offset 0x%x\n", + num, order, offset); + + return offset; +} + +void msi_bitmap_free_hwirqs(struct msi_bitmap *bmp, unsigned int offset, + unsigned int num) +{ + unsigned long flags; + int order = get_count_order(num); + + pr_debug("msi_bitmap: freeing 0x%x (2^%d) at offset 0x%x\n", + num, order, offset); + + spin_lock_irqsave(&bmp->lock, flags); + bitmap_release_region(bmp->bitmap, offset, order); + spin_unlock_irqrestore(&bmp->lock, flags); +} + +void msi_bitmap_reserve_hwirq(struct msi_bitmap *bmp, unsigned int hwirq) +{ + unsigned long flags; + + pr_debug("msi_bitmap: reserving hwirq 0x%x\n", hwirq); + + spin_lock_irqsave(&bmp->lock, flags); + bitmap_allocate_region(bmp->bitmap, hwirq, 0); + spin_unlock_irqrestore(&bmp->lock, flags); +} + +/** + * msi_bitmap_reserve_dt_hwirqs - Reserve irqs specified in the device tree. + * @bmp: pointer to the MSI bitmap. + * + * Looks in the device tree to see if there is a property specifying which + * irqs can be used for MSI. If found those irqs reserved in the device tree + * are reserved in the bitmap. + * + * Returns 0 for success, < 0 if there was an error, and > 0 if no property + * was found in the device tree. + **/ +int msi_bitmap_reserve_dt_hwirqs(struct msi_bitmap *bmp) +{ + int i, j, len; + const u32 *p; + + if (!bmp->of_node) + return 1; + + p = of_get_property(bmp->of_node, "msi-available-ranges", &len); + if (!p) { + pr_debug("msi_bitmap: no msi-available-ranges property " \ + "found on %s\n", bmp->of_node->full_name); + return 1; + } + + if (len % (2 * sizeof(u32)) != 0) { + printk(KERN_WARNING "msi_bitmap: Malformed msi-available-ranges" + " property on %s\n", bmp->of_node->full_name); + return -EINVAL; + } + + bitmap_allocate_region(bmp->bitmap, 0, get_count_order(bmp->irq_count)); + + spin_lock(&bmp->lock); + + /* Format is: ( )+ */ + len /= 2 * sizeof(u32); + for (i = 0; i < len; i++, p += 2) { + for (j = 0; j < *(p + 1); j++) + bitmap_release_region(bmp->bitmap, *p + j, 0); + } + + spin_unlock(&bmp->lock); + + return 0; +} + +int msi_bitmap_alloc(struct msi_bitmap *bmp, unsigned int irq_count, + struct device_node *of_node) +{ + int size; + + if (!irq_count) + return -EINVAL; + + size = BITS_TO_LONGS(irq_count) * sizeof(long); + pr_debug("msi_bitmap: allocator bitmap size is 0x%x bytes\n", size); + + bmp->bitmap = zalloc_maybe_bootmem(size, GFP_KERNEL); + if (!bmp->bitmap) { + pr_debug("msi_bitmap: ENOMEM allocating allocator bitmap!\n"); + return -ENOMEM; + } + + /* We zalloc'ed the bitmap, so all irqs are free by default */ + spin_lock_init(&bmp->lock); + bmp->of_node = of_node_get(of_node); + bmp->irq_count = irq_count; + + return 0; +} + +void msi_bitmap_free(struct msi_bitmap *bmp) +{ + /* we can't free the bitmap we don't know if it's bootmem etc. */ + of_node_put(bmp->of_node); + bmp->bitmap = NULL; +} + +#ifdef CONFIG_MSI_BITMAP_SELFTEST + +#define check(x) \ + if (!(x)) printk("msi_bitmap: test failed at line %d\n", __LINE__); + +void test_basics(void) +{ + struct msi_bitmap bmp; + int i, size = 512; + + /* Can't allocate a bitmap of 0 irqs */ + check(msi_bitmap_alloc(&bmp, 0, NULL) != 0); + + /* of_node may be NULL */ + check(0 == msi_bitmap_alloc(&bmp, size, NULL)); + + /* Should all be free by default */ + check(0 == bitmap_find_free_region(bmp.bitmap, size, + get_count_order(size))); + bitmap_release_region(bmp.bitmap, 0, get_count_order(size)); + + /* With no node, there's no msi-available-ranges, so expect > 0 */ + check(msi_bitmap_reserve_dt_hwirqs(&bmp) > 0); + + /* Should all still be free */ + check(0 == bitmap_find_free_region(bmp.bitmap, size, + get_count_order(size))); + bitmap_release_region(bmp.bitmap, 0, get_count_order(size)); + + /* Check we can fill it up and then no more */ + for (i = 0; i < size; i++) + check(msi_bitmap_alloc_hwirqs(&bmp, 1) >= 0); + + check(msi_bitmap_alloc_hwirqs(&bmp, 1) < 0); + + /* Should all be allocated */ + check(bitmap_find_free_region(bmp.bitmap, size, 0) < 0); + + /* And if we free one we can then allocate another */ + msi_bitmap_free_hwirqs(&bmp, size / 2, 1); + check(msi_bitmap_alloc_hwirqs(&bmp, 1) == size / 2); + + msi_bitmap_free(&bmp); + + /* Clients may check bitmap == NULL for "not-allocated" */ + check(bmp.bitmap == NULL); + + kfree(bmp.bitmap); +} + +void test_of_node(void) +{ + u32 prop_data[] = { 10, 10, 25, 3, 40, 1, 100, 100, 200, 20 }; + const char *expected_str = "0-9,20-24,28-39,41-99,220-255"; + char *prop_name = "msi-available-ranges"; + char *node_name = "/fakenode"; + struct device_node of_node; + struct property prop; + struct msi_bitmap bmp; + int size = 256; + DECLARE_BITMAP(expected, size); + + /* There should really be a struct device_node allocator */ + memset(&of_node, 0, sizeof(of_node)); + kref_init(&of_node.kref); + of_node.full_name = node_name; + + check(0 == msi_bitmap_alloc(&bmp, size, &of_node)); + + /* No msi-available-ranges, so expect > 0 */ + check(msi_bitmap_reserve_dt_hwirqs(&bmp) > 0); + + /* Should all still be free */ + check(0 == bitmap_find_free_region(bmp.bitmap, size, + get_count_order(size))); + bitmap_release_region(bmp.bitmap, 0, get_count_order(size)); + + /* Now create a fake msi-available-ranges property */ + + /* There should really .. oh whatever */ + memset(&prop, 0, sizeof(prop)); + prop.name = prop_name; + prop.value = &prop_data; + prop.length = sizeof(prop_data); + + of_node.properties = ∝ + + /* msi-available-ranges, so expect == 0 */ + check(msi_bitmap_reserve_dt_hwirqs(&bmp) == 0); + + /* Check we got the expected result */ + check(0 == bitmap_parselist(expected_str, expected, size)); + check(bitmap_equal(expected, bmp.bitmap, size)); + + msi_bitmap_free(&bmp); + kfree(bmp.bitmap); +} + +int msi_bitmap_selftest(void) +{ + printk(KERN_DEBUG "Running MSI bitmap self-tests ...\n"); + + test_basics(); + test_of_node(); + + return 0; +} +late_initcall(msi_bitmap_selftest); +#endif /* CONFIG_MSI_BITMAP_SELFTEST */ -- cgit v1.2.3 From 7e7ab3677502a0f798f38bfa1a7d53dd22faa0bc Mon Sep 17 00:00:00 2001 From: Michael Ellerman Date: Wed, 6 Aug 2008 09:10:02 +1000 Subject: powerpc: Convert the FSL MSI code to use msi_bitmap This is 90% straight forward, although we have to change a few printk format strings as well because of the change in type of hwirq. Signed-off-by: Michael Ellerman Signed-off-by: Paul Mackerras --- arch/powerpc/sysdev/fsl_msi.c | 103 ++++++------------------------------------ arch/powerpc/sysdev/fsl_msi.h | 5 +- 2 files changed, 17 insertions(+), 91 deletions(-) (limited to 'arch/powerpc/sysdev') diff --git a/arch/powerpc/sysdev/fsl_msi.c b/arch/powerpc/sysdev/fsl_msi.c index d49fa9904d53..f25ce818d40a 100644 --- a/arch/powerpc/sysdev/fsl_msi.c +++ b/arch/powerpc/sysdev/fsl_msi.c @@ -14,7 +14,6 @@ */ #include #include -#include #include #include #include @@ -67,96 +66,22 @@ static struct irq_host_ops fsl_msi_host_ops = { .map = fsl_msi_host_map, }; -static irq_hw_number_t fsl_msi_alloc_hwirqs(struct fsl_msi *msi, int num) -{ - unsigned long flags; - int order = get_count_order(num); - int offset; - - spin_lock_irqsave(&msi->bitmap_lock, flags); - - offset = bitmap_find_free_region(msi->fsl_msi_bitmap, - NR_MSI_IRQS, order); - - spin_unlock_irqrestore(&msi->bitmap_lock, flags); - - pr_debug("%s: allocated 0x%x (2^%d) at offset 0x%x\n", - __func__, num, order, offset); - - return offset; -} - -static void fsl_msi_free_hwirqs(struct fsl_msi *msi, int offset, int num) -{ - unsigned long flags; - int order = get_count_order(num); - - pr_debug("%s: freeing 0x%x (2^%d) at offset 0x%x\n", - __func__, num, order, offset); - - spin_lock_irqsave(&msi->bitmap_lock, flags); - bitmap_release_region(msi->fsl_msi_bitmap, offset, order); - spin_unlock_irqrestore(&msi->bitmap_lock, flags); -} - -static int fsl_msi_free_dt_hwirqs(struct fsl_msi *msi) -{ - int i; - int len; - const u32 *p; - - bitmap_allocate_region(msi->fsl_msi_bitmap, 0, - get_count_order(NR_MSI_IRQS)); - - p = of_get_property(msi->irqhost->of_node, "msi-available-ranges", - &len); - - if (!p) { - /* No msi-available-ranges property, - * All the 256 MSI interrupts can be used - */ - fsl_msi_free_hwirqs(msi, 0, 0x100); - return 0; - } - - if ((len % (2 * sizeof(u32))) != 0) { - printk(KERN_WARNING "fsl_msi: Malformed msi-available-ranges " - "property on %s\n", msi->irqhost->of_node->full_name); - return -EINVAL; - } - - /* Format is: ( )+ */ - len /= 2 * sizeof(u32); - for (i = 0; i < len; i++, p += 2) - fsl_msi_free_hwirqs(msi, *p, *(p + 1)); - - return 0; -} - static int fsl_msi_init_allocator(struct fsl_msi *msi_data) { int rc; - int size = BITS_TO_LONGS(NR_MSI_IRQS) * sizeof(u32); - msi_data->fsl_msi_bitmap = kzalloc(size, GFP_KERNEL); + rc = msi_bitmap_alloc(&msi_data->bitmap, NR_MSI_IRQS, + msi_data->irqhost->of_node); + if (rc) + return rc; - if (msi_data->fsl_msi_bitmap == NULL) { - pr_debug("%s: ENOMEM allocating allocator bitmap!\n", - __func__); - return -ENOMEM; + rc = msi_bitmap_reserve_dt_hwirqs(&msi_data->bitmap); + if (rc < 0) { + msi_bitmap_free(&msi_data->bitmap); + return rc; } - rc = fsl_msi_free_dt_hwirqs(msi_data); - if (rc) - goto out_free; - return 0; -out_free: - kfree(msi_data->fsl_msi_bitmap); - - msi_data->fsl_msi_bitmap = NULL; - return rc; - } static int fsl_msi_check_device(struct pci_dev *pdev, int nvec, int type) @@ -176,7 +101,8 @@ static void fsl_teardown_msi_irqs(struct pci_dev *pdev) if (entry->irq == NO_IRQ) continue; set_irq_msi(entry->irq, NULL); - fsl_msi_free_hwirqs(msi_data, virq_to_hw(entry->irq), 1); + msi_bitmap_free_hwirqs(&msi_data->bitmap, + virq_to_hw(entry->irq), 1); irq_dispose_mapping(entry->irq); } @@ -198,15 +124,14 @@ static void fsl_compose_msi_msg(struct pci_dev *pdev, int hwirq, static int fsl_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type) { - irq_hw_number_t hwirq; - int rc; + int rc, hwirq; unsigned int virq; struct msi_desc *entry; struct msi_msg msg; struct fsl_msi *msi_data = fsl_msi; list_for_each_entry(entry, &pdev->msi_list, list) { - hwirq = fsl_msi_alloc_hwirqs(msi_data, 1); + hwirq = msi_bitmap_alloc_hwirqs(&msi_data->bitmap, 1); if (hwirq < 0) { rc = hwirq; pr_debug("%s: fail allocating msi interrupt\n", @@ -217,9 +142,9 @@ static int fsl_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type) virq = irq_create_mapping(msi_data->irqhost, hwirq); if (virq == NO_IRQ) { - pr_debug("%s: fail mapping hwirq 0x%lx\n", + pr_debug("%s: fail mapping hwirq 0x%x\n", __func__, hwirq); - fsl_msi_free_hwirqs(msi_data, hwirq, 1); + msi_bitmap_free_hwirqs(&msi_data->bitmap, hwirq, 1); rc = -ENOSPC; goto out_free; } diff --git a/arch/powerpc/sysdev/fsl_msi.h b/arch/powerpc/sysdev/fsl_msi.h index 6574550c00a5..331c7e7025b7 100644 --- a/arch/powerpc/sysdev/fsl_msi.h +++ b/arch/powerpc/sysdev/fsl_msi.h @@ -13,6 +13,8 @@ #ifndef _POWERPC_SYSDEV_FSL_MSI_H #define _POWERPC_SYSDEV_FSL_MSI_H +#include + #define NR_MSI_REG 8 #define IRQS_PER_MSI_REG 32 #define NR_MSI_IRQS (NR_MSI_REG * IRQS_PER_MSI_REG) @@ -31,8 +33,7 @@ struct fsl_msi { void __iomem *msi_regs; u32 feature; - unsigned long *fsl_msi_bitmap; - spinlock_t bitmap_lock; + struct msi_bitmap bitmap; }; #endif /* _POWERPC_SYSDEV_FSL_MSI_H */ -- cgit v1.2.3 From 25235f712b680d00756a73ee64289137989fc6fd Mon Sep 17 00:00:00 2001 From: Michael Ellerman Date: Wed, 6 Aug 2008 09:10:03 +1000 Subject: powerpc: Convert the MPIC MSI code to use msi_bitmap This affects the U3 MSI code as well as the PASEMI MSI code. We keep some of the MPIC routines as helpers, and also the U3 best-guess reservation logic. The rest is replaced by the generic code. And a few printk format changes due to hwirq type change. Signed-off-by: Michael Ellerman Signed-off-by: Paul Mackerras --- arch/powerpc/include/asm/mpic.h | 4 +- arch/powerpc/sysdev/mpic.h | 2 - arch/powerpc/sysdev/mpic_msi.c | 123 +++++----------------------------- arch/powerpc/sysdev/mpic_pasemi_msi.c | 24 ++++--- arch/powerpc/sysdev/mpic_u3msi.c | 22 +++--- 5 files changed, 44 insertions(+), 131 deletions(-) (limited to 'arch/powerpc/sysdev') diff --git a/arch/powerpc/include/asm/mpic.h b/arch/powerpc/include/asm/mpic.h index fe566a348a86..34d9ac433ace 100644 --- a/arch/powerpc/include/asm/mpic.h +++ b/arch/powerpc/include/asm/mpic.h @@ -5,6 +5,7 @@ #include #include #include +#include /* * Global registers @@ -301,8 +302,7 @@ struct mpic #endif #ifdef CONFIG_PCI_MSI - spinlock_t bitmap_lock; - unsigned long *hwirq_bitmap; + struct msi_bitmap msi_bitmap; #endif #ifdef CONFIG_MPIC_BROKEN_REGREAD diff --git a/arch/powerpc/sysdev/mpic.h b/arch/powerpc/sysdev/mpic.h index fbf8a266941c..6209c62a426d 100644 --- a/arch/powerpc/sysdev/mpic.h +++ b/arch/powerpc/sysdev/mpic.h @@ -14,8 +14,6 @@ #ifdef CONFIG_PCI_MSI extern void mpic_msi_reserve_hwirq(struct mpic *mpic, irq_hw_number_t hwirq); extern int mpic_msi_init_allocator(struct mpic *mpic); -extern irq_hw_number_t mpic_msi_alloc_hwirqs(struct mpic *mpic, int num); -extern void mpic_msi_free_hwirqs(struct mpic *mpic, int offset, int num); extern int mpic_u3msi_init(struct mpic *mpic); extern int mpic_pasemi_msi_init(struct mpic *mpic); #else diff --git a/arch/powerpc/sysdev/mpic_msi.c b/arch/powerpc/sysdev/mpic_msi.c index de3e5e8bc324..1d44eee80fa1 100644 --- a/arch/powerpc/sysdev/mpic_msi.c +++ b/arch/powerpc/sysdev/mpic_msi.c @@ -15,59 +15,17 @@ #include #include #include +#include #include -static void __mpic_msi_reserve_hwirq(struct mpic *mpic, irq_hw_number_t hwirq) -{ - pr_debug("mpic: reserving hwirq 0x%lx\n", hwirq); - bitmap_allocate_region(mpic->hwirq_bitmap, hwirq, 0); -} - void mpic_msi_reserve_hwirq(struct mpic *mpic, irq_hw_number_t hwirq) { - unsigned long flags; - /* The mpic calls this even when there is no allocator setup */ - if (!mpic->hwirq_bitmap) + if (!mpic->msi_bitmap.bitmap) return; - spin_lock_irqsave(&mpic->bitmap_lock, flags); - __mpic_msi_reserve_hwirq(mpic, hwirq); - spin_unlock_irqrestore(&mpic->bitmap_lock, flags); -} - -irq_hw_number_t mpic_msi_alloc_hwirqs(struct mpic *mpic, int num) -{ - unsigned long flags; - int offset, order = get_count_order(num); - - spin_lock_irqsave(&mpic->bitmap_lock, flags); - /* - * This is fast, but stricter than we need. We might want to add - * a fallback routine which does a linear search with no alignment. - */ - offset = bitmap_find_free_region(mpic->hwirq_bitmap, mpic->irq_count, - order); - spin_unlock_irqrestore(&mpic->bitmap_lock, flags); - - pr_debug("mpic: allocated 0x%x (2^%d) at offset 0x%x\n", - num, order, offset); - - return offset; -} - -void mpic_msi_free_hwirqs(struct mpic *mpic, int offset, int num) -{ - unsigned long flags; - int order = get_count_order(num); - - pr_debug("mpic: freeing 0x%x (2^%d) at offset 0x%x\n", - num, order, offset); - - spin_lock_irqsave(&mpic->bitmap_lock, flags); - bitmap_release_region(mpic->hwirq_bitmap, offset, order); - spin_unlock_irqrestore(&mpic->bitmap_lock, flags); + msi_bitmap_reserve_hwirq(&mpic->msi_bitmap, hwirq); } #ifdef CONFIG_MPIC_U3_HT_IRQS @@ -83,13 +41,13 @@ static int mpic_msi_reserve_u3_hwirqs(struct mpic *mpic) /* Reserve source numbers we know are reserved in the HW */ for (i = 0; i < 8; i++) - __mpic_msi_reserve_hwirq(mpic, i); + msi_bitmap_reserve_hwirq(&mpic->msi_bitmap, i); for (i = 42; i < 46; i++) - __mpic_msi_reserve_hwirq(mpic, i); + msi_bitmap_reserve_hwirq(&mpic->msi_bitmap, i); for (i = 100; i < 105; i++) - __mpic_msi_reserve_hwirq(mpic, i); + msi_bitmap_reserve_hwirq(&mpic->msi_bitmap, i); np = NULL; while ((np = of_find_all_nodes(np))) { @@ -99,7 +57,7 @@ static int mpic_msi_reserve_u3_hwirqs(struct mpic *mpic) while (of_irq_map_one(np, index++, &oirq) == 0) { ops->xlate(mpic->irqhost, NULL, oirq.specifier, oirq.size, &hwirq, &flags); - __mpic_msi_reserve_hwirq(mpic, hwirq); + msi_bitmap_reserve_hwirq(&mpic->msi_bitmap, hwirq); } } @@ -112,70 +70,25 @@ static int mpic_msi_reserve_u3_hwirqs(struct mpic *mpic) } #endif -static int mpic_msi_reserve_dt_hwirqs(struct mpic *mpic) -{ - int i, len; - const u32 *p; - - p = of_get_property(mpic->irqhost->of_node, - "msi-available-ranges", &len); - if (!p) { - pr_debug("mpic: no msi-available-ranges property found on %s\n", - mpic->irqhost->of_node->full_name); - return -ENODEV; - } - - if (len % 8 != 0) { - printk(KERN_WARNING "mpic: Malformed msi-available-ranges " - "property on %s\n", mpic->irqhost->of_node->full_name); - return -EINVAL; - } - - bitmap_allocate_region(mpic->hwirq_bitmap, 0, - get_count_order(mpic->irq_count)); - - /* Format is: ( )+ */ - len /= sizeof(u32); - for (i = 0; i < len / 2; i++, p += 2) - mpic_msi_free_hwirqs(mpic, *p, *(p + 1)); - - return 0; -} - int mpic_msi_init_allocator(struct mpic *mpic) { - int rc, size; - - BUG_ON(mpic->hwirq_bitmap); - spin_lock_init(&mpic->bitmap_lock); + int rc; - size = BITS_TO_LONGS(mpic->irq_count) * sizeof(long); - pr_debug("mpic: allocator bitmap size is 0x%x bytes\n", size); + rc = msi_bitmap_alloc(&mpic->msi_bitmap, mpic->irq_count, + mpic->irqhost->of_node); + if (rc) + return rc; - mpic->hwirq_bitmap = alloc_maybe_bootmem(size, GFP_KERNEL); - - if (!mpic->hwirq_bitmap) { - pr_debug("mpic: ENOMEM allocating allocator bitmap!\n"); - return -ENOMEM; - } - - memset(mpic->hwirq_bitmap, 0, size); - - rc = mpic_msi_reserve_dt_hwirqs(mpic); - if (rc) { + rc = msi_bitmap_reserve_dt_hwirqs(&mpic->msi_bitmap); + if (rc > 0) { if (mpic->flags & MPIC_U3_HT_IRQS) rc = mpic_msi_reserve_u3_hwirqs(mpic); - if (rc) - goto out_free; + if (rc) { + msi_bitmap_free(&mpic->msi_bitmap); + return rc; + } } return 0; - - out_free: - if (mem_init_done) - kfree(mpic->hwirq_bitmap); - - mpic->hwirq_bitmap = NULL; - return rc; } diff --git a/arch/powerpc/sysdev/mpic_pasemi_msi.c b/arch/powerpc/sysdev/mpic_pasemi_msi.c index 68aff6076675..656cb772b691 100644 --- a/arch/powerpc/sysdev/mpic_pasemi_msi.c +++ b/arch/powerpc/sysdev/mpic_pasemi_msi.c @@ -22,6 +22,7 @@ #include #include #include +#include #include "mpic.h" @@ -81,8 +82,8 @@ static void pasemi_msi_teardown_msi_irqs(struct pci_dev *pdev) continue; set_irq_msi(entry->irq, NULL); - mpic_msi_free_hwirqs(msi_mpic, virq_to_hw(entry->irq), - ALLOC_CHUNK); + msi_bitmap_free_hwirqs(&msi_mpic->msi_bitmap, + virq_to_hw(entry->irq), ALLOC_CHUNK); irq_dispose_mapping(entry->irq); } @@ -91,11 +92,10 @@ static void pasemi_msi_teardown_msi_irqs(struct pci_dev *pdev) static int pasemi_msi_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type) { - irq_hw_number_t hwirq; unsigned int virq; struct msi_desc *entry; struct msi_msg msg; - int ret; + int hwirq; pr_debug("pasemi_msi_setup_msi_irqs, pdev %p nvec %d type %d\n", pdev, nvec, type); @@ -109,17 +109,19 @@ static int pasemi_msi_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type) * few MSIs for someone, but restrictions will apply to how the * sources can be changed independently. */ - ret = mpic_msi_alloc_hwirqs(msi_mpic, ALLOC_CHUNK); - hwirq = ret; - if (ret < 0) { + hwirq = msi_bitmap_alloc_hwirqs(&msi_mpic->msi_bitmap, + ALLOC_CHUNK); + if (hwirq < 0) { pr_debug("pasemi_msi: failed allocating hwirq\n"); return hwirq; } virq = irq_create_mapping(msi_mpic->irqhost, hwirq); if (virq == NO_IRQ) { - pr_debug("pasemi_msi: failed mapping hwirq 0x%lx\n", hwirq); - mpic_msi_free_hwirqs(msi_mpic, hwirq, ALLOC_CHUNK); + pr_debug("pasemi_msi: failed mapping hwirq 0x%x\n", + hwirq); + msi_bitmap_free_hwirqs(&msi_mpic->msi_bitmap, hwirq, + ALLOC_CHUNK); return -ENOSPC; } @@ -133,8 +135,8 @@ static int pasemi_msi_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type) set_irq_chip(virq, &mpic_pasemi_msi_chip); set_irq_type(virq, IRQ_TYPE_EDGE_RISING); - pr_debug("pasemi_msi: allocated virq 0x%x (hw 0x%lx) addr 0x%x\n", - virq, hwirq, msg.address_lo); + pr_debug("pasemi_msi: allocated virq 0x%x (hw 0x%x) " \ + "addr 0x%x\n", virq, hwirq, msg.address_lo); /* Likewise, the device writes [0...511] into the target * register to generate MSI [512...1023] diff --git a/arch/powerpc/sysdev/mpic_u3msi.c b/arch/powerpc/sysdev/mpic_u3msi.c index 6e2f8686fdfc..0a8f5a9e87c9 100644 --- a/arch/powerpc/sysdev/mpic_u3msi.c +++ b/arch/powerpc/sysdev/mpic_u3msi.c @@ -16,6 +16,7 @@ #include #include #include +#include #include "mpic.h" @@ -101,7 +102,8 @@ static void u3msi_teardown_msi_irqs(struct pci_dev *pdev) continue; set_irq_msi(entry->irq, NULL); - mpic_msi_free_hwirqs(msi_mpic, virq_to_hw(entry->irq), 1); + msi_bitmap_free_hwirqs(&msi_mpic->msi_bitmap, + virq_to_hw(entry->irq), 1); irq_dispose_mapping(entry->irq); } @@ -110,29 +112,27 @@ static void u3msi_teardown_msi_irqs(struct pci_dev *pdev) static int u3msi_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type) { - irq_hw_number_t hwirq; unsigned int virq; struct msi_desc *entry; struct msi_msg msg; u64 addr; - int ret; + int hwirq; addr = find_ht_magic_addr(pdev); msg.address_lo = addr & 0xFFFFFFFF; msg.address_hi = addr >> 32; list_for_each_entry(entry, &pdev->msi_list, list) { - ret = mpic_msi_alloc_hwirqs(msi_mpic, 1); - if (ret < 0) { + hwirq = msi_bitmap_alloc_hwirqs(&msi_mpic->msi_bitmap, 1); + if (hwirq < 0) { pr_debug("u3msi: failed allocating hwirq\n"); - return ret; + return hwirq; } - hwirq = ret; virq = irq_create_mapping(msi_mpic->irqhost, hwirq); if (virq == NO_IRQ) { - pr_debug("u3msi: failed mapping hwirq 0x%lx\n", hwirq); - mpic_msi_free_hwirqs(msi_mpic, hwirq, 1); + pr_debug("u3msi: failed mapping hwirq 0x%x\n", hwirq); + msi_bitmap_free_hwirqs(&msi_mpic->msi_bitmap, hwirq, 1); return -ENOSPC; } @@ -140,8 +140,8 @@ static int u3msi_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type) set_irq_chip(virq, &mpic_u3msi_chip); set_irq_type(virq, IRQ_TYPE_EDGE_RISING); - pr_debug("u3msi: allocated virq 0x%x (hw 0x%lx) addr 0x%lx\n", - virq, hwirq, addr); + pr_debug("u3msi: allocated virq 0x%x (hw 0x%x) addr 0x%lx\n", + virq, hwirq, (unsigned long)addr); msg.data = hwirq; write_msi_msg(virq, &msg); -- cgit v1.2.3 From e30c98758453d743fab00e45da0eac6fc581958a Mon Sep 17 00:00:00 2001 From: Tirumala R Marri Date: Thu, 21 Aug 2008 18:53:34 +0000 Subject: powerpc/44x: AMCC PPC460GT/EX PCI-E de-emphasis adjustment fix During recent tests with PCI-E , it has been found the DRV + De-Emphasis values are not optimum. These new values are tested thouroughly. Signed-off-by: Tirumala R Marri Signed-off-by: Feng Kan fkan@amcc.com Acked-by: Stefan Roese Signed-off-by: Josh Boyer --- arch/powerpc/sysdev/ppc4xx_pci.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) (limited to 'arch/powerpc/sysdev') diff --git a/arch/powerpc/sysdev/ppc4xx_pci.c b/arch/powerpc/sysdev/ppc4xx_pci.c index fb368dfde5d4..d5c345dbb89d 100644 --- a/arch/powerpc/sysdev/ppc4xx_pci.c +++ b/arch/powerpc/sysdev/ppc4xx_pci.c @@ -810,7 +810,7 @@ static int ppc460ex_pciex_init_port_hw(struct ppc4xx_pciex_port *port) switch (port->index) { case 0: mtdcri(SDR0, PESDR0_460EX_L0CDRCTL, 0x00003230); - mtdcri(SDR0, PESDR0_460EX_L0DRV, 0x00000136); + mtdcri(SDR0, PESDR0_460EX_L0DRV, 0x00000130); mtdcri(SDR0, PESDR0_460EX_L0CLK, 0x00000006); mtdcri(SDR0, PESDR0_460EX_PHY_CTL_RST,0x10000000); @@ -821,10 +821,10 @@ static int ppc460ex_pciex_init_port_hw(struct ppc4xx_pciex_port *port) mtdcri(SDR0, PESDR1_460EX_L1CDRCTL, 0x00003230); mtdcri(SDR0, PESDR1_460EX_L2CDRCTL, 0x00003230); mtdcri(SDR0, PESDR1_460EX_L3CDRCTL, 0x00003230); - mtdcri(SDR0, PESDR1_460EX_L0DRV, 0x00000136); - mtdcri(SDR0, PESDR1_460EX_L1DRV, 0x00000136); - mtdcri(SDR0, PESDR1_460EX_L2DRV, 0x00000136); - mtdcri(SDR0, PESDR1_460EX_L3DRV, 0x00000136); + mtdcri(SDR0, PESDR1_460EX_L0DRV, 0x00000130); + mtdcri(SDR0, PESDR1_460EX_L1DRV, 0x00000130); + mtdcri(SDR0, PESDR1_460EX_L2DRV, 0x00000130); + mtdcri(SDR0, PESDR1_460EX_L3DRV, 0x00000130); mtdcri(SDR0, PESDR1_460EX_L0CLK, 0x00000006); mtdcri(SDR0, PESDR1_460EX_L1CLK, 0x00000006); mtdcri(SDR0, PESDR1_460EX_L2CLK, 0x00000006); -- cgit v1.2.3 From cc2e113b4bbd415d53d8bb87a446cde6b7ce8acc Mon Sep 17 00:00:00 2001 From: Ilya Yanok Date: Mon, 1 Sep 2008 17:53:22 +1000 Subject: powerpc/4xx: Necessary fixes to PCI for 4GB RAM size The declaration of total_memory removed. Now including instead. Since total_memory is a phys_addr_t which is 64-bit on 44x and is_power_of_2() works with u32 so I just inlined (size & (size-1)) != 0 instead. Also this patch fixes default initialization: res->end should be 0x7fffffff not 0x80000000. Signed-off-by: Ilya Yanok Acked-by: Stefan Roese Signed-off-by: Josh Boyer --- arch/powerpc/sysdev/ppc4xx_pci.c | 13 ++++++------- 1 file changed, 6 insertions(+), 7 deletions(-) (limited to 'arch/powerpc/sysdev') diff --git a/arch/powerpc/sysdev/ppc4xx_pci.c b/arch/powerpc/sysdev/ppc4xx_pci.c index d5c345dbb89d..5da8a44ea2f6 100644 --- a/arch/powerpc/sysdev/ppc4xx_pci.c +++ b/arch/powerpc/sysdev/ppc4xx_pci.c @@ -30,14 +30,12 @@ #include #include #include +#include #include "ppc4xx_pci.h" static int dma_offset_set; -/* Move that to a useable header */ -extern unsigned long total_memory; - #define U64_TO_U32_LOW(val) ((u32)((val) & 0x00000000ffffffffULL)) #define U64_TO_U32_HIGH(val) ((u32)((val) >> 32)) @@ -105,7 +103,8 @@ static int __init ppc4xx_parse_dma_ranges(struct pci_controller *hose, /* Default */ res->start = 0; - res->end = size = 0x80000000; + size = 0x80000000; + res->end = size - 1; res->flags = IORESOURCE_MEM | IORESOURCE_PREFETCH; /* Get dma-ranges property */ @@ -167,13 +166,13 @@ static int __init ppc4xx_parse_dma_ranges(struct pci_controller *hose, */ if (size < total_memory) { printk(KERN_ERR "%s: dma-ranges too small " - "(size=%llx total_memory=%lx)\n", - hose->dn->full_name, size, total_memory); + "(size=%llx total_memory=%llx)\n", + hose->dn->full_name, size, (u64)total_memory); return -ENXIO; } /* Check we are a power of 2 size and that base is a multiple of size*/ - if (!is_power_of_2(size) || + if ((size & (size - 1)) != 0 || (res->start & (size - 1)) != 0) { printk(KERN_ERR "%s: dma-ranges unaligned\n", hose->dn->full_name); -- cgit v1.2.3 From ac840605f3b1d9b99e1e6629a54994f8e003ff91 Mon Sep 17 00:00:00 2001 From: Lennert Buytenhek Date: Tue, 26 Aug 2008 14:06:47 +0200 Subject: mv643xx_eth: remove force_phy_addr field Currently, there are two different fields in the mv643xx_eth_platform_data struct that together describe the PHY address -- one field (phy_addr) has the address of the PHY, but if that address is zero, a second field (force_phy_addr) needs to be set to distinguish the actual address zero from a zero due to not having filled in the PHY address explicitly (which should mean 'use the default PHY address'). If we are a bit smarter about the encoding of the phy_addr field, we can avoid the need for a second field -- this patch does that. Signed-off-by: Lennert Buytenhek --- arch/arm/mach-kirkwood/db88f6281-bp-setup.c | 2 +- arch/arm/mach-kirkwood/rd88f6192-nas-setup.c | 2 +- arch/arm/mach-kirkwood/rd88f6281-setup.c | 2 +- arch/arm/mach-loki/lb88rc8480-setup.c | 2 +- arch/arm/mach-mv78xx0/db78x00-bp-setup.c | 8 ++++---- arch/arm/mach-orion5x/db88f5281-setup.c | 2 +- arch/arm/mach-orion5x/dns323-setup.c | 2 +- arch/arm/mach-orion5x/kurobox_pro-setup.c | 2 +- arch/arm/mach-orion5x/mss2-setup.c | 2 +- arch/arm/mach-orion5x/mv2120-setup.c | 2 +- arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c | 2 +- arch/arm/mach-orion5x/rd88f5181l-ge-setup.c | 2 +- arch/arm/mach-orion5x/rd88f5182-setup.c | 2 +- arch/arm/mach-orion5x/ts78xx-setup.c | 3 +-- arch/arm/mach-orion5x/tsx09-common.c | 2 +- arch/arm/mach-orion5x/wnr854t-setup.c | 2 +- arch/arm/mach-orion5x/wrt350n-v2-setup.c | 2 +- arch/powerpc/sysdev/mv64x60_dev.c | 6 ++---- drivers/net/mv643xx_eth.c | 4 ++-- include/linux/mv643xx_eth.h | 5 ++++- 20 files changed, 28 insertions(+), 28 deletions(-) (limited to 'arch/powerpc/sysdev') diff --git a/arch/arm/mach-kirkwood/db88f6281-bp-setup.c b/arch/arm/mach-kirkwood/db88f6281-bp-setup.c index 610fb24d8ae2..cd317795f355 100644 --- a/arch/arm/mach-kirkwood/db88f6281-bp-setup.c +++ b/arch/arm/mach-kirkwood/db88f6281-bp-setup.c @@ -25,7 +25,7 @@ #include "common.h" static struct mv643xx_eth_platform_data db88f6281_ge00_data = { - .phy_addr = 8, + .phy_addr = MV643XX_ETH_PHY_ADDR(8), }; static struct mv_sata_platform_data db88f6281_sata_data = { diff --git a/arch/arm/mach-kirkwood/rd88f6192-nas-setup.c b/arch/arm/mach-kirkwood/rd88f6192-nas-setup.c index a3012d445971..b1d1a87a6821 100644 --- a/arch/arm/mach-kirkwood/rd88f6192-nas-setup.c +++ b/arch/arm/mach-kirkwood/rd88f6192-nas-setup.c @@ -30,7 +30,7 @@ #define RD88F6192_GPIO_USB_VBUS 10 static struct mv643xx_eth_platform_data rd88f6192_ge00_data = { - .phy_addr = 8, + .phy_addr = MV643XX_ETH_PHY_ADDR(8), }; static struct mv_sata_platform_data rd88f6192_sata_data = { diff --git a/arch/arm/mach-kirkwood/rd88f6281-setup.c b/arch/arm/mach-kirkwood/rd88f6281-setup.c index d96487a0f18b..b6416615c0b9 100644 --- a/arch/arm/mach-kirkwood/rd88f6281-setup.c +++ b/arch/arm/mach-kirkwood/rd88f6281-setup.c @@ -69,7 +69,7 @@ static struct platform_device rd88f6281_nand_flash = { }; static struct mv643xx_eth_platform_data rd88f6281_ge00_data = { - .phy_addr = -1, + .phy_addr = MV643XX_ETH_PHY_NONE, .speed = SPEED_1000, .duplex = DUPLEX_FULL, }; diff --git a/arch/arm/mach-loki/lb88rc8480-setup.c b/arch/arm/mach-loki/lb88rc8480-setup.c index 2cc9ac9b488f..85f9c1296aa0 100644 --- a/arch/arm/mach-loki/lb88rc8480-setup.c +++ b/arch/arm/mach-loki/lb88rc8480-setup.c @@ -67,7 +67,7 @@ static struct platform_device lb88rc8480_boot_flash = { }; static struct mv643xx_eth_platform_data lb88rc8480_ge0_data = { - .phy_addr = 1, + .phy_addr = MV643XX_ETH_PHY_ADDR(1), .mac_addr = { 0x00, 0x50, 0x43, 0x11, 0x22, 0x33 }, }; diff --git a/arch/arm/mach-mv78xx0/db78x00-bp-setup.c b/arch/arm/mach-mv78xx0/db78x00-bp-setup.c index a2d0c9783604..49f434c39eb7 100644 --- a/arch/arm/mach-mv78xx0/db78x00-bp-setup.c +++ b/arch/arm/mach-mv78xx0/db78x00-bp-setup.c @@ -19,19 +19,19 @@ #include "common.h" static struct mv643xx_eth_platform_data db78x00_ge00_data = { - .phy_addr = 8, + .phy_addr = MV643XX_ETH_PHY_ADDR(8), }; static struct mv643xx_eth_platform_data db78x00_ge01_data = { - .phy_addr = 9, + .phy_addr = MV643XX_ETH_PHY_ADDR(9), }; static struct mv643xx_eth_platform_data db78x00_ge10_data = { - .phy_addr = -1, + .phy_addr = MV643XX_ETH_PHY_NONE, }; static struct mv643xx_eth_platform_data db78x00_ge11_data = { - .phy_addr = -1, + .phy_addr = MV643XX_ETH_PHY_NONE, }; static struct mv_sata_platform_data db78x00_sata_data = { diff --git a/arch/arm/mach-orion5x/db88f5281-setup.c b/arch/arm/mach-orion5x/db88f5281-setup.c index ff13e9060b18..d318bea2af91 100644 --- a/arch/arm/mach-orion5x/db88f5281-setup.c +++ b/arch/arm/mach-orion5x/db88f5281-setup.c @@ -285,7 +285,7 @@ subsys_initcall(db88f5281_pci_init); * Ethernet ****************************************************************************/ static struct mv643xx_eth_platform_data db88f5281_eth_data = { - .phy_addr = 8, + .phy_addr = MV643XX_ETH_PHY_ADDR(8), }; /***************************************************************************** diff --git a/arch/arm/mach-orion5x/dns323-setup.c b/arch/arm/mach-orion5x/dns323-setup.c index b38c65ccfb15..3e66098340a5 100644 --- a/arch/arm/mach-orion5x/dns323-setup.c +++ b/arch/arm/mach-orion5x/dns323-setup.c @@ -79,7 +79,7 @@ subsys_initcall(dns323_pci_init); */ static struct mv643xx_eth_platform_data dns323_eth_data = { - .phy_addr = 8, + .phy_addr = MV643XX_ETH_PHY_ADDR(8), }; /**************************************************************************** diff --git a/arch/arm/mach-orion5x/kurobox_pro-setup.c b/arch/arm/mach-orion5x/kurobox_pro-setup.c index e321ec331839..610f2a6297f8 100644 --- a/arch/arm/mach-orion5x/kurobox_pro-setup.c +++ b/arch/arm/mach-orion5x/kurobox_pro-setup.c @@ -161,7 +161,7 @@ subsys_initcall(kurobox_pro_pci_init); ****************************************************************************/ static struct mv643xx_eth_platform_data kurobox_pro_eth_data = { - .phy_addr = 8, + .phy_addr = MV643XX_ETH_PHY_ADDR(8), }; /***************************************************************************** diff --git a/arch/arm/mach-orion5x/mss2-setup.c b/arch/arm/mach-orion5x/mss2-setup.c index 53ff1893b883..68acca98e638 100644 --- a/arch/arm/mach-orion5x/mss2-setup.c +++ b/arch/arm/mach-orion5x/mss2-setup.c @@ -109,7 +109,7 @@ subsys_initcall(mss2_pci_init); ****************************************************************************/ static struct mv643xx_eth_platform_data mss2_eth_data = { - .phy_addr = 8, + .phy_addr = MV643XX_ETH_PHY_ADDR(8), }; /***************************************************************************** diff --git a/arch/arm/mach-orion5x/mv2120-setup.c b/arch/arm/mach-orion5x/mv2120-setup.c index 978d4d599396..97c9ccb2ac60 100644 --- a/arch/arm/mach-orion5x/mv2120-setup.c +++ b/arch/arm/mach-orion5x/mv2120-setup.c @@ -39,7 +39,7 @@ * Ethernet ****************************************************************************/ static struct mv643xx_eth_platform_data mv2120_eth_data = { - .phy_addr = 8, + .phy_addr = MV643XX_ETH_PHY_ADDR(8), }; static struct mv_sata_platform_data mv2120_sata_data = { diff --git a/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c b/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c index e72fe1e065e8..500cdadaf09c 100644 --- a/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c +++ b/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c @@ -88,7 +88,7 @@ static struct orion5x_mpp_mode rd88f5181l_fxo_mpp_modes[] __initdata = { }; static struct mv643xx_eth_platform_data rd88f5181l_fxo_eth_data = { - .phy_addr = -1, + .phy_addr = MV643XX_ETH_PHY_NONE, .speed = SPEED_1000, .duplex = DUPLEX_FULL, }; diff --git a/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c b/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c index a1fe3257320d..ebde81416499 100644 --- a/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c +++ b/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c @@ -89,7 +89,7 @@ static struct orion5x_mpp_mode rd88f5181l_ge_mpp_modes[] __initdata = { }; static struct mv643xx_eth_platform_data rd88f5181l_ge_eth_data = { - .phy_addr = -1, + .phy_addr = MV643XX_ETH_PHY_NONE, .speed = SPEED_1000, .duplex = DUPLEX_FULL, }; diff --git a/arch/arm/mach-orion5x/rd88f5182-setup.c b/arch/arm/mach-orion5x/rd88f5182-setup.c index 4c3bcd76ac85..a04f9e4b633a 100644 --- a/arch/arm/mach-orion5x/rd88f5182-setup.c +++ b/arch/arm/mach-orion5x/rd88f5182-setup.c @@ -221,7 +221,7 @@ subsys_initcall(rd88f5182_pci_init); ****************************************************************************/ static struct mv643xx_eth_platform_data rd88f5182_eth_data = { - .phy_addr = 8, + .phy_addr = MV643XX_ETH_PHY_ADDR(8), }; /***************************************************************************** diff --git a/arch/arm/mach-orion5x/ts78xx-setup.c b/arch/arm/mach-orion5x/ts78xx-setup.c index ae0a5dccd2a1..1368e9fd1a06 100644 --- a/arch/arm/mach-orion5x/ts78xx-setup.c +++ b/arch/arm/mach-orion5x/ts78xx-setup.c @@ -103,8 +103,7 @@ static struct platform_device ts78xx_nor_boot_flash = { * Ethernet ****************************************************************************/ static struct mv643xx_eth_platform_data ts78xx_eth_data = { - .phy_addr = 0, - .force_phy_addr = 1, + .phy_addr = MV643XX_ETH_PHY_ADDR(0), }; /***************************************************************************** diff --git a/arch/arm/mach-orion5x/tsx09-common.c b/arch/arm/mach-orion5x/tsx09-common.c index 83feac3147a6..19cde24fbfdf 100644 --- a/arch/arm/mach-orion5x/tsx09-common.c +++ b/arch/arm/mach-orion5x/tsx09-common.c @@ -48,7 +48,7 @@ void qnap_tsx09_power_off(void) ****************************************************************************/ struct mv643xx_eth_platform_data qnap_tsx09_eth_data = { - .phy_addr = 8, + .phy_addr = MV643XX_ETH_PHY_ADDR(8), }; static int __init qnap_tsx09_parse_hex_nibble(char n) diff --git a/arch/arm/mach-orion5x/wnr854t-setup.c b/arch/arm/mach-orion5x/wnr854t-setup.c index b6bc43e07eed..7ddc22c2bb54 100644 --- a/arch/arm/mach-orion5x/wnr854t-setup.c +++ b/arch/arm/mach-orion5x/wnr854t-setup.c @@ -92,7 +92,7 @@ static struct platform_device wnr854t_nor_flash = { }; static struct mv643xx_eth_platform_data wnr854t_eth_data = { - .phy_addr = -1, + .phy_addr = MV643XX_ETH_PHY_NONE, .speed = SPEED_1000, .duplex = DUPLEX_FULL, }; diff --git a/arch/arm/mach-orion5x/wrt350n-v2-setup.c b/arch/arm/mach-orion5x/wrt350n-v2-setup.c index b10da17b3fbd..9a4fd5256462 100644 --- a/arch/arm/mach-orion5x/wrt350n-v2-setup.c +++ b/arch/arm/mach-orion5x/wrt350n-v2-setup.c @@ -100,7 +100,7 @@ static struct platform_device wrt350n_v2_nor_flash = { }; static struct mv643xx_eth_platform_data wrt350n_v2_eth_data = { - .phy_addr = -1, + .phy_addr = MV643XX_ETH_PHY_NONE, .speed = SPEED_1000, .duplex = DUPLEX_FULL, }; diff --git a/arch/powerpc/sysdev/mv64x60_dev.c b/arch/powerpc/sysdev/mv64x60_dev.c index 32e0ad0ebea8..b6bd775d2e22 100644 --- a/arch/powerpc/sysdev/mv64x60_dev.c +++ b/arch/powerpc/sysdev/mv64x60_dev.c @@ -293,10 +293,8 @@ static int __init mv64x60_eth_device_setup(struct device_node *np, int id, return -ENODEV; prop = of_get_property(phy, "reg", NULL); - if (prop) { - pdata.force_phy_addr = 1; - pdata.phy_addr = *prop; - } + if (prop) + pdata.phy_addr = MV643XX_ETH_PHY_ADDR(*prop); of_node_put(phy); diff --git a/drivers/net/mv643xx_eth.c b/drivers/net/mv643xx_eth.c index 6d3da78b7ad5..b4850cf2a8ce 100644 --- a/drivers/net/mv643xx_eth.c +++ b/drivers/net/mv643xx_eth.c @@ -2412,10 +2412,10 @@ static void set_params(struct mv643xx_eth_private *mp, else uc_addr_get(mp, dev->dev_addr); - if (pd->phy_addr == -1) { + if (pd->phy_addr == MV643XX_ETH_PHY_NONE) { mp->phy_addr = -1; } else { - if (pd->force_phy_addr || pd->phy_addr) { + if (pd->phy_addr != MV643XX_ETH_PHY_ADDR_DEFAULT) { mp->phy_addr = pd->phy_addr & 0x3f; phy_addr_set(mp, mp->phy_addr); } else { diff --git a/include/linux/mv643xx_eth.h b/include/linux/mv643xx_eth.h index 12339eb65704..cbbbe9bfecad 100644 --- a/include/linux/mv643xx_eth.h +++ b/include/linux/mv643xx_eth.h @@ -21,6 +21,10 @@ struct mv643xx_eth_shared_platform_data { unsigned int t_clk; }; +#define MV643XX_ETH_PHY_ADDR_DEFAULT 0 +#define MV643XX_ETH_PHY_ADDR(x) (0x80 | (x)) +#define MV643XX_ETH_PHY_NONE 0xff + struct mv643xx_eth_platform_data { /* * Pointer back to our parent instance, and our port number. @@ -31,7 +35,6 @@ struct mv643xx_eth_platform_data { /* * Whether a PHY is present, and if yes, at which address. */ - int force_phy_addr; int phy_addr; /* -- cgit v1.2.3 From 8308c54d7e312f7a03e2ce2057d0837e6fe3843f Mon Sep 17 00:00:00 2001 From: Jeremy Fitzhardinge Date: Thu, 11 Sep 2008 01:31:50 -0700 Subject: generic: redefine resource_size_t as phys_addr_t There's no good reason why a resource_size_t shouldn't just be a physical address, so simply redefine it in terms of phys_addr_t. Signed-off-by: Jeremy Fitzhardinge Signed-off-by: Ingo Molnar --- arch/powerpc/platforms/Kconfig.cputype | 1 - arch/powerpc/sysdev/ppc4xx_pci.c | 16 ++++++---------- arch/x86/Kconfig | 1 - arch/x86/kernel/e820.c | 4 +--- drivers/pci/setup-bus.c | 9 ++++----- include/linux/types.h | 8 ++------ 6 files changed, 13 insertions(+), 26 deletions(-) (limited to 'arch/powerpc/sysdev') diff --git a/arch/powerpc/platforms/Kconfig.cputype b/arch/powerpc/platforms/Kconfig.cputype index 7f6512733862..be852fd407a8 100644 --- a/arch/powerpc/platforms/Kconfig.cputype +++ b/arch/powerpc/platforms/Kconfig.cputype @@ -135,7 +135,6 @@ config PTE_64BIT config PHYS_64BIT bool 'Large physical address support' if E500 depends on 44x || E500 - select RESOURCES_64BIT default y if 44x ---help--- This option enables kernel support for larger than 32-bit physical diff --git a/arch/powerpc/sysdev/ppc4xx_pci.c b/arch/powerpc/sysdev/ppc4xx_pci.c index fb368dfde5d4..e8a76d9539db 100644 --- a/arch/powerpc/sysdev/ppc4xx_pci.c +++ b/arch/powerpc/sysdev/ppc4xx_pci.c @@ -41,13 +41,10 @@ extern unsigned long total_memory; #define U64_TO_U32_LOW(val) ((u32)((val) & 0x00000000ffffffffULL)) #define U64_TO_U32_HIGH(val) ((u32)((val) >> 32)) -#ifdef CONFIG_RESOURCES_64BIT -#define RES_TO_U32_LOW(val) U64_TO_U32_LOW(val) -#define RES_TO_U32_HIGH(val) U64_TO_U32_HIGH(val) -#else -#define RES_TO_U32_LOW(val) (val) -#define RES_TO_U32_HIGH(val) (0) -#endif +#define RES_TO_U32_LOW(val) \ + ((sizeof(resource_size_t) > sizeof(u32)) ? U64_TO_U32_LOW(val) : (val)) +#define RES_TO_U32_HIGH(val) \ + ((sizeof(resource_size_t) > sizeof(u32)) ? U64_TO_U32_HIGH(val) : (0)) static inline int ppc440spe_revA(void) { @@ -145,12 +142,11 @@ static int __init ppc4xx_parse_dma_ranges(struct pci_controller *hose, /* Use that */ res->start = pci_addr; -#ifndef CONFIG_RESOURCES_64BIT /* Beware of 32 bits resources */ - if ((pci_addr + size) > 0x100000000ull) + if (sizeof(resource_size_t) == sizeof(u32) && + (pci_addr + size) > 0x100000000ull) res->end = 0xffffffff; else -#endif res->end = res->start + size - 1; break; } diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index a0ffb5188c8c..b4e1875f9861 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -925,7 +925,6 @@ config X86_PAE def_bool n prompt "PAE (Physical Address Extension) Support" depends on X86_32 && !HIGHMEM4G - select RESOURCES_64BIT help PAE is required for NX support, and furthermore enables larger swapspace support for non-overcommit purposes. It diff --git a/arch/x86/kernel/e820.c b/arch/x86/kernel/e820.c index 66e48aa2dd1b..477f4bb7e552 100644 --- a/arch/x86/kernel/e820.c +++ b/arch/x86/kernel/e820.c @@ -1276,12 +1276,10 @@ void __init e820_reserve_resources(void) res = alloc_bootmem_low(sizeof(struct resource) * e820.nr_map); for (i = 0; i < e820.nr_map; i++) { end = e820.map[i].addr + e820.map[i].size - 1; -#ifndef CONFIG_RESOURCES_64BIT - if (end > 0x100000000ULL) { + if (end != (resource_size_t)end) { res++; continue; } -#endif res->name = e820_type_to_string(e820.map[i].type); res->start = e820.map[i].addr; res->end = end; diff --git a/drivers/pci/setup-bus.c b/drivers/pci/setup-bus.c index 1aad599816f7..f250a90ee450 100644 --- a/drivers/pci/setup-bus.c +++ b/drivers/pci/setup-bus.c @@ -378,11 +378,10 @@ static int pbus_size_mem(struct pci_bus *bus, unsigned long mask, unsigned long align = 0; min_align = 0; for (order = 0; order <= max_order; order++) { -#ifdef CONFIG_RESOURCES_64BIT - resource_size_t align1 = 1ULL << (order + 20); -#else - resource_size_t align1 = 1U << (order + 20); -#endif + resource_size_t align1 = 1; + + align1 <<= (order + 20); + if (!align) min_align = align1; else if (ALIGN(align + min_align, min_align) < align1) diff --git a/include/linux/types.h b/include/linux/types.h index 022c668496da..f24f7beb47df 100644 --- a/include/linux/types.h +++ b/include/linux/types.h @@ -191,18 +191,14 @@ typedef __u32 __bitwise __wsum; #ifdef __KERNEL__ typedef unsigned __bitwise__ gfp_t; -#ifdef CONFIG_RESOURCES_64BIT -typedef u64 resource_size_t; -#else -typedef u32 resource_size_t; -#endif - #ifdef CONFIG_PHYS_ADDR_T_64BIT typedef u64 phys_addr_t; #else typedef u32 phys_addr_t; #endif +typedef phys_addr_t resource_size_t; + struct ustat { __kernel_daddr_t f_tfree; __kernel_ino_t f_tinode; -- cgit v1.2.3 From f1eaf16a9e843aa915b86594b60ec6cd66c9eac7 Mon Sep 17 00:00:00 2001 From: Jochen Friedrich Date: Wed, 27 Aug 2008 12:32:25 +0200 Subject: powerpc/cpm1: Fix race condition in CPM1 GPIO library. The CPM1 GPIO library code uses the non thread-safe clrbits32/setbits32 macros. This patch protects them with a spinlock. Based on the CPM2 patch from Laurent Pinchart , commit 639d64456e20cbfc866b18dc03cf9f9babc9c7cd. Signed-off-by: Jochen Friedrich Signed-off-by: Kumar Gala --- arch/powerpc/sysdev/cpm1.c | 74 ++++++++++++++++++++++++++++++++-------------- 1 file changed, 52 insertions(+), 22 deletions(-) (limited to 'arch/powerpc/sysdev') diff --git a/arch/powerpc/sysdev/cpm1.c b/arch/powerpc/sysdev/cpm1.c index 4a04823e8423..490473ce8103 100644 --- a/arch/powerpc/sysdev/cpm1.c +++ b/arch/powerpc/sysdev/cpm1.c @@ -546,15 +546,11 @@ static int cpm1_gpio16_get(struct gpio_chip *gc, unsigned int gpio) return !!(in_be16(&iop->dat) & pin_mask); } -static void cpm1_gpio16_set(struct gpio_chip *gc, unsigned int gpio, int value) +static void __cpm1_gpio16_set(struct of_mm_gpio_chip *mm_gc, u16 pin_mask, + int value) { - struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); struct cpm1_gpio16_chip *cpm1_gc = to_cpm1_gpio16_chip(mm_gc); struct cpm_ioport16 __iomem *iop = mm_gc->regs; - unsigned long flags; - u16 pin_mask = 1 << (15 - gpio); - - spin_lock_irqsave(&cpm1_gc->lock, flags); if (value) cpm1_gc->cpdata |= pin_mask; @@ -562,6 +558,18 @@ static void cpm1_gpio16_set(struct gpio_chip *gc, unsigned int gpio, int value) cpm1_gc->cpdata &= ~pin_mask; out_be16(&iop->dat, cpm1_gc->cpdata); +} + +static void cpm1_gpio16_set(struct gpio_chip *gc, unsigned int gpio, int value) +{ + struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); + struct cpm1_gpio16_chip *cpm1_gc = to_cpm1_gpio16_chip(mm_gc); + unsigned long flags; + u16 pin_mask = 1 << (15 - gpio); + + spin_lock_irqsave(&cpm1_gc->lock, flags); + + __cpm1_gpio16_set(mm_gc, pin_mask, value); spin_unlock_irqrestore(&cpm1_gc->lock, flags); } @@ -569,14 +577,17 @@ static void cpm1_gpio16_set(struct gpio_chip *gc, unsigned int gpio, int value) static int cpm1_gpio16_dir_out(struct gpio_chip *gc, unsigned int gpio, int val) { struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); + struct cpm1_gpio16_chip *cpm1_gc = to_cpm1_gpio16_chip(mm_gc); struct cpm_ioport16 __iomem *iop = mm_gc->regs; - u16 pin_mask; + unsigned long flags; + u16 pin_mask = 1 << (15 - gpio); - pin_mask = 1 << (15 - gpio); + spin_lock_irqsave(&cpm1_gc->lock, flags); setbits16(&iop->dir, pin_mask); + __cpm1_gpio16_set(mm_gc, pin_mask, val); - cpm1_gpio16_set(gc, gpio, val); + spin_unlock_irqrestore(&cpm1_gc->lock, flags); return 0; } @@ -584,13 +595,17 @@ static int cpm1_gpio16_dir_out(struct gpio_chip *gc, unsigned int gpio, int val) static int cpm1_gpio16_dir_in(struct gpio_chip *gc, unsigned int gpio) { struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); + struct cpm1_gpio16_chip *cpm1_gc = to_cpm1_gpio16_chip(mm_gc); struct cpm_ioport16 __iomem *iop = mm_gc->regs; - u16 pin_mask; + unsigned long flags; + u16 pin_mask = 1 << (15 - gpio); - pin_mask = 1 << (15 - gpio); + spin_lock_irqsave(&cpm1_gc->lock, flags); clrbits16(&iop->dir, pin_mask); + spin_unlock_irqrestore(&cpm1_gc->lock, flags); + return 0; } @@ -655,15 +670,11 @@ static int cpm1_gpio32_get(struct gpio_chip *gc, unsigned int gpio) return !!(in_be32(&iop->dat) & pin_mask); } -static void cpm1_gpio32_set(struct gpio_chip *gc, unsigned int gpio, int value) +static void __cpm1_gpio32_set(struct of_mm_gpio_chip *mm_gc, u32 pin_mask, + int value) { - struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); struct cpm1_gpio32_chip *cpm1_gc = to_cpm1_gpio32_chip(mm_gc); struct cpm_ioport32b __iomem *iop = mm_gc->regs; - unsigned long flags; - u32 pin_mask = 1 << (31 - gpio); - - spin_lock_irqsave(&cpm1_gc->lock, flags); if (value) cpm1_gc->cpdata |= pin_mask; @@ -671,6 +682,18 @@ static void cpm1_gpio32_set(struct gpio_chip *gc, unsigned int gpio, int value) cpm1_gc->cpdata &= ~pin_mask; out_be32(&iop->dat, cpm1_gc->cpdata); +} + +static void cpm1_gpio32_set(struct gpio_chip *gc, unsigned int gpio, int value) +{ + struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); + struct cpm1_gpio32_chip *cpm1_gc = to_cpm1_gpio32_chip(mm_gc); + unsigned long flags; + u32 pin_mask = 1 << (31 - gpio); + + spin_lock_irqsave(&cpm1_gc->lock, flags); + + __cpm1_gpio32_set(mm_gc, pin_mask, value); spin_unlock_irqrestore(&cpm1_gc->lock, flags); } @@ -678,14 +701,17 @@ static void cpm1_gpio32_set(struct gpio_chip *gc, unsigned int gpio, int value) static int cpm1_gpio32_dir_out(struct gpio_chip *gc, unsigned int gpio, int val) { struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); + struct cpm1_gpio32_chip *cpm1_gc = to_cpm1_gpio32_chip(mm_gc); struct cpm_ioport32b __iomem *iop = mm_gc->regs; - u32 pin_mask; + unsigned long flags; + u32 pin_mask = 1 << (31 - gpio); - pin_mask = 1 << (31 - gpio); + spin_lock_irqsave(&cpm1_gc->lock, flags); setbits32(&iop->dir, pin_mask); + __cpm1_gpio32_set(mm_gc, pin_mask, val); - cpm1_gpio32_set(gc, gpio, val); + spin_unlock_irqrestore(&cpm1_gc->lock, flags); return 0; } @@ -693,13 +719,17 @@ static int cpm1_gpio32_dir_out(struct gpio_chip *gc, unsigned int gpio, int val) static int cpm1_gpio32_dir_in(struct gpio_chip *gc, unsigned int gpio) { struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); + struct cpm1_gpio32_chip *cpm1_gc = to_cpm1_gpio32_chip(mm_gc); struct cpm_ioport32b __iomem *iop = mm_gc->regs; - u32 pin_mask; + unsigned long flags; + u32 pin_mask = 1 << (31 - gpio); - pin_mask = 1 << (31 - gpio); + spin_lock_irqsave(&cpm1_gc->lock, flags); clrbits32(&iop->dir, pin_mask); + spin_unlock_irqrestore(&cpm1_gc->lock, flags); + return 0; } -- cgit v1.2.3 From 1e16dfc1baa745dd89b95f6e33e4142df6218066 Mon Sep 17 00:00:00 2001 From: Peter Korsgaard Date: Tue, 23 Sep 2008 17:35:38 +0200 Subject: powerpc: gpio driver for mpc8349/8572/8610 and compatible Structured similar to the existing QE GPIO support. Signed-off-by: Peter Korsgaard Acked-by: Anton Vorontsov Signed-off-by: Kumar Gala --- .../powerpc/dts-bindings/fsl/8xxx_gpio.txt | 40 +++++ arch/powerpc/sysdev/Kconfig | 9 ++ arch/powerpc/sysdev/Makefile | 1 + arch/powerpc/sysdev/mpc8xxx_gpio.c | 171 +++++++++++++++++++++ 4 files changed, 221 insertions(+) create mode 100644 Documentation/powerpc/dts-bindings/fsl/8xxx_gpio.txt create mode 100644 arch/powerpc/sysdev/mpc8xxx_gpio.c (limited to 'arch/powerpc/sysdev') diff --git a/Documentation/powerpc/dts-bindings/fsl/8xxx_gpio.txt b/Documentation/powerpc/dts-bindings/fsl/8xxx_gpio.txt new file mode 100644 index 000000000000..d015dcec4011 --- /dev/null +++ b/Documentation/powerpc/dts-bindings/fsl/8xxx_gpio.txt @@ -0,0 +1,40 @@ +GPIO controllers on MPC8xxx SoCs + +This is for the non-QE/CPM/GUTs GPIO controllers as found on +8349, 8572, 8610 and compatible. + +Every GPIO controller node must have #gpio-cells property defined, +this information will be used to translate gpio-specifiers. + +Required properties: +- compatible : "fsl,-gpio" followed by "fsl,mpc8349-gpio" for + 83xx, "fsl,mpc8572-gpio" for 85xx and "fsl,mpc8610-gpio" for 86xx. +- #gpio-cells : Should be two. The first cell is the pin number and the + second cell is used to specify optional parameters (currently unused). + - interrupts : Interrupt mapping for GPIO IRQ (currently unused). + - interrupt-parent : Phandle for the interrupt controller that + services interrupts for this device. +- gpio-controller : Marks the port as GPIO controller. + +Example of gpio-controller nodes for a MPC8347 SoC: + + gpio1: gpio-controller@c00 { + #gpio-cells = <2>; + compatible = "fsl,mpc8347-gpio", "fsl,mpc8349-gpio"; + reg = <0xc00 0x100>; + interrupts = <74 0x8>; + interrupt-parent = <&ipic>; + gpio-controller; + }; + + gpio2: gpio-controller@d00 { + #gpio-cells = <2>; + compatible = "fsl,mpc8347-gpio", "fsl,mpc8349-gpio"; + reg = <0xd00 0x100>; + interrupts = <75 0x8>; + interrupt-parent = <&ipic>; + gpio-controller; + }; + +See booting-without-of.txt for details of how to specify GPIO +information for devices. diff --git a/arch/powerpc/sysdev/Kconfig b/arch/powerpc/sysdev/Kconfig index 396582835cb5..d0e7bb05c3a4 100644 --- a/arch/powerpc/sysdev/Kconfig +++ b/arch/powerpc/sysdev/Kconfig @@ -7,6 +7,15 @@ config PPC4xx_PCI_EXPRESS depends on PCI && 4xx default n +config MPC8xxx_GPIO + bool "MPC8xxx GPIO support" + depends on PPC_MPC831x || PPC_MPC834x || PPC_MPC837x || PPC_85xx || PPC_86xx + select GENERIC_GPIO + select ARCH_REQUIRE_GPIOLIB + help + Say Y here if you're going to use hardware that connects to the + MPC831x/834x/837x/8572/8610 GPIOs. + config PPC_MSI_BITMAP bool depends on PCI_MSI diff --git a/arch/powerpc/sysdev/Makefile b/arch/powerpc/sysdev/Makefile index b6c269eb2650..55618ba9eff0 100644 --- a/arch/powerpc/sysdev/Makefile +++ b/arch/powerpc/sysdev/Makefile @@ -16,6 +16,7 @@ obj-$(CONFIG_FSL_SOC) += fsl_soc.o obj-$(CONFIG_FSL_PCI) += fsl_pci.o $(fsl-msi-obj-y) obj-$(CONFIG_FSL_LBC) += fsl_lbc.o obj-$(CONFIG_FSL_GTM) += fsl_gtm.o +obj-$(CONFIG_MPC8xxx_GPIO) += mpc8xxx_gpio.o obj-$(CONFIG_RAPIDIO) += fsl_rio.o obj-$(CONFIG_TSI108_BRIDGE) += tsi108_pci.o tsi108_dev.o obj-$(CONFIG_QUICC_ENGINE) += qe_lib/ diff --git a/arch/powerpc/sysdev/mpc8xxx_gpio.c b/arch/powerpc/sysdev/mpc8xxx_gpio.c new file mode 100644 index 000000000000..103eace36194 --- /dev/null +++ b/arch/powerpc/sysdev/mpc8xxx_gpio.c @@ -0,0 +1,171 @@ +/* + * GPIOs on MPC8349/8572/8610 and compatible + * + * Copyright (C) 2008 Peter Korsgaard + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +#include +#include +#include +#include +#include +#include +#include + +#define MPC8XXX_GPIO_PINS 32 + +#define GPIO_DIR 0x00 +#define GPIO_ODR 0x04 +#define GPIO_DAT 0x08 +#define GPIO_IER 0x0c +#define GPIO_IMR 0x10 +#define GPIO_ICR 0x14 + +struct mpc8xxx_gpio_chip { + struct of_mm_gpio_chip mm_gc; + spinlock_t lock; + + /* + * shadowed data register to be able to clear/set output pins in + * open drain mode safely + */ + u32 data; +}; + +static inline u32 mpc8xxx_gpio2mask(unsigned int gpio) +{ + return 1u << (MPC8XXX_GPIO_PINS - 1 - gpio); +} + +static inline struct mpc8xxx_gpio_chip * +to_mpc8xxx_gpio_chip(struct of_mm_gpio_chip *mm) +{ + return container_of(mm, struct mpc8xxx_gpio_chip, mm_gc); +} + +static void mpc8xxx_gpio_save_regs(struct of_mm_gpio_chip *mm) +{ + struct mpc8xxx_gpio_chip *mpc8xxx_gc = to_mpc8xxx_gpio_chip(mm); + + mpc8xxx_gc->data = in_be32(mm->regs + GPIO_DAT); +} + +static int mpc8xxx_gpio_get(struct gpio_chip *gc, unsigned int gpio) +{ + struct of_mm_gpio_chip *mm = to_of_mm_gpio_chip(gc); + + return in_be32(mm->regs + GPIO_DAT) & mpc8xxx_gpio2mask(gpio); +} + +static void mpc8xxx_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val) +{ + struct of_mm_gpio_chip *mm = to_of_mm_gpio_chip(gc); + struct mpc8xxx_gpio_chip *mpc8xxx_gc = to_mpc8xxx_gpio_chip(mm); + unsigned long flags; + + spin_lock_irqsave(&mpc8xxx_gc->lock, flags); + + if (val) + mpc8xxx_gc->data |= mpc8xxx_gpio2mask(gpio); + else + mpc8xxx_gc->data &= ~mpc8xxx_gpio2mask(gpio); + + out_be32(mm->regs + GPIO_DAT, mpc8xxx_gc->data); + + spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags); +} + +static int mpc8xxx_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio) +{ + struct of_mm_gpio_chip *mm = to_of_mm_gpio_chip(gc); + struct mpc8xxx_gpio_chip *mpc8xxx_gc = to_mpc8xxx_gpio_chip(mm); + unsigned long flags; + + spin_lock_irqsave(&mpc8xxx_gc->lock, flags); + + clrbits32(mm->regs + GPIO_DIR, mpc8xxx_gpio2mask(gpio)); + + spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags); + + return 0; +} + +static int mpc8xxx_gpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val) +{ + struct of_mm_gpio_chip *mm = to_of_mm_gpio_chip(gc); + struct mpc8xxx_gpio_chip *mpc8xxx_gc = to_mpc8xxx_gpio_chip(mm); + unsigned long flags; + + mpc8xxx_gpio_set(gc, gpio, val); + + spin_lock_irqsave(&mpc8xxx_gc->lock, flags); + + setbits32(mm->regs + GPIO_DIR, mpc8xxx_gpio2mask(gpio)); + + spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags); + + return 0; +} + +static void __init mpc8xxx_add_controller(struct device_node *np) +{ + struct mpc8xxx_gpio_chip *mpc8xxx_gc; + struct of_mm_gpio_chip *mm_gc; + struct of_gpio_chip *of_gc; + struct gpio_chip *gc; + int ret; + + mpc8xxx_gc = kzalloc(sizeof(*mpc8xxx_gc), GFP_KERNEL); + if (!mpc8xxx_gc) { + ret = -ENOMEM; + goto err; + } + + spin_lock_init(&mpc8xxx_gc->lock); + + mm_gc = &mpc8xxx_gc->mm_gc; + of_gc = &mm_gc->of_gc; + gc = &of_gc->gc; + + mm_gc->save_regs = mpc8xxx_gpio_save_regs; + of_gc->gpio_cells = 2; + gc->ngpio = MPC8XXX_GPIO_PINS; + gc->direction_input = mpc8xxx_gpio_dir_in; + gc->direction_output = mpc8xxx_gpio_dir_out; + gc->get = mpc8xxx_gpio_get; + gc->set = mpc8xxx_gpio_set; + + ret = of_mm_gpiochip_add(np, mm_gc); + if (ret) + goto err; + + return; + +err: + pr_err("%s: registration failed with status %d\n", + np->full_name, ret); + kfree(mpc8xxx_gc); + + return; +} + +static int __init mpc8xxx_add_gpiochips(void) +{ + struct device_node *np; + + for_each_compatible_node(np, NULL, "fsl,mpc8349-gpio") + mpc8xxx_add_controller(np); + + for_each_compatible_node(np, NULL, "fsl,mpc8572-gpio") + mpc8xxx_add_controller(np); + + for_each_compatible_node(np, NULL, "fsl,mpc8610-gpio") + mpc8xxx_add_controller(np); + + return 0; +} +arch_initcall(mpc8xxx_add_gpiochips); -- cgit v1.2.3 From 782f04fc0c2af3c1e92c9d561926a2056b1c72e8 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Tue, 23 Sep 2008 23:36:32 -0500 Subject: powerpc: Move 8xxx GPIO Kconfig under the platform menu The initial patch had the option at the top level which wasn't quite right. Moving under the platform options is a bit better. Signed-off-by: Kumar Gala --- arch/powerpc/platforms/Kconfig | 9 +++++++++ arch/powerpc/sysdev/Kconfig | 9 --------- 2 files changed, 9 insertions(+), 9 deletions(-) (limited to 'arch/powerpc/sysdev') diff --git a/arch/powerpc/platforms/Kconfig b/arch/powerpc/platforms/Kconfig index 4c900efa164e..9578c45b04fe 100644 --- a/arch/powerpc/platforms/Kconfig +++ b/arch/powerpc/platforms/Kconfig @@ -293,4 +293,13 @@ config OF_RTC source "arch/powerpc/sysdev/bestcomm/Kconfig" +config MPC8xxx_GPIO + bool "MPC8xxx GPIO support" + depends on PPC_MPC831x || PPC_MPC834x || PPC_MPC837x || PPC_85xx || PPC_86xx + select GENERIC_GPIO + select ARCH_REQUIRE_GPIOLIB + help + Say Y here if you're going to use hardware that connects to the + MPC831x/834x/837x/8572/8610 GPIOs. + endmenu diff --git a/arch/powerpc/sysdev/Kconfig b/arch/powerpc/sysdev/Kconfig index d0e7bb05c3a4..396582835cb5 100644 --- a/arch/powerpc/sysdev/Kconfig +++ b/arch/powerpc/sysdev/Kconfig @@ -7,15 +7,6 @@ config PPC4xx_PCI_EXPRESS depends on PCI && 4xx default n -config MPC8xxx_GPIO - bool "MPC8xxx GPIO support" - depends on PPC_MPC831x || PPC_MPC834x || PPC_MPC837x || PPC_85xx || PPC_86xx - select GENERIC_GPIO - select ARCH_REQUIRE_GPIOLIB - help - Say Y here if you're going to use hardware that connects to the - MPC831x/834x/837x/8572/8610 GPIOs. - config PPC_MSI_BITMAP bool depends on PCI_MSI -- cgit v1.2.3 From 20d38e01d48019c578ab0ec1464454c03003b300 Mon Sep 17 00:00:00 2001 From: Anton Vorontsov Date: Mon, 29 Sep 2008 17:56:03 +0400 Subject: powerpc/fsl_soc: remove mpc83xx_wdt code mpc83xx_wdt is the OF driver now, so we don't need fsl_soc constructor. Signed-off-by: Anton Vorontsov Signed-off-by: Kumar Gala --- arch/powerpc/sysdev/fsl_soc.c | 47 ------------------------------------------- 1 file changed, 47 deletions(-) (limited to 'arch/powerpc/sysdev') diff --git a/arch/powerpc/sysdev/fsl_soc.c b/arch/powerpc/sysdev/fsl_soc.c index 214388e11807..eeb07007c753 100644 --- a/arch/powerpc/sysdev/fsl_soc.c +++ b/arch/powerpc/sysdev/fsl_soc.c @@ -412,53 +412,6 @@ err: arch_initcall(gfar_of_init); - -#ifdef CONFIG_PPC_83xx -static int __init mpc83xx_wdt_init(void) -{ - struct resource r; - struct device_node *np; - struct platform_device *dev; - u32 freq = fsl_get_sys_freq(); - int ret; - - np = of_find_compatible_node(NULL, "watchdog", "mpc83xx_wdt"); - - if (!np) { - ret = -ENODEV; - goto nodev; - } - - memset(&r, 0, sizeof(r)); - - ret = of_address_to_resource(np, 0, &r); - if (ret) - goto err; - - dev = platform_device_register_simple("mpc83xx_wdt", 0, &r, 1); - if (IS_ERR(dev)) { - ret = PTR_ERR(dev); - goto err; - } - - ret = platform_device_add_data(dev, &freq, sizeof(freq)); - if (ret) - goto unreg; - - of_node_put(np); - return 0; - -unreg: - platform_device_unregister(dev); -err: - of_node_put(np); -nodev: - return ret; -} - -arch_initcall(mpc83xx_wdt_init); -#endif - static enum fsl_usb2_phy_modes determine_usb_phy(const char *phy_type) { if (!phy_type) -- cgit v1.2.3 From 5a013fc7bb48acefe94011f4b83fef95b381f875 Mon Sep 17 00:00:00 2001 From: Matthias Fuchs Date: Wed, 10 Sep 2008 05:55:46 +0000 Subject: powerpc/4xx: Allow 4xx PCI bridge to be disabled via device tree This patch allows the 4xx (conventional) PCI bridge to be disabled via the device tree. This is needed for 4xx PCI adapter hardware. Use the PCI node's status property to disable the PCI bridge. Signed-off-by: Matthias Fuchs Acked-by: Stefan Roese Signed-off-by: Josh Boyer --- arch/powerpc/sysdev/ppc4xx_pci.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) (limited to 'arch/powerpc/sysdev') diff --git a/arch/powerpc/sysdev/ppc4xx_pci.c b/arch/powerpc/sysdev/ppc4xx_pci.c index 5da8a44ea2f6..9f6f73d584d6 100644 --- a/arch/powerpc/sysdev/ppc4xx_pci.c +++ b/arch/powerpc/sysdev/ppc4xx_pci.c @@ -276,9 +276,16 @@ static void __init ppc4xx_probe_pci_bridge(struct device_node *np) const int *bus_range; int primary = 0; + /* Check if device is enabled */ + if (!of_device_is_available(np)) { + printk(KERN_INFO "%s: Port disabled via device-tree\n", + np->full_name); + return; + } + /* Fetch config space registers address */ if (of_address_to_resource(np, 0, &rsrc_cfg)) { - printk(KERN_ERR "%s:Can't get PCI config register base !", + printk(KERN_ERR "%s: Can't get PCI config register base !", np->full_name); return; } -- cgit v1.2.3 From 6070bf6afe4c4232ec1e04fa16c056758b2e681b Mon Sep 17 00:00:00 2001 From: Josh Boyer Date: Fri, 10 Oct 2008 08:53:21 +0000 Subject: powerpc: Remove old Makefile workaround for arch/ppc There is an old workaround in the sysdev/Makefile for dealing with arch/ppc vs. arch/powerpc compiles. This is no longer needed as arch/ppc is dead. Signed-off-by: Josh Boyer Acked-by: Kumar Gala Signed-off-by: Benjamin Herrenschmidt --- arch/powerpc/sysdev/Makefile | 3 --- 1 file changed, 3 deletions(-) (limited to 'arch/powerpc/sysdev') diff --git a/arch/powerpc/sysdev/Makefile b/arch/powerpc/sysdev/Makefile index 55618ba9eff0..a44709a94f97 100644 --- a/arch/powerpc/sysdev/Makefile +++ b/arch/powerpc/sysdev/Makefile @@ -38,15 +38,12 @@ ifeq ($(CONFIG_PCI),y) obj-$(CONFIG_4xx) += ppc4xx_pci.o endif -# Temporary hack until we have migrated to asm-powerpc -ifeq ($(ARCH),powerpc) obj-$(CONFIG_CPM) += cpm_common.o obj-$(CONFIG_CPM2) += cpm2.o cpm2_pic.o obj-$(CONFIG_QUICC_ENGINE) += cpm_common.o obj-$(CONFIG_PPC_DCR) += dcr.o obj-$(CONFIG_8xx) += mpc8xx_pic.o cpm1.o obj-$(CONFIG_UCODE_PATCH) += micropatch.o -endif ifeq ($(CONFIG_SUSPEND),y) obj-$(CONFIG_6xx) += 6xx-suspend.o -- cgit v1.2.3 From 5c091193e4a12e88930a0bb3ed3632c51e926a76 Mon Sep 17 00:00:00 2001 From: Anton Vorontsov Date: Fri, 3 Oct 2008 23:40:36 +0400 Subject: powerpc/QE: move QE_GPIO Kconfig symbol into the platforms/Kconfig Specifying user-selectable option in the qe_lib/Kconfig was a bad idea because the qe_lib/Kconfig is included into the top level Kconfig, and thus the QE_GPIO option appears at the top level menu. This patch effectively moves the QE_GPIO option under the platform menu instead. Signed-off-by: Anton Vorontsov Signed-off-by: Kumar Gala --- arch/powerpc/platforms/Kconfig | 9 +++++++++ arch/powerpc/sysdev/qe_lib/Kconfig | 9 --------- 2 files changed, 9 insertions(+), 9 deletions(-) (limited to 'arch/powerpc/sysdev') diff --git a/arch/powerpc/platforms/Kconfig b/arch/powerpc/platforms/Kconfig index 6cf517f5fba6..47e956c871fe 100644 --- a/arch/powerpc/platforms/Kconfig +++ b/arch/powerpc/platforms/Kconfig @@ -249,6 +249,15 @@ config QUICC_ENGINE Selecting this option means that you wish to build a kernel for a machine with a QE coprocessor. +config QE_GPIO + bool "QE GPIO support" + depends on QUICC_ENGINE + select GENERIC_GPIO + select ARCH_REQUIRE_GPIOLIB + help + Say Y here if you're going to use hardware that connects to the + QE GPIOs. + config CPM2 bool "Enable support for the CPM2 (Communications Processor Module)" depends on MPC85xx || 8260 diff --git a/arch/powerpc/sysdev/qe_lib/Kconfig b/arch/powerpc/sysdev/qe_lib/Kconfig index 1ce546462be5..76ffbc48d4b9 100644 --- a/arch/powerpc/sysdev/qe_lib/Kconfig +++ b/arch/powerpc/sysdev/qe_lib/Kconfig @@ -24,12 +24,3 @@ config QE_USB bool help QE USB Host Controller support - -config QE_GPIO - bool "QE GPIO support" - depends on QUICC_ENGINE - select GENERIC_GPIO - select ARCH_REQUIRE_GPIOLIB - help - Say Y here if you're going to use hardware that connects to the - QE GPIOs. -- cgit v1.2.3 From 5b70a097052fff3831d8b94541452e7c29426777 Mon Sep 17 00:00:00 2001 From: John Rigby Date: Tue, 7 Oct 2008 13:00:18 -0600 Subject: powerpc: 83xx: pci: Remove need for get_immrbase from mpc83xx_add_bridge. Modify mpc83xx_add_bridge to get config space register base address from the device tree instead of immr + hardcoded offset. 83xx pci nodes have this change: register properties now contain two address length tuples: First is the pci bridge register base, this has always been there. Second is the config base, this is new. This is documented in dts-bindings/fsl/83xx-512x-pci.txt The changes accomplish these things: mpc83xx_add_bridge no longer needs to call get_immrbase it uses hard coded addresses if the second register value is missing Signed-off-by: John Rigby Signed-off-by: Kumar Gala --- .../powerpc/dts-bindings/fsl/83xx-512x-pci.txt | 40 ++++++++++++++++ arch/powerpc/boot/dts/mpc8313erdb.dts | 3 +- arch/powerpc/boot/dts/mpc8315erdb.dts | 3 +- arch/powerpc/boot/dts/mpc832x_mds.dts | 3 +- arch/powerpc/boot/dts/mpc832x_rdb.dts | 3 +- arch/powerpc/boot/dts/mpc8349emitx.dts | 6 ++- arch/powerpc/boot/dts/mpc8349emitxgp.dts | 3 +- arch/powerpc/boot/dts/mpc834x_mds.dts | 6 ++- arch/powerpc/boot/dts/mpc836x_mds.dts | 3 +- arch/powerpc/boot/dts/mpc836x_rdk.dts | 3 +- arch/powerpc/boot/dts/mpc8377_mds.dts | 3 +- arch/powerpc/boot/dts/mpc8377_rdb.dts | 3 +- arch/powerpc/boot/dts/mpc8378_mds.dts | 3 +- arch/powerpc/boot/dts/mpc8378_rdb.dts | 3 +- arch/powerpc/boot/dts/mpc8379_mds.dts | 3 +- arch/powerpc/boot/dts/mpc8379_rdb.dts | 3 +- arch/powerpc/boot/dts/sbc8349.dts | 3 +- arch/powerpc/sysdev/fsl_pci.c | 54 ++++++++++++++-------- 18 files changed, 111 insertions(+), 37 deletions(-) create mode 100644 Documentation/powerpc/dts-bindings/fsl/83xx-512x-pci.txt (limited to 'arch/powerpc/sysdev') diff --git a/Documentation/powerpc/dts-bindings/fsl/83xx-512x-pci.txt b/Documentation/powerpc/dts-bindings/fsl/83xx-512x-pci.txt new file mode 100644 index 000000000000..35a465362408 --- /dev/null +++ b/Documentation/powerpc/dts-bindings/fsl/83xx-512x-pci.txt @@ -0,0 +1,40 @@ +* Freescale 83xx and 512x PCI bridges + +Freescale 83xx and 512x SOCs include the same pci bridge core. + +83xx/512x specific notes: +- reg: should contain two address length tuples + The first is for the internal pci bridge registers + The second is for the pci config space access registers + +Example (MPC8313ERDB) + pci0: pci@e0008500 { + cell-index = <1>; + interrupt-map-mask = <0xf800 0x0 0x0 0x7>; + interrupt-map = < + /* IDSEL 0x0E -mini PCI */ + 0x7000 0x0 0x0 0x1 &ipic 18 0x8 + 0x7000 0x0 0x0 0x2 &ipic 18 0x8 + 0x7000 0x0 0x0 0x3 &ipic 18 0x8 + 0x7000 0x0 0x0 0x4 &ipic 18 0x8 + + /* IDSEL 0x0F - PCI slot */ + 0x7800 0x0 0x0 0x1 &ipic 17 0x8 + 0x7800 0x0 0x0 0x2 &ipic 18 0x8 + 0x7800 0x0 0x0 0x3 &ipic 17 0x8 + 0x7800 0x0 0x0 0x4 &ipic 18 0x8>; + interrupt-parent = <&ipic>; + interrupts = <66 0x8>; + bus-range = <0x0 0x0>; + ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000 + 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 + 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>; + clock-frequency = <66666666>; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + reg = <0xe0008500 0x100 /* internal registers */ + 0xe0008300 0x8>; /* config space access registers */ + compatible = "fsl,mpc8349-pci"; + device_type = "pci"; + }; diff --git a/arch/powerpc/boot/dts/mpc8313erdb.dts b/arch/powerpc/boot/dts/mpc8313erdb.dts index 539085591e04..747f27676332 100644 --- a/arch/powerpc/boot/dts/mpc8313erdb.dts +++ b/arch/powerpc/boot/dts/mpc8313erdb.dts @@ -363,7 +363,8 @@ #interrupt-cells = <1>; #size-cells = <2>; #address-cells = <3>; - reg = <0xe0008500 0x100>; + reg = <0xe0008500 0x100 /* internal registers */ + 0xe0008300 0x8>; /* config space access registers */ compatible = "fsl,mpc8349-pci"; device_type = "pci"; }; diff --git a/arch/powerpc/boot/dts/mpc8315erdb.dts b/arch/powerpc/boot/dts/mpc8315erdb.dts index 94c9b4107a1d..7449e54c1a90 100644 --- a/arch/powerpc/boot/dts/mpc8315erdb.dts +++ b/arch/powerpc/boot/dts/mpc8315erdb.dts @@ -318,7 +318,8 @@ #interrupt-cells = <1>; #size-cells = <2>; #address-cells = <3>; - reg = <0xe0008500 0x100>; + reg = <0xe0008500 0x100 /* internal registers */ + 0xe0008300 0x8>; /* config space access registers */ compatible = "fsl,mpc8349-pci"; device_type = "pci"; }; diff --git a/arch/powerpc/boot/dts/mpc832x_mds.dts b/arch/powerpc/boot/dts/mpc832x_mds.dts index 015808ae1026..e4cc1768f241 100644 --- a/arch/powerpc/boot/dts/mpc832x_mds.dts +++ b/arch/powerpc/boot/dts/mpc832x_mds.dts @@ -423,7 +423,8 @@ #interrupt-cells = <1>; #size-cells = <2>; #address-cells = <3>; - reg = <0xe0008500 0x100>; + reg = <0xe0008500 0x100 /* internal registers */ + 0xe0008300 0x8>; /* config space access registers */ compatible = "fsl,mpc8349-pci"; device_type = "pci"; }; diff --git a/arch/powerpc/boot/dts/mpc832x_rdb.dts b/arch/powerpc/boot/dts/mpc832x_rdb.dts index b5b0ec2eb88f..226ff066652b 100644 --- a/arch/powerpc/boot/dts/mpc832x_rdb.dts +++ b/arch/powerpc/boot/dts/mpc832x_rdb.dts @@ -331,7 +331,8 @@ #interrupt-cells = <1>; #size-cells = <2>; #address-cells = <3>; - reg = <0xe0008500 0x100>; + reg = <0xe0008500 0x100 /* internal registers */ + 0xe0008300 0x8>; /* config space access registers */ compatible = "fsl,mpc8349-pci"; device_type = "pci"; }; diff --git a/arch/powerpc/boot/dts/mpc8349emitx.dts b/arch/powerpc/boot/dts/mpc8349emitx.dts index 1327a61d0538..5cedf373a1d8 100644 --- a/arch/powerpc/boot/dts/mpc8349emitx.dts +++ b/arch/powerpc/boot/dts/mpc8349emitx.dts @@ -254,7 +254,8 @@ #interrupt-cells = <1>; #size-cells = <2>; #address-cells = <3>; - reg = <0xe0008500 0x100>; + reg = <0xe0008500 0x100 /* internal registers */ + 0xe0008300 0x8>; /* config space access registers */ compatible = "fsl,mpc8349-pci"; device_type = "pci"; }; @@ -280,7 +281,8 @@ #interrupt-cells = <1>; #size-cells = <2>; #address-cells = <3>; - reg = <0xe0008600 0x100>; + reg = <0xe0008600 0x100 /* internal registers */ + 0xe0008380 0x8>; /* config space access registers */ compatible = "fsl,mpc8349-pci"; device_type = "pci"; }; diff --git a/arch/powerpc/boot/dts/mpc8349emitxgp.dts b/arch/powerpc/boot/dts/mpc8349emitxgp.dts index f70d3a0a6eb9..81ae1d3e9440 100644 --- a/arch/powerpc/boot/dts/mpc8349emitxgp.dts +++ b/arch/powerpc/boot/dts/mpc8349emitxgp.dts @@ -228,7 +228,8 @@ #interrupt-cells = <1>; #size-cells = <2>; #address-cells = <3>; - reg = <0xe0008600 0x100>; + reg = <0xe0008600 0x100 /* internal registers */ + 0xe0008380 0x8>; /* config space access registers */ compatible = "fsl,mpc8349-pci"; device_type = "pci"; }; diff --git a/arch/powerpc/boot/dts/mpc834x_mds.dts b/arch/powerpc/boot/dts/mpc834x_mds.dts index e29739eee35e..04bfde3ea605 100644 --- a/arch/powerpc/boot/dts/mpc834x_mds.dts +++ b/arch/powerpc/boot/dts/mpc834x_mds.dts @@ -315,7 +315,8 @@ #interrupt-cells = <1>; #size-cells = <2>; #address-cells = <3>; - reg = <0xe0008500 0x100>; + reg = <0xe0008500 0x100 /* internal registers */ + 0xe0008300 0x8>; /* config space access registers */ compatible = "fsl,mpc8349-pci"; device_type = "pci"; }; @@ -376,7 +377,8 @@ #interrupt-cells = <1>; #size-cells = <2>; #address-cells = <3>; - reg = <0xe0008600 0x100>; + reg = <0xe0008600 0x100 /* internal registers */ + 0xe0008380 0x8>; /* config space access registers */ compatible = "fsl,mpc8349-pci"; device_type = "pci"; }; diff --git a/arch/powerpc/boot/dts/mpc836x_mds.dts b/arch/powerpc/boot/dts/mpc836x_mds.dts index 49aec71916e5..66a12d2631fb 100644 --- a/arch/powerpc/boot/dts/mpc836x_mds.dts +++ b/arch/powerpc/boot/dts/mpc836x_mds.dts @@ -426,7 +426,8 @@ #interrupt-cells = <1>; #size-cells = <2>; #address-cells = <3>; - reg = <0xe0008500 0x100>; + reg = <0xe0008500 0x100 /* internal registers */ + 0xe0008300 0x8>; /* config space access registers */ compatible = "fsl,mpc8349-pci"; device_type = "pci"; }; diff --git a/arch/powerpc/boot/dts/mpc836x_rdk.dts b/arch/powerpc/boot/dts/mpc836x_rdk.dts index 69c9bd2acd82..f747747e5318 100644 --- a/arch/powerpc/boot/dts/mpc836x_rdk.dts +++ b/arch/powerpc/boot/dts/mpc836x_rdk.dts @@ -409,7 +409,8 @@ #interrupt-cells = <1>; device_type = "pci"; compatible = "fsl,mpc8360-pci", "fsl,mpc8349-pci"; - reg = <0xe0008500 0x100>; + reg = <0xe0008500 0x100 /* internal registers */ + 0xe0008300 0x8>; /* config space access registers */ ranges = <0x02000000 0 0x90000000 0x90000000 0 0x10000000 0x42000000 0 0x80000000 0x80000000 0 0x10000000 0x01000000 0 0xe0300000 0xe0300000 0 0x00100000>; diff --git a/arch/powerpc/boot/dts/mpc8377_mds.dts b/arch/powerpc/boot/dts/mpc8377_mds.dts index 78f0f1124ffb..87314c78b47b 100644 --- a/arch/powerpc/boot/dts/mpc8377_mds.dts +++ b/arch/powerpc/boot/dts/mpc8377_mds.dts @@ -378,7 +378,8 @@ #interrupt-cells = <1>; #size-cells = <2>; #address-cells = <3>; - reg = <0xe0008500 0x100>; + reg = <0xe0008500 0x100 /* internal registers */ + 0xe0008300 0x8>; /* config space access registers */ compatible = "fsl,mpc8349-pci"; device_type = "pci"; }; diff --git a/arch/powerpc/boot/dts/mpc8377_rdb.dts b/arch/powerpc/boot/dts/mpc8377_rdb.dts index d46327e8cb67..53191ba67aaa 100644 --- a/arch/powerpc/boot/dts/mpc8377_rdb.dts +++ b/arch/powerpc/boot/dts/mpc8377_rdb.dts @@ -319,7 +319,8 @@ #interrupt-cells = <1>; #size-cells = <2>; #address-cells = <3>; - reg = <0xe0008500 0x100>; + reg = <0xe0008500 0x100 /* internal registers */ + 0xe0008300 0x8>; /* config space access registers */ compatible = "fsl,mpc8349-pci"; device_type = "pci"; }; diff --git a/arch/powerpc/boot/dts/mpc8378_mds.dts b/arch/powerpc/boot/dts/mpc8378_mds.dts index c44f30f2f086..02941919598f 100644 --- a/arch/powerpc/boot/dts/mpc8378_mds.dts +++ b/arch/powerpc/boot/dts/mpc8378_mds.dts @@ -364,7 +364,8 @@ #interrupt-cells = <1>; #size-cells = <2>; #address-cells = <3>; - reg = <0xe0008500 0x100>; + reg = <0xe0008500 0x100 /* internal registers */ + 0xe0008300 0x8>; /* config space access registers */ compatible = "fsl,mpc8349-pci"; device_type = "pci"; }; diff --git a/arch/powerpc/boot/dts/mpc8378_rdb.dts b/arch/powerpc/boot/dts/mpc8378_rdb.dts index b3e3bd7d550d..4a09153d160c 100644 --- a/arch/powerpc/boot/dts/mpc8378_rdb.dts +++ b/arch/powerpc/boot/dts/mpc8378_rdb.dts @@ -305,7 +305,8 @@ #interrupt-cells = <1>; #size-cells = <2>; #address-cells = <3>; - reg = <0xe0008500 0x100>; + reg = <0xe0008500 0x100 /* internal registers */ + 0xe0008300 0x8>; /* config space access registers */ compatible = "fsl,mpc8349-pci"; device_type = "pci"; }; diff --git a/arch/powerpc/boot/dts/mpc8379_mds.dts b/arch/powerpc/boot/dts/mpc8379_mds.dts index 653ed47c9a37..13a231144dcc 100644 --- a/arch/powerpc/boot/dts/mpc8379_mds.dts +++ b/arch/powerpc/boot/dts/mpc8379_mds.dts @@ -392,7 +392,8 @@ #interrupt-cells = <1>; #size-cells = <2>; #address-cells = <3>; - reg = <0xe0008500 0x100>; + reg = <0xe0008500 0x100 /* internal registers */ + 0xe0008300 0x8>; /* config space access registers */ compatible = "fsl,mpc8349-pci"; device_type = "pci"; }; diff --git a/arch/powerpc/boot/dts/mpc8379_rdb.dts b/arch/powerpc/boot/dts/mpc8379_rdb.dts index 123c8df6f4f0..bbd884ac9dc0 100644 --- a/arch/powerpc/boot/dts/mpc8379_rdb.dts +++ b/arch/powerpc/boot/dts/mpc8379_rdb.dts @@ -333,7 +333,8 @@ #interrupt-cells = <1>; #size-cells = <2>; #address-cells = <3>; - reg = <0xe0008500 0x100>; + reg = <0xe0008500 0x100 /* internal registers */ + 0xe0008300 0x8>; /* config space access registers */ compatible = "fsl,mpc8349-pci"; device_type = "pci"; }; diff --git a/arch/powerpc/boot/dts/sbc8349.dts b/arch/powerpc/boot/dts/sbc8349.dts index c7f411f7a9a2..0f941f310e44 100644 --- a/arch/powerpc/boot/dts/sbc8349.dts +++ b/arch/powerpc/boot/dts/sbc8349.dts @@ -272,7 +272,8 @@ #interrupt-cells = <1>; #size-cells = <2>; #address-cells = <3>; - reg = <0xe0008500 0x100>; + reg = <0xe0008500 0x100 /* internal registers */ + 0xe0008300 0x8>; /* config space access registers */ compatible = "fsl,mpc8349-pci"; device_type = "pci"; }; diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c index 61e6d77efa4f..a3f4abadbade 100644 --- a/arch/powerpc/sysdev/fsl_pci.c +++ b/arch/powerpc/sysdev/fsl_pci.c @@ -1,7 +1,7 @@ /* - * MPC85xx/86xx PCI/PCIE support routing. + * MPC83xx/85xx/86xx PCI/PCIE support routing. * - * Copyright 2007 Freescale Semiconductor, Inc + * Copyright 2007,2008 Freescale Semiconductor, Inc * * Initial author: Xianghua Xiao * Recode: ZHANG WEI @@ -256,15 +256,42 @@ int __init mpc83xx_add_bridge(struct device_node *dev) { int len; struct pci_controller *hose; - struct resource rsrc; + struct resource rsrc_reg; + struct resource rsrc_cfg; const int *bus_range; - int primary = 1, has_address = 0; - phys_addr_t immr = get_immrbase(); + int primary; pr_debug("Adding PCI host bridge %s\n", dev->full_name); /* Fetch host bridge registers address */ - has_address = (of_address_to_resource(dev, 0, &rsrc) == 0); + if (of_address_to_resource(dev, 0, &rsrc_reg)) { + printk(KERN_WARNING "Can't get pci register base!\n"); + return -ENOMEM; + } + + memset(&rsrc_cfg, 0, sizeof(rsrc_cfg)); + + if (of_address_to_resource(dev, 1, &rsrc_cfg)) { + printk(KERN_WARNING + "No pci config register base in dev tree, " + "using default\n"); + /* + * MPC83xx supports up to two host controllers + * one at 0x8500 has config space registers at 0x8300 + * one at 0x8600 has config space registers at 0x8380 + */ + if ((rsrc_reg.start & 0xfffff) == 0x8500) + rsrc_cfg.start = (rsrc_reg.start & 0xfff00000) + 0x8300; + else if ((rsrc_reg.start & 0xfffff) == 0x8600) + rsrc_cfg.start = (rsrc_reg.start & 0xfff00000) + 0x8380; + } + /* + * Controller at offset 0x8500 is primary + */ + if ((rsrc_reg.start & 0xfffff) == 0x8500) + primary = 1; + else + primary = 0; /* Get bus range if any */ bus_range = of_get_property(dev, "bus-range", &len); @@ -281,22 +308,11 @@ int __init mpc83xx_add_bridge(struct device_node *dev) hose->first_busno = bus_range ? bus_range[0] : 0; hose->last_busno = bus_range ? bus_range[1] : 0xff; - /* MPC83xx supports up to two host controllers one at 0x8500 from immrbar - * the other at 0x8600, we consider the 0x8500 the primary controller - */ - /* PCI 1 */ - if ((rsrc.start & 0xfffff) == 0x8500) { - setup_indirect_pci(hose, immr + 0x8300, immr + 0x8304, 0); - } - /* PCI 2 */ - if ((rsrc.start & 0xfffff) == 0x8600) { - setup_indirect_pci(hose, immr + 0x8380, immr + 0x8384, 0); - primary = 0; - } + setup_indirect_pci(hose, rsrc_cfg.start, rsrc_cfg.start + 4, 0); printk(KERN_INFO "Found MPC83xx PCI host bridge at 0x%016llx. " "Firmware bus number: %d->%d\n", - (unsigned long long)rsrc.start, hose->first_busno, + (unsigned long long)rsrc_reg.start, hose->first_busno, hose->last_busno); pr_debug(" ->Hose at 0x%p, cfg_addr=0x%p,cfg_data=0x%p\n", -- cgit v1.2.3 From 35225802e2e7019392fbff9227662d456eef4e24 Mon Sep 17 00:00:00 2001 From: John Rigby Date: Tue, 7 Oct 2008 15:13:18 -0600 Subject: powerpc/5121: Add PCI support. Uses mpc83xx_add_bridge in fsl_pci.c Adds second register tuple to pci node register property as done for 83xx device trees in a previous patch. Signed-off-by: John Rigby Acked-by: Grant Likely Signed-off-by: Kumar Gala --- arch/powerpc/boot/dts/mpc5121ads.dts | 3 ++- arch/powerpc/platforms/512x/Kconfig | 2 ++ arch/powerpc/platforms/512x/mpc5121_ads.c | 10 ++++++++++ arch/powerpc/sysdev/fsl_pci.c | 4 ++-- 4 files changed, 16 insertions(+), 3 deletions(-) (limited to 'arch/powerpc/sysdev') diff --git a/arch/powerpc/boot/dts/mpc5121ads.dts b/arch/powerpc/boot/dts/mpc5121ads.dts index 1f9036c317b4..c2b8dbfab79e 100644 --- a/arch/powerpc/boot/dts/mpc5121ads.dts +++ b/arch/powerpc/boot/dts/mpc5121ads.dts @@ -403,7 +403,8 @@ #interrupt-cells = <1>; #size-cells = <2>; #address-cells = <3>; - reg = <0x80008500 0x100>; + reg = <0x80008500 0x100 /* internal registers */ + 0x80008300 0x8>; /* config space access registers */ compatible = "fsl,mpc5121-pci"; device_type = "pci"; }; diff --git a/arch/powerpc/platforms/512x/Kconfig b/arch/powerpc/platforms/512x/Kconfig index c62f893ede19..326852c78b8f 100644 --- a/arch/powerpc/platforms/512x/Kconfig +++ b/arch/powerpc/platforms/512x/Kconfig @@ -3,6 +3,8 @@ config PPC_MPC512x select FSL_SOC select IPIC select PPC_CLOCK + select PPC_PCI_CHOICE + select FSL_PCI if PCI config PPC_MPC5121 bool diff --git a/arch/powerpc/platforms/512x/mpc5121_ads.c b/arch/powerpc/platforms/512x/mpc5121_ads.c index 5ebf6939a697..441abc488851 100644 --- a/arch/powerpc/platforms/512x/mpc5121_ads.c +++ b/arch/powerpc/platforms/512x/mpc5121_ads.c @@ -22,16 +22,26 @@ #include #include +#include + #include "mpc512x.h" #include "mpc5121_ads.h" static void __init mpc5121_ads_setup_arch(void) { +#ifdef CONFIG_PCI + struct device_node *np; +#endif printk(KERN_INFO "MPC5121 ADS board from Freescale Semiconductor\n"); /* * cpld regs are needed early */ mpc5121_ads_cpld_map(); + +#ifdef CONFIG_PCI + for_each_compatible_node(np, "pci", "fsl,mpc5121-pci") + mpc83xx_add_bridge(np); +#endif } static void __init mpc5121_ads_init_IRQ(void) diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c index a3f4abadbade..5b264eb4b1f7 100644 --- a/arch/powerpc/sysdev/fsl_pci.c +++ b/arch/powerpc/sysdev/fsl_pci.c @@ -251,7 +251,7 @@ DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8641D, quirk_fsl_pcie_header); DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8610, quirk_fsl_pcie_header); #endif /* CONFIG_PPC_85xx || CONFIG_PPC_86xx */ -#if defined(CONFIG_PPC_83xx) +#if defined(CONFIG_PPC_83xx) || defined(CONFIG_PPC_MPC512x) int __init mpc83xx_add_bridge(struct device_node *dev) { int len; @@ -310,7 +310,7 @@ int __init mpc83xx_add_bridge(struct device_node *dev) setup_indirect_pci(hose, rsrc_cfg.start, rsrc_cfg.start + 4, 0); - printk(KERN_INFO "Found MPC83xx PCI host bridge at 0x%016llx. " + printk(KERN_INFO "Found FSL PCI host bridge at 0x%016llx. " "Firmware bus number: %d->%d\n", (unsigned long long)rsrc_reg.start, hose->first_busno, hose->last_busno); -- cgit v1.2.3 From 43c9f434922ff834a6589709714f83a78c399bc1 Mon Sep 17 00:00:00 2001 From: Timur Tabi Date: Tue, 23 Sep 2008 09:47:01 -0500 Subject: powerpc: remove support for bootmem-allocated memory for the DIU driver Early versions of the Freescale DIU framebuffer driver depended on a bootmem allocation of memory for the video buffer. The need for this feature was removed in commit 6b51d51a, so now we can remove the platform-specific code that allocated that memory. Signed-off-by: Timur Tabi Signed-off-by: Kumar Gala --- arch/powerpc/platforms/86xx/mpc8610_hpcd.c | 1 - arch/powerpc/sysdev/fsl_soc.c | 38 +----------------------------- arch/powerpc/sysdev/fsl_soc.h | 8 ------- 3 files changed, 1 insertion(+), 46 deletions(-) (limited to 'arch/powerpc/sysdev') diff --git a/arch/powerpc/platforms/86xx/mpc8610_hpcd.c b/arch/powerpc/platforms/86xx/mpc8610_hpcd.c index 5eedb710896e..e8d54ac5292c 100644 --- a/arch/powerpc/platforms/86xx/mpc8610_hpcd.c +++ b/arch/powerpc/platforms/86xx/mpc8610_hpcd.c @@ -238,7 +238,6 @@ static void __init mpc86xx_hpcd_setup_arch(void) } #endif #if defined(CONFIG_FB_FSL_DIU) || defined(CONFIG_FB_FSL_DIU_MODULE) - preallocate_diu_videomemory(); diu_ops.get_pixel_format = mpc8610hpcd_get_pixel_format; diu_ops.set_gamma_table = mpc8610hpcd_set_gamma_table; diu_ops.set_monitor_port = mpc8610hpcd_set_monitor_port; diff --git a/arch/powerpc/sysdev/fsl_soc.c b/arch/powerpc/sysdev/fsl_soc.c index eeb07007c753..01b884b25696 100644 --- a/arch/powerpc/sysdev/fsl_soc.c +++ b/arch/powerpc/sysdev/fsl_soc.c @@ -720,42 +720,6 @@ void fsl_rstcr_restart(char *cmd) #endif #if defined(CONFIG_FB_FSL_DIU) || defined(CONFIG_FB_FSL_DIU_MODULE) -struct platform_diu_data_ops diu_ops = { - .diu_size = 1280 * 1024 * 4, /* default one 1280x1024 buffer */ -}; +struct platform_diu_data_ops diu_ops; EXPORT_SYMBOL(diu_ops); - -int __init preallocate_diu_videomemory(void) -{ - pr_debug("diu_size=%lu\n", diu_ops.diu_size); - - diu_ops.diu_mem = __alloc_bootmem(diu_ops.diu_size, 8, 0); - if (!diu_ops.diu_mem) { - printk(KERN_ERR "fsl-diu: cannot allocate %lu bytes\n", - diu_ops.diu_size); - return -ENOMEM; - } - - pr_debug("diu_mem=%p\n", diu_ops.diu_mem); - - rh_init(&diu_ops.diu_rh_info, 4096, ARRAY_SIZE(diu_ops.diu_rh_block), - diu_ops.diu_rh_block); - return rh_attach_region(&diu_ops.diu_rh_info, - (unsigned long) diu_ops.diu_mem, - diu_ops.diu_size); -} - -static int __init early_parse_diufb(char *p) -{ - if (!p) - return 1; - - diu_ops.diu_size = _ALIGN_UP(memparse(p, &p), 8); - - pr_debug("diu_size=%lu\n", diu_ops.diu_size); - - return 0; -} -early_param("diufb", early_parse_diufb); - #endif diff --git a/arch/powerpc/sysdev/fsl_soc.h b/arch/powerpc/sysdev/fsl_soc.h index 024299887352..60f7f227327c 100644 --- a/arch/powerpc/sysdev/fsl_soc.h +++ b/arch/powerpc/sysdev/fsl_soc.h @@ -20,14 +20,7 @@ extern int fsl_spi_init(struct spi_board_info *board_infos, extern void fsl_rstcr_restart(char *cmd); #if defined(CONFIG_FB_FSL_DIU) || defined(CONFIG_FB_FSL_DIU_MODULE) -#include -#include struct platform_diu_data_ops { - rh_block_t diu_rh_block[16]; - rh_info_t diu_rh_info; - unsigned long diu_size; - void *diu_mem; - unsigned int (*get_pixel_format) (unsigned int bits_per_pixel, int monitor_port); void (*set_gamma_table) (int monitor_port, char *gamma_table_base); @@ -38,7 +31,6 @@ struct platform_diu_data_ops { }; extern struct platform_diu_data_ops diu_ops; -int __init preallocate_diu_videomemory(void); #endif #endif -- cgit v1.2.3 From c0da99d5f7b0349cb11f970b3283c0d57beb5ec9 Mon Sep 17 00:00:00 2001 From: Anton Vorontsov Date: Thu, 9 Oct 2008 04:32:59 +0400 Subject: powerpc: fix fsl_upm nand driver modular build The fsl_upm nand driver fails to build because fsl_lbc_lock isn't exported, the lock is needed by the inlined fsl_upm_run_pattern() function: ERROR: "fsl_lbc_lock" [drivers/mtd/nand/fsl_upm.ko] undefined! Dave Jones purposed to export the lock, but it is better to just uninline the fsl_upm_run_pattern(). When uninlined we also no longer need the exported fsl_lbc_regs, and both fsl_lbc_lock and fsl_lbc_regs could be marked static. While at it, also add some missing includes that we should have included explicitly. Reported-by: Dave Jones Signed-off-by: Anton Vorontsov Signed-off-by: Kumar Gala --- arch/powerpc/include/asm/fsl_lbc.h | 48 +++------------------------------- arch/powerpc/sysdev/fsl_lbc.c | 53 +++++++++++++++++++++++++++++++++++--- 2 files changed, 53 insertions(+), 48 deletions(-) (limited to 'arch/powerpc/sysdev') diff --git a/arch/powerpc/include/asm/fsl_lbc.h b/arch/powerpc/include/asm/fsl_lbc.h index 303f5484c050..63a4f779f531 100644 --- a/arch/powerpc/include/asm/fsl_lbc.h +++ b/arch/powerpc/include/asm/fsl_lbc.h @@ -23,9 +23,9 @@ #ifndef __ASM_FSL_LBC_H #define __ASM_FSL_LBC_H +#include #include -#include -#include +#include struct fsl_lbc_bank { __be32 br; /**< Base Register */ @@ -227,9 +227,6 @@ struct fsl_lbc_regs { u8 res8[0xF00]; }; -extern struct fsl_lbc_regs __iomem *fsl_lbc_regs; -extern spinlock_t fsl_lbc_lock; - /* * FSL UPM routines */ @@ -268,44 +265,7 @@ static inline void fsl_upm_end_pattern(struct fsl_upm *upm) cpu_relax(); } -/** - * fsl_upm_run_pattern - actually run an UPM pattern - * @upm: pointer to the fsl_upm structure obtained via fsl_upm_find - * @io_base: remapped pointer to where memory access should happen - * @mar: MAR register content during pattern execution - * - * This function triggers dummy write to the memory specified by the io_base, - * thus UPM pattern actually executed. Note that mar usage depends on the - * pre-programmed AMX bits in the UPM RAM. - */ -static inline int fsl_upm_run_pattern(struct fsl_upm *upm, - void __iomem *io_base, u32 mar) -{ - int ret = 0; - unsigned long flags; - - spin_lock_irqsave(&fsl_lbc_lock, flags); - - out_be32(&fsl_lbc_regs->mar, mar << (32 - upm->width)); - - switch (upm->width) { - case 8: - out_8(io_base, 0x0); - break; - case 16: - out_be16(io_base, 0x0); - break; - case 32: - out_be32(io_base, 0x0); - break; - default: - ret = -EINVAL; - break; - } - - spin_unlock_irqrestore(&fsl_lbc_lock, flags); - - return ret; -} +extern int fsl_upm_run_pattern(struct fsl_upm *upm, void __iomem *io_base, + u32 mar); #endif /* __ASM_FSL_LBC_H */ diff --git a/arch/powerpc/sysdev/fsl_lbc.c b/arch/powerpc/sysdev/fsl_lbc.c index 422c8faef593..0494ee55920f 100644 --- a/arch/powerpc/sysdev/fsl_lbc.c +++ b/arch/powerpc/sysdev/fsl_lbc.c @@ -11,14 +11,19 @@ * (at your option) any later version. */ +#include +#include #include +#include +#include +#include +#include #include +#include #include -spinlock_t fsl_lbc_lock = __SPIN_LOCK_UNLOCKED(fsl_lbc_lock); - -struct fsl_lbc_regs __iomem *fsl_lbc_regs; -EXPORT_SYMBOL(fsl_lbc_regs); +static spinlock_t fsl_lbc_lock = __SPIN_LOCK_UNLOCKED(fsl_lbc_lock); +static struct fsl_lbc_regs __iomem *fsl_lbc_regs; static char __initdata *compat_lbc[] = { "fsl,pq2-localbus", @@ -127,3 +132,43 @@ int fsl_upm_find(phys_addr_t addr_base, struct fsl_upm *upm) return 0; } EXPORT_SYMBOL(fsl_upm_find); + +/** + * fsl_upm_run_pattern - actually run an UPM pattern + * @upm: pointer to the fsl_upm structure obtained via fsl_upm_find + * @io_base: remapped pointer to where memory access should happen + * @mar: MAR register content during pattern execution + * + * This function triggers dummy write to the memory specified by the io_base, + * thus UPM pattern actually executed. Note that mar usage depends on the + * pre-programmed AMX bits in the UPM RAM. + */ +int fsl_upm_run_pattern(struct fsl_upm *upm, void __iomem *io_base, u32 mar) +{ + int ret = 0; + unsigned long flags; + + spin_lock_irqsave(&fsl_lbc_lock, flags); + + out_be32(&fsl_lbc_regs->mar, mar << (32 - upm->width)); + + switch (upm->width) { + case 8: + out_8(io_base, 0x0); + break; + case 16: + out_be16(io_base, 0x0); + break; + case 32: + out_be32(io_base, 0x0); + break; + default: + ret = -EINVAL; + break; + } + + spin_unlock_irqrestore(&fsl_lbc_lock, flags); + + return ret; +} +EXPORT_SYMBOL(fsl_upm_run_pattern); -- cgit v1.2.3