From adf3442cc890f04af1e8e2c0b335c84e5092dca9 Mon Sep 17 00:00:00 2001 From: Robert Jarzmik Date: Sun, 23 Aug 2015 21:13:57 +0200 Subject: ARM: pxa: fix DFI bus lockups on startup After the conversion of pxa architecture to common clock framework, the NAND clock can be disabled on startup if no nand driver claims it. In this case, it happens that if the bootloader used the NAND and set the DFI arbitration bit, the next access to a static memory controller area, such as an ethernet card, the system bus will stall, and the core will be stalled forever. Fix this by clearing the DFI arbritration bit in pxa3xx startup. The bit will be enabled the pxa3xx-nand driver on need anyway. The only left requirement is that upon pxa3xx-nand removal, the bit should be cleared before the clock is disabled. Signed-off-by: Robert Jarzmik --- arch/arm/mach-pxa/include/mach/addr-map.h | 7 +++++++ arch/arm/mach-pxa/pxa3xx.c | 21 ++++++++++++++++++++- 2 files changed, 27 insertions(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-pxa/include/mach/addr-map.h b/arch/arm/mach-pxa/include/mach/addr-map.h index d28fe291233a..07b93fd24474 100644 --- a/arch/arm/mach-pxa/include/mach/addr-map.h +++ b/arch/arm/mach-pxa/include/mach/addr-map.h @@ -43,6 +43,13 @@ * 0xf6200000..0xf6201000 */ +/* + * DFI Bus for NAND, PXA3xx only + */ +#define NAND_PHYS 0x43100000 +#define NAND_VIRT IOMEM(0xf6300000) +#define NAND_SIZE 0x00100000 + /* * Internal Memory Controller (PXA27x and later) */ diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c index ce0f8d6242e2..06005d3f2ba3 100644 --- a/arch/arm/mach-pxa/pxa3xx.c +++ b/arch/arm/mach-pxa/pxa3xx.c @@ -47,6 +47,13 @@ extern void __init pxa_dt_irq_init(int (*fn)(struct irq_data *, unsigned int)); #define ISRAM_START 0x5c000000 #define ISRAM_SIZE SZ_256K +/* + * NAND NFC: DFI bus arbitration subset + */ +#define NDCR (*(volatile u32 __iomem*)(NAND_VIRT + 0)) +#define NDCR_ND_ARB_EN (1 << 12) +#define NDCR_ND_ARB_CNTL (1 << 19) + static void __iomem *sram; static unsigned long wakeup_src; @@ -362,7 +369,12 @@ static struct map_desc pxa3xx_io_desc[] __initdata = { .pfn = __phys_to_pfn(PXA3XX_SMEMC_BASE), .length = SMEMC_SIZE, .type = MT_DEVICE - } + }, { + .virtual = (unsigned long)NAND_VIRT, + .pfn = __phys_to_pfn(NAND_PHYS), + .length = NAND_SIZE, + .type = MT_DEVICE + }, }; void __init pxa3xx_map_io(void) @@ -419,6 +431,13 @@ static int __init pxa3xx_init(void) */ ASCR &= ~(ASCR_RDH | ASCR_D1S | ASCR_D2S | ASCR_D3S); + /* + * Disable DFI bus arbitration, to prevent a system bus lock if + * somebody disables the NAND clock (unused clock) while this + * bit remains set. + */ + NDCR = (NDCR & ~NDCR_ND_ARB_EN) | NDCR_ND_ARB_CNTL; + if ((ret = pxa_init_dma(IRQ_DMA, 32))) return ret; -- cgit v1.2.3 From b692cb83b14d2f741f513221f5f78042c674c2a9 Mon Sep 17 00:00:00 2001 From: Jarkko Nikula Date: Mon, 7 Sep 2015 10:23:01 +0300 Subject: ARM: pxa: ssp: Fix build error by removing originally incorrect DT binding Commit 03fbf488cece ("spi: pxa2xx: Differentiate Intel LPSS types") caused build error here because it removed the type LPSS_SSP and I didn't notice the type was used here too. I believe commit a6e56c28a178 ("ARM: pxa: ssp: add DT bindings") added it accidentally by copying all enum pxa_ssp_type types from include/linux/pxa2xx_ssp.h even LPSS_SSP was for Intel LPSS SPI devices. Fix the build error by removing this incorrect binding. Fixes: 03fbf488cece ("spi: pxa2xx: Differentiate Intel LPSS types") Signed-off-by: Jarkko Nikula Reported-by: Axel Lin Cc: # 4.2 Signed-off-by: Robert Jarzmik --- arch/arm/plat-pxa/ssp.c | 1 - 1 file changed, 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/plat-pxa/ssp.c b/arch/arm/plat-pxa/ssp.c index ad9529cc4203..daa1a65f2eb7 100644 --- a/arch/arm/plat-pxa/ssp.c +++ b/arch/arm/plat-pxa/ssp.c @@ -107,7 +107,6 @@ static const struct of_device_id pxa_ssp_of_ids[] = { { .compatible = "mvrl,pxa168-ssp", .data = (void *) PXA168_SSP }, { .compatible = "mrvl,pxa910-ssp", .data = (void *) PXA910_SSP }, { .compatible = "mrvl,ce4100-ssp", .data = (void *) CE4100_SSP }, - { .compatible = "mrvl,lpss-ssp", .data = (void *) LPSS_SSP }, { }, }; MODULE_DEVICE_TABLE(of, pxa_ssp_of_ids); -- cgit v1.2.3 From 385877c01361401113c101ef5a80a9f0998e072b Mon Sep 17 00:00:00 2001 From: Axel Lin Date: Tue, 1 Sep 2015 09:52:21 +0800 Subject: ARM: pxa: balloon3: Fix build error irq_data_get_chip() function does not exist, call irq_desc_get_chip() instead. Fixes: 9ec97561aa6d ("ARM/pxa: Prepare balloon3_irq_handler for irq argument removal") Signed-off-by: Axel Lin Signed-off-by: Robert Jarzmik --- arch/arm/mach-pxa/balloon3.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-pxa/balloon3.c b/arch/arm/mach-pxa/balloon3.c index 70366b35d299..c1cda989c705 100644 --- a/arch/arm/mach-pxa/balloon3.c +++ b/arch/arm/mach-pxa/balloon3.c @@ -502,7 +502,7 @@ static void balloon3_irq_handler(unsigned int __irq, struct irq_desc *desc) balloon3_irq_enabled; do { struct irq_data *d = irq_desc_get_irq_data(desc); - struct irq_chip *chip = irq_data_get_chip(d); + struct irq_chip *chip = irq_desc_get_chip(desc); unsigned int irq; /* clear useless edge notification */ -- cgit v1.2.3