From cad8e5a7a1e27e9efe4e706ace75e0826a79707f Mon Sep 17 00:00:00 2001
From: Geert Uytterhoeven <geert+renesas@glider.be>
Date: Mon, 7 May 2018 15:24:49 +0200
Subject: ARM: dts: r7s72100: Correct RTC interrupt types

According to table 7.3 ("List of Interrupt IDs") in the RZ/A1H Hardware
User's Manual rev. 3.00, the realtime clock interrupts are level not
edge interrupts.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
 arch/arm/boot/dts/r7s72100.dtsi | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

(limited to 'arch/arm')

diff --git a/arch/arm/boot/dts/r7s72100.dtsi b/arch/arm/boot/dts/r7s72100.dtsi
index c7b3dca6d81c..eb2e6f95a2e8 100644
--- a/arch/arm/boot/dts/r7s72100.dtsi
+++ b/arch/arm/boot/dts/r7s72100.dtsi
@@ -682,9 +682,9 @@
 		rtc: rtc@fcff1000 {
 			compatible = "renesas,r7s72100-rtc", "renesas,sh-rtc";
 			reg = <0xfcff1000 0x2e>;
-			interrupts = <GIC_SPI 276 IRQ_TYPE_EDGE_RISING
-				      GIC_SPI 277 IRQ_TYPE_EDGE_RISING
-				      GIC_SPI 278 IRQ_TYPE_EDGE_RISING>;
+			interrupts = <GIC_SPI 276 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 277 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "alarm", "period", "carry";
 			clocks = <&mstp6_clks R7S72100_CLK_RTC>, <&rtc_x1_clk>,
 				 <&rtc_x3_clk>, <&extal_clk>;
-- 
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