From e34917955bfd2406b85f665621d76982bab3b55d Mon Sep 17 00:00:00 2001 From: Peter Ujfalusi Date: Wed, 14 May 2014 12:26:10 -0600 Subject: ARM: omap4: hwmod_data: Clean up audio related structures (remove/merge them) All audio related omap_hwmod_ocp_if *_dma can be removed from the data since we can just add the user flag to the non dma structure. Signed-off-by: Peter Ujfalusi Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 99 +++--------------------------- 1 file changed, 9 insertions(+), 90 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c index 1219280bb976..41e54f759934 100644 --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c @@ -3635,15 +3635,7 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__dmic = { .master = &omap44xx_l4_abe_hwmod, .slave = &omap44xx_dmic_hwmod, .clk = "ocp_abe_iclk", - .user = OCP_USER_MPU, -}; - -/* l4_abe -> dmic (dma) */ -static struct omap_hwmod_ocp_if omap44xx_l4_abe__dmic_dma = { - .master = &omap44xx_l4_abe_hwmod, - .slave = &omap44xx_dmic_hwmod, - .clk = "ocp_abe_iclk", - .user = OCP_USER_SDMA, + .user = OCP_USER_MPU | OCP_USER_SDMA, }; /* dsp -> iva */ @@ -4209,15 +4201,7 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp1 = { .master = &omap44xx_l4_abe_hwmod, .slave = &omap44xx_mcbsp1_hwmod, .clk = "ocp_abe_iclk", - .user = OCP_USER_MPU, -}; - -/* l4_abe -> mcbsp1 (dma) */ -static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp1_dma = { - .master = &omap44xx_l4_abe_hwmod, - .slave = &omap44xx_mcbsp1_hwmod, - .clk = "ocp_abe_iclk", - .user = OCP_USER_SDMA, + .user = OCP_USER_MPU | OCP_USER_SDMA, }; /* l4_abe -> mcbsp2 */ @@ -4225,15 +4209,7 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp2 = { .master = &omap44xx_l4_abe_hwmod, .slave = &omap44xx_mcbsp2_hwmod, .clk = "ocp_abe_iclk", - .user = OCP_USER_MPU, -}; - -/* l4_abe -> mcbsp2 (dma) */ -static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp2_dma = { - .master = &omap44xx_l4_abe_hwmod, - .slave = &omap44xx_mcbsp2_hwmod, - .clk = "ocp_abe_iclk", - .user = OCP_USER_SDMA, + .user = OCP_USER_MPU | OCP_USER_SDMA, }; /* l4_abe -> mcbsp3 */ @@ -4241,15 +4217,7 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp3 = { .master = &omap44xx_l4_abe_hwmod, .slave = &omap44xx_mcbsp3_hwmod, .clk = "ocp_abe_iclk", - .user = OCP_USER_MPU, -}; - -/* l4_abe -> mcbsp3 (dma) */ -static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp3_dma = { - .master = &omap44xx_l4_abe_hwmod, - .slave = &omap44xx_mcbsp3_hwmod, - .clk = "ocp_abe_iclk", - .user = OCP_USER_SDMA, + .user = OCP_USER_MPU | OCP_USER_SDMA, }; /* l4_per -> mcbsp4 */ @@ -4265,15 +4233,7 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcpdm = { .master = &omap44xx_l4_abe_hwmod, .slave = &omap44xx_mcpdm_hwmod, .clk = "ocp_abe_iclk", - .user = OCP_USER_MPU, -}; - -/* l4_abe -> mcpdm (dma) */ -static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcpdm_dma = { - .master = &omap44xx_l4_abe_hwmod, - .slave = &omap44xx_mcpdm_hwmod, - .clk = "ocp_abe_iclk", - .user = OCP_USER_SDMA, + .user = OCP_USER_MPU | OCP_USER_SDMA, }; /* l4_per -> mcspi1 */ @@ -4575,15 +4535,7 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer5 = { .master = &omap44xx_l4_abe_hwmod, .slave = &omap44xx_timer5_hwmod, .clk = "ocp_abe_iclk", - .user = OCP_USER_MPU, -}; - -/* l4_abe -> timer5 (dma) */ -static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer5_dma = { - .master = &omap44xx_l4_abe_hwmod, - .slave = &omap44xx_timer5_hwmod, - .clk = "ocp_abe_iclk", - .user = OCP_USER_SDMA, + .user = OCP_USER_MPU | OCP_USER_SDMA, }; /* l4_abe -> timer6 */ @@ -4591,15 +4543,7 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer6 = { .master = &omap44xx_l4_abe_hwmod, .slave = &omap44xx_timer6_hwmod, .clk = "ocp_abe_iclk", - .user = OCP_USER_MPU, -}; - -/* l4_abe -> timer6 (dma) */ -static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer6_dma = { - .master = &omap44xx_l4_abe_hwmod, - .slave = &omap44xx_timer6_hwmod, - .clk = "ocp_abe_iclk", - .user = OCP_USER_SDMA, + .user = OCP_USER_MPU | OCP_USER_SDMA, }; /* l4_abe -> timer7 */ @@ -4607,15 +4551,7 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer7 = { .master = &omap44xx_l4_abe_hwmod, .slave = &omap44xx_timer7_hwmod, .clk = "ocp_abe_iclk", - .user = OCP_USER_MPU, -}; - -/* l4_abe -> timer7 (dma) */ -static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer7_dma = { - .master = &omap44xx_l4_abe_hwmod, - .slave = &omap44xx_timer7_hwmod, - .clk = "ocp_abe_iclk", - .user = OCP_USER_SDMA, + .user = OCP_USER_MPU | OCP_USER_SDMA, }; /* l4_abe -> timer8 */ @@ -4623,15 +4559,7 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer8 = { .master = &omap44xx_l4_abe_hwmod, .slave = &omap44xx_timer8_hwmod, .clk = "ocp_abe_iclk", - .user = OCP_USER_MPU, -}; - -/* l4_abe -> timer8 (dma) */ -static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer8_dma = { - .master = &omap44xx_l4_abe_hwmod, - .slave = &omap44xx_timer8_hwmod, - .clk = "ocp_abe_iclk", - .user = OCP_USER_SDMA, + .user = OCP_USER_MPU | OCP_USER_SDMA, }; /* l4_per -> timer9 */ @@ -4831,7 +4759,6 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = { &omap44xx_l3_instr__debugss, &omap44xx_l4_cfg__dma_system, &omap44xx_l4_abe__dmic, - &omap44xx_l4_abe__dmic_dma, &omap44xx_dsp__iva, /* &omap44xx_dsp__sl2if, */ &omap44xx_l4_cfg__dsp, @@ -4874,14 +4801,10 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = { &omap44xx_l4_abe__mcasp, &omap44xx_l4_abe__mcasp_dma, &omap44xx_l4_abe__mcbsp1, - &omap44xx_l4_abe__mcbsp1_dma, &omap44xx_l4_abe__mcbsp2, - &omap44xx_l4_abe__mcbsp2_dma, &omap44xx_l4_abe__mcbsp3, - &omap44xx_l4_abe__mcbsp3_dma, &omap44xx_l4_per__mcbsp4, &omap44xx_l4_abe__mcpdm, - &omap44xx_l4_abe__mcpdm_dma, &omap44xx_l4_per__mcspi1, &omap44xx_l4_per__mcspi2, &omap44xx_l4_per__mcspi3, @@ -4913,13 +4836,9 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = { &omap44xx_l4_per__timer3, &omap44xx_l4_per__timer4, &omap44xx_l4_abe__timer5, - &omap44xx_l4_abe__timer5_dma, &omap44xx_l4_abe__timer6, - &omap44xx_l4_abe__timer6_dma, &omap44xx_l4_abe__timer7, - &omap44xx_l4_abe__timer7_dma, &omap44xx_l4_abe__timer8, - &omap44xx_l4_abe__timer8_dma, &omap44xx_l4_per__timer9, &omap44xx_l4_per__timer10, &omap44xx_l4_per__timer11, -- cgit v1.2.3 From 433480707967187a74ced38bd38edba749998013 Mon Sep 17 00:00:00 2001 From: Archit Taneja Date: Wed, 14 May 2014 12:26:10 -0600 Subject: ARM: OMAP2+: hwmod: OMAP5 DSS hwmod data Add hwmod data for dss core, dispc dsi1, dsi2, rfbi and hdmi. It's more or less similar to omap4 hwmod data. Signed-off-by: Archit Taneja Signed-off-by: Tomi Valkeinen Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/omap_hwmod_54xx_data.c | 283 +++++++++++++++++++++++++++++ 1 file changed, 283 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/mach-omap2/omap_hwmod_54xx_data.c b/arch/arm/mach-omap2/omap_hwmod_54xx_data.c index 892317294fdc..e8bdd7a91090 100644 --- a/arch/arm/mach-omap2/omap_hwmod_54xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_54xx_data.c @@ -333,6 +333,235 @@ static struct omap_hwmod omap54xx_dmic_hwmod = { }, }; +/* + * 'dss' class + * display sub-system + */ +static struct omap_hwmod_class_sysconfig omap54xx_dss_sysc = { + .rev_offs = 0x0000, + .syss_offs = 0x0014, + .sysc_flags = SYSS_HAS_RESET_STATUS, +}; + +static struct omap_hwmod_class omap54xx_dss_hwmod_class = { + .name = "dss", + .sysc = &omap54xx_dss_sysc, + .reset = omap_dss_reset, +}; + +/* dss */ +static struct omap_hwmod_opt_clk dss_opt_clks[] = { + { .role = "32khz_clk", .clk = "dss_32khz_clk" }, + { .role = "sys_clk", .clk = "dss_sys_clk" }, + { .role = "hdmi_clk", .clk = "dss_48mhz_clk" }, +}; + +static struct omap_hwmod omap54xx_dss_hwmod = { + .name = "dss_core", + .class = &omap54xx_dss_hwmod_class, + .clkdm_name = "dss_clkdm", + .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, + .main_clk = "dss_dss_clk", + .prcm = { + .omap4 = { + .clkctrl_offs = OMAP54XX_CM_DSS_DSS_CLKCTRL_OFFSET, + .context_offs = OMAP54XX_RM_DSS_DSS_CONTEXT_OFFSET, + .modulemode = MODULEMODE_SWCTRL, + }, + }, + .opt_clks = dss_opt_clks, + .opt_clks_cnt = ARRAY_SIZE(dss_opt_clks), +}; + +/* + * 'dispc' class + * display controller + */ + +static struct omap_hwmod_class_sysconfig omap54xx_dispc_sysc = { + .rev_offs = 0x0000, + .sysc_offs = 0x0010, + .syss_offs = 0x0014, + .sysc_flags = (SYSC_HAS_AUTOIDLE | SYSC_HAS_CLOCKACTIVITY | + SYSC_HAS_ENAWAKEUP | SYSC_HAS_MIDLEMODE | + SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET | + SYSS_HAS_RESET_STATUS), + .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | + MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART), + .sysc_fields = &omap_hwmod_sysc_type1, +}; + +static struct omap_hwmod_class omap54xx_dispc_hwmod_class = { + .name = "dispc", + .sysc = &omap54xx_dispc_sysc, +}; + +/* dss_dispc */ +static struct omap_hwmod_opt_clk dss_dispc_opt_clks[] = { + { .role = "sys_clk", .clk = "dss_sys_clk" }, +}; + +/* dss_dispc dev_attr */ +static struct omap_dss_dispc_dev_attr dss_dispc_dev_attr = { + .has_framedonetv_irq = 1, + .manager_count = 4, +}; + +static struct omap_hwmod omap54xx_dss_dispc_hwmod = { + .name = "dss_dispc", + .class = &omap54xx_dispc_hwmod_class, + .clkdm_name = "dss_clkdm", + .main_clk = "dss_dss_clk", + .prcm = { + .omap4 = { + .clkctrl_offs = OMAP54XX_CM_DSS_DSS_CLKCTRL_OFFSET, + .flags = HWMOD_OMAP4_NO_CONTEXT_LOSS_BIT, + }, + }, + .opt_clks = dss_dispc_opt_clks, + .opt_clks_cnt = ARRAY_SIZE(dss_dispc_opt_clks), + .dev_attr = &dss_dispc_dev_attr, +}; + +/* + * 'dsi1' class + * display serial interface controller + */ + +static struct omap_hwmod_class_sysconfig omap54xx_dsi1_sysc = { + .rev_offs = 0x0000, + .sysc_offs = 0x0010, + .syss_offs = 0x0014, + .sysc_flags = (SYSC_HAS_AUTOIDLE | SYSC_HAS_CLOCKACTIVITY | + SYSC_HAS_ENAWAKEUP | SYSC_HAS_SIDLEMODE | + SYSC_HAS_SOFTRESET | SYSS_HAS_RESET_STATUS), + .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), + .sysc_fields = &omap_hwmod_sysc_type1, +}; + +static struct omap_hwmod_class omap54xx_dsi1_hwmod_class = { + .name = "dsi1", + .sysc = &omap54xx_dsi1_sysc, +}; + +/* dss_dsi1_a */ +static struct omap_hwmod_opt_clk dss_dsi1_a_opt_clks[] = { + { .role = "sys_clk", .clk = "dss_sys_clk" }, +}; + +static struct omap_hwmod omap54xx_dss_dsi1_a_hwmod = { + .name = "dss_dsi1", + .class = &omap54xx_dsi1_hwmod_class, + .clkdm_name = "dss_clkdm", + .main_clk = "dss_dss_clk", + .prcm = { + .omap4 = { + .clkctrl_offs = OMAP54XX_CM_DSS_DSS_CLKCTRL_OFFSET, + .flags = HWMOD_OMAP4_NO_CONTEXT_LOSS_BIT, + }, + }, + .opt_clks = dss_dsi1_a_opt_clks, + .opt_clks_cnt = ARRAY_SIZE(dss_dsi1_a_opt_clks), +}; + +/* dss_dsi1_c */ +static struct omap_hwmod_opt_clk dss_dsi1_c_opt_clks[] = { + { .role = "sys_clk", .clk = "dss_sys_clk" }, +}; + +static struct omap_hwmod omap54xx_dss_dsi1_c_hwmod = { + .name = "dss_dsi2", + .class = &omap54xx_dsi1_hwmod_class, + .clkdm_name = "dss_clkdm", + .main_clk = "dss_dss_clk", + .prcm = { + .omap4 = { + .clkctrl_offs = OMAP54XX_CM_DSS_DSS_CLKCTRL_OFFSET, + .flags = HWMOD_OMAP4_NO_CONTEXT_LOSS_BIT, + }, + }, + .opt_clks = dss_dsi1_c_opt_clks, + .opt_clks_cnt = ARRAY_SIZE(dss_dsi1_c_opt_clks), +}; + +/* + * 'hdmi' class + * hdmi controller + */ + +static struct omap_hwmod_class_sysconfig omap54xx_hdmi_sysc = { + .rev_offs = 0x0000, + .sysc_offs = 0x0010, + .sysc_flags = (SYSC_HAS_RESET_STATUS | SYSC_HAS_SIDLEMODE | + SYSC_HAS_SOFTRESET), + .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | + SIDLE_SMART_WKUP), + .sysc_fields = &omap_hwmod_sysc_type2, +}; + +static struct omap_hwmod_class omap54xx_hdmi_hwmod_class = { + .name = "hdmi", + .sysc = &omap54xx_hdmi_sysc, +}; + +static struct omap_hwmod_opt_clk dss_hdmi_opt_clks[] = { + { .role = "sys_clk", .clk = "dss_sys_clk" }, +}; + +static struct omap_hwmod omap54xx_dss_hdmi_hwmod = { + .name = "dss_hdmi", + .class = &omap54xx_hdmi_hwmod_class, + .clkdm_name = "dss_clkdm", + .main_clk = "dss_48mhz_clk", + .prcm = { + .omap4 = { + .clkctrl_offs = OMAP54XX_CM_DSS_DSS_CLKCTRL_OFFSET, + .flags = HWMOD_OMAP4_NO_CONTEXT_LOSS_BIT, + }, + }, + .opt_clks = dss_hdmi_opt_clks, + .opt_clks_cnt = ARRAY_SIZE(dss_hdmi_opt_clks), +}; + +/* + * 'rfbi' class + * remote frame buffer interface + */ + +static struct omap_hwmod_class_sysconfig omap54xx_rfbi_sysc = { + .rev_offs = 0x0000, + .sysc_offs = 0x0010, + .syss_offs = 0x0014, + .sysc_flags = (SYSC_HAS_AUTOIDLE | SYSC_HAS_SIDLEMODE | + SYSC_HAS_SOFTRESET | SYSS_HAS_RESET_STATUS), + .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), + .sysc_fields = &omap_hwmod_sysc_type1, +}; + +static struct omap_hwmod_class omap54xx_rfbi_hwmod_class = { + .name = "rfbi", + .sysc = &omap54xx_rfbi_sysc, +}; + +/* dss_rfbi */ +static struct omap_hwmod_opt_clk dss_rfbi_opt_clks[] = { + { .role = "ick", .clk = "l3_iclk_div" }, +}; + +static struct omap_hwmod omap54xx_dss_rfbi_hwmod = { + .name = "dss_rfbi", + .class = &omap54xx_rfbi_hwmod_class, + .clkdm_name = "dss_clkdm", + .prcm = { + .omap4 = { + .clkctrl_offs = OMAP54XX_CM_DSS_DSS_CLKCTRL_OFFSET, + .flags = HWMOD_OMAP4_NO_CONTEXT_LOSS_BIT, + }, + }, + .opt_clks = dss_rfbi_opt_clks, + .opt_clks_cnt = ARRAY_SIZE(dss_rfbi_opt_clks), +}; + /* * 'emif' class * external memory interface no1 (wrapper) @@ -1974,6 +2203,54 @@ static struct omap_hwmod_ocp_if omap54xx_l4_abe__dmic = { .user = OCP_USER_MPU, }; +/* l3_main_2 -> dss */ +static struct omap_hwmod_ocp_if omap54xx_l3_main_2__dss = { + .master = &omap54xx_l3_main_2_hwmod, + .slave = &omap54xx_dss_hwmod, + .clk = "l3_iclk_div", + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +/* l3_main_2 -> dss_dispc */ +static struct omap_hwmod_ocp_if omap54xx_l3_main_2__dss_dispc = { + .master = &omap54xx_l3_main_2_hwmod, + .slave = &omap54xx_dss_dispc_hwmod, + .clk = "l3_iclk_div", + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +/* l3_main_2 -> dss_dsi1_a */ +static struct omap_hwmod_ocp_if omap54xx_l3_main_2__dss_dsi1_a = { + .master = &omap54xx_l3_main_2_hwmod, + .slave = &omap54xx_dss_dsi1_a_hwmod, + .clk = "l3_iclk_div", + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +/* l3_main_2 -> dss_dsi1_c */ +static struct omap_hwmod_ocp_if omap54xx_l3_main_2__dss_dsi1_c = { + .master = &omap54xx_l3_main_2_hwmod, + .slave = &omap54xx_dss_dsi1_c_hwmod, + .clk = "l3_iclk_div", + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +/* l3_main_2 -> dss_hdmi */ +static struct omap_hwmod_ocp_if omap54xx_l3_main_2__dss_hdmi = { + .master = &omap54xx_l3_main_2_hwmod, + .slave = &omap54xx_dss_hdmi_hwmod, + .clk = "l3_iclk_div", + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +/* l3_main_2 -> dss_rfbi */ +static struct omap_hwmod_ocp_if omap54xx_l3_main_2__dss_rfbi = { + .master = &omap54xx_l3_main_2_hwmod, + .slave = &omap54xx_dss_rfbi_hwmod, + .clk = "l3_iclk_div", + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + /* mpu -> emif1 */ static struct omap_hwmod_ocp_if omap54xx_mpu__emif1 = { .master = &omap54xx_mpu_hwmod, @@ -2427,6 +2704,12 @@ static struct omap_hwmod_ocp_if *omap54xx_hwmod_ocp_ifs[] __initdata = { &omap54xx_l4_cfg__dma_system, &omap54xx_l4_abe__dmic, &omap54xx_l4_cfg__mmu_dsp, + &omap54xx_l3_main_2__dss, + &omap54xx_l3_main_2__dss_dispc, + &omap54xx_l3_main_2__dss_dsi1_a, + &omap54xx_l3_main_2__dss_dsi1_c, + &omap54xx_l3_main_2__dss_hdmi, + &omap54xx_l3_main_2__dss_rfbi, &omap54xx_mpu__emif1, &omap54xx_mpu__emif2, &omap54xx_l4_wkup__gpio1, -- cgit v1.2.3 From 2e4b62dc5e6e2011dbd03ae1a654d990d18d0a14 Mon Sep 17 00:00:00 2001 From: Dave Gerlach Date: Mon, 12 May 2014 13:33:21 -0500 Subject: ARM: OMAP2+: Remove suspend_set_ops from common pm late init In omap2_common_pm_late_init suspend_set_ops was called to set common suspend handling functions for all omap platforms. This created two problems. First, these suspend ops were being set for all platforms, regardless of whether or not suspend support has been integrated so in the case of AM33XX, suspend to mem was presented as available but failed every time. Second, some platforms will need to define a completely separate set of suspend ops, such as AM33XX, due to differences from previous omap platforms so there is no need to always set the common omap ops. This patch moves the suspend_set_ops call from omap2_common_pm_late_init into a separate function that then gets called in the omap*_pm_init functions for each platform. Signed-off-by: Dave Gerlach Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/pm.c | 17 ++++++++++++----- arch/arm/mach-omap2/pm.h | 8 +++++++- arch/arm/mach-omap2/pm24xx.c | 4 +--- arch/arm/mach-omap2/pm34xx.c | 7 +++---- arch/arm/mach-omap2/pm44xx.c | 6 +++--- 5 files changed, 26 insertions(+), 16 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c index e1b41416fbf1..dd31212d5e20 100644 --- a/arch/arm/mach-omap2/pm.c +++ b/arch/arm/mach-omap2/pm.c @@ -32,11 +32,13 @@ #include "pm.h" #include "twl-common.h" +#ifdef CONFIG_SUSPEND /* * omap_pm_suspend: points to a function that does the SoC-specific * suspend work */ -int (*omap_pm_suspend)(void); +static int (*omap_pm_suspend)(void); +#endif #ifdef CONFIG_PM /** @@ -243,6 +245,15 @@ static const struct platform_suspend_ops omap_pm_ops = { .valid = suspend_valid_only_mem, }; +/** + * omap_common_suspend_init - Set common suspend routines for OMAP SoCs + * @pm_suspend: function pointer to SoC specific suspend function + */ +void omap_common_suspend_init(void *pm_suspend) +{ + omap_pm_suspend = pm_suspend; + suspend_set_ops(&omap_pm_ops); +} #endif /* CONFIG_SUSPEND */ static void __init omap3_init_voltages(void) @@ -310,9 +321,5 @@ int __init omap2_common_pm_late_init(void) /* cpufreq dummy device instantiation */ omap_init_cpufreq(); -#ifdef CONFIG_SUSPEND - suspend_set_ops(&omap_pm_ops); -#endif - return 0; } diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h index d4d0fce325c7..e150102d6c06 100644 --- a/arch/arm/mach-omap2/pm.h +++ b/arch/arm/mach-omap2/pm.h @@ -34,7 +34,6 @@ extern void *omap3_secure_ram_storage; extern void omap3_pm_off_mode_enable(int); extern void omap_sram_idle(void); extern int omap_pm_clkdms_setup(struct clockdomain *clkdm, void *unused); -extern int (*omap_pm_suspend)(void); #if defined(CONFIG_PM_OPP) extern int omap3_opp_init(void); @@ -147,4 +146,11 @@ static inline void omap_pm_get_oscillator(u32 *tstart, u32 *tshut) { *tstart = * static inline void omap_pm_setup_sr_i2c_pcb_length(u32 mm) { } #endif +#ifdef CONFIG_SUSPEND +void omap_common_suspend_init(void *pm_suspend); +#else +static inline void omap_common_suspend_init(void *pm_suspend) +{ +} +#endif /* CONFIG_SUSPEND */ #endif diff --git a/arch/arm/mach-omap2/pm24xx.c b/arch/arm/mach-omap2/pm24xx.c index 8c0759496c8d..a5ea988ff340 100644 --- a/arch/arm/mach-omap2/pm24xx.c +++ b/arch/arm/mach-omap2/pm24xx.c @@ -229,9 +229,7 @@ static void __init prcm_setup_regs(void) clkdm_for_each(omap_pm_clkdms_setup, NULL); clkdm_add_wkdep(mpu_clkdm, wkup_clkdm); -#ifdef CONFIG_SUSPEND - omap_pm_suspend = omap2_enter_full_retention; -#endif + omap_common_suspend_init(omap2_enter_full_retention); /* REVISIT: Configure number of 32 kHz clock cycles for sys_clk * stabilisation */ diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index 87099bb6de69..90ea2d3ab405 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c @@ -391,7 +391,8 @@ restore: return ret; } - +#else +#define omap3_pm_suspend NULL #endif /* CONFIG_SUSPEND */ @@ -705,9 +706,7 @@ int __init omap3_pm_init(void) per_clkdm = clkdm_lookup("per_clkdm"); wkup_clkdm = clkdm_lookup("wkup_clkdm"); -#ifdef CONFIG_SUSPEND - omap_pm_suspend = omap3_pm_suspend; -#endif + omap_common_suspend_init(omap3_pm_suspend); arm_pm_idle = omap3_pm_idle; omap3_idle_init(); diff --git a/arch/arm/mach-omap2/pm44xx.c b/arch/arm/mach-omap2/pm44xx.c index eefb30cfcabd..0dda6cf8b855 100644 --- a/arch/arm/mach-omap2/pm44xx.c +++ b/arch/arm/mach-omap2/pm44xx.c @@ -96,6 +96,8 @@ static int omap4_pm_suspend(void) return 0; } +#else +#define omap4_pm_suspend NULL #endif /* CONFIG_SUSPEND */ static int __init pwrdms_setup(struct powerdomain *pwrdm, void *unused) @@ -251,9 +253,7 @@ int __init omap4_pm_init(void) (void) clkdm_for_each(omap_pm_clkdms_setup, NULL); -#ifdef CONFIG_SUSPEND - omap_pm_suspend = omap4_pm_suspend; -#endif + omap_common_suspend_init(omap4_pm_suspend); /* Overwrite the default cpu_do_idle() */ arm_pm_idle = omap_default_idle; -- cgit v1.2.3 From 733d20eeeeb31587aacd917fb0aaf2888c26a4b5 Mon Sep 17 00:00:00 2001 From: Nishanth Menon Date: Mon, 19 May 2014 10:27:11 -0500 Subject: ARM: DRA752: add detection of SoC information Currently the files in /sys/devices/soc0/ show no information about DRA7. Few userspace programs do depend on this information to make SoC specific support. So update logic to detect the relevant information and provide to userspace. Signed-off-by: Nishanth Menon Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/id.c | 37 +++++++++++++++++++++++++++++++++++++ arch/arm/mach-omap2/io.c | 1 + arch/arm/mach-omap2/soc.h | 5 +++++ 3 files changed, 43 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c index 157412e4273a..71bf2164130f 100644 --- a/arch/arm/mach-omap2/id.c +++ b/arch/arm/mach-omap2/id.c @@ -628,6 +628,41 @@ void __init omap5xxx_check_revision(void) pr_info("%s %s\n", soc_name, soc_rev); } +void __init dra7xxx_check_revision(void) +{ + u32 idcode; + u16 hawkeye; + u8 rev; + + idcode = read_tap_reg(OMAP_TAP_IDCODE); + hawkeye = (idcode >> 12) & 0xffff; + rev = (idcode >> 28) & 0xff; + switch (hawkeye) { + case 0xb990: + switch (rev) { + case 0: + omap_revision = DRA752_REV_ES1_0; + break; + case 1: + default: + omap_revision = DRA752_REV_ES1_1; + } + break; + + default: + /* Unknown default to latest silicon rev as default*/ + pr_warn("%s: unknown idcode=0x%08x (hawkeye=0x%08x,rev=0x%d)\n", + __func__, idcode, hawkeye, rev); + omap_revision = DRA752_REV_ES1_1; + } + + sprintf(soc_name, "DRA%03x", omap_rev() >> 16); + sprintf(soc_rev, "ES%d.%d", (omap_rev() >> 12) & 0xf, + (omap_rev() >> 8) & 0xf); + + pr_info("%s %s\n", soc_name, soc_rev); +} + /* * Set up things for map_io and processor detection later on. Gets called * pretty much first thing from board init. For multi-omap, this gets @@ -669,6 +704,8 @@ static const char * __init omap_get_family(void) return kasprintf(GFP_KERNEL, "OMAP5"); else if (soc_is_am43xx()) return kasprintf(GFP_KERNEL, "AM43xx"); + else if (soc_is_dra7xx()) + return kasprintf(GFP_KERNEL, "DRA7"); else return kasprintf(GFP_KERNEL, "Unknown"); } diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index f14f9ac2dca1..4ec3b4a93843 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c @@ -693,6 +693,7 @@ void __init dra7xx_init_early(void) omap_prm_base_init(); omap_cm_base_init(); omap44xx_prm_init(); + dra7xxx_check_revision(); dra7xx_powerdomains_init(); dra7xx_clockdomains_init(); dra7xx_hwmod_init(); diff --git a/arch/arm/mach-omap2/soc.h b/arch/arm/mach-omap2/soc.h index 30abcc8b20e0..de2a34c423a7 100644 --- a/arch/arm/mach-omap2/soc.h +++ b/arch/arm/mach-omap2/soc.h @@ -459,10 +459,15 @@ IS_OMAP_TYPE(3430, 0x3430) #define OMAP5430_REV_ES2_0 (OMAP54XX_CLASS | (0x30 << 16) | (0x20 << 8)) #define OMAP5432_REV_ES2_0 (OMAP54XX_CLASS | (0x32 << 16) | (0x20 << 8)) +#define DRA7XX_CLASS 0x07000000 +#define DRA752_REV_ES1_0 (DRA7XX_CLASS | (0x52 << 16) | (0x10 << 8)) +#define DRA752_REV_ES1_1 (DRA7XX_CLASS | (0x52 << 16) | (0x11 << 8)) + void omap2xxx_check_revision(void); void omap3xxx_check_revision(void); void omap4xxx_check_revision(void); void omap5xxx_check_revision(void); +void dra7xxx_check_revision(void); void omap3xxx_check_features(void); void ti81xx_check_features(void); void am33xx_check_features(void); -- cgit v1.2.3