From 86aeee4d0a4cc5f7a28fe209444887b93a9a47ca Mon Sep 17 00:00:00 2001 From: Andreas Färber Date: Thu, 5 Oct 2017 03:59:15 +0200 Subject: ARM: Prepare Realtek RTD1195 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Introduce ARCH_REALTEK Kconfig option also for 32-bit Arm. Override the text offset to cope with boot ROM occupying first 0xa800 bytes and further reservations up to 0xf4000 (compare Device Tree). Add a custom machine_desc to enforce memory carveout for I/O registers. Signed-off-by: Andreas Färber --- arch/arm/Kconfig | 2 ++ arch/arm/Makefile | 3 +++ arch/arm/mach-realtek/Kconfig | 11 +++++++++++ arch/arm/mach-realtek/Makefile | 2 ++ arch/arm/mach-realtek/rtd1195.c | 40 ++++++++++++++++++++++++++++++++++++++++ 5 files changed, 58 insertions(+) create mode 100644 arch/arm/mach-realtek/Kconfig create mode 100644 arch/arm/mach-realtek/Makefile create mode 100644 arch/arm/mach-realtek/rtd1195.c (limited to 'arch/arm') diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 66a04f6f4775..cbd6629e7d75 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -698,6 +698,8 @@ source "arch/arm/mach-qcom/Kconfig" source "arch/arm/mach-rda/Kconfig" +source "arch/arm/mach-realtek/Kconfig" + source "arch/arm/mach-realview/Kconfig" source "arch/arm/mach-rockchip/Kconfig" diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 7d5cd0f85461..0fb6de83dd50 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -148,6 +148,8 @@ head-y := arch/arm/kernel/head$(MMUEXT).o textofs-y := 0x00008000 # We don't want the htc bootloader to corrupt kernel during resume textofs-$(CONFIG_PM_H1940) := 0x00108000 +# RTD1195 has Boot ROM at start of address space +textofs-$(CONFIG_ARCH_REALTEK) := 0x00108000 # SA1111 DMA bug: we don't want the kernel to live in precious DMA-able memory ifeq ($(CONFIG_ARCH_SA1100),y) textofs-$(CONFIG_SA1111) := 0x00208000 @@ -208,6 +210,7 @@ machine-$(CONFIG_ARCH_PICOXCELL) += picoxcell machine-$(CONFIG_ARCH_PXA) += pxa machine-$(CONFIG_ARCH_QCOM) += qcom machine-$(CONFIG_ARCH_RDA) += rda +machine-$(CONFIG_ARCH_REALTEK) += realtek machine-$(CONFIG_ARCH_REALVIEW) += realview machine-$(CONFIG_ARCH_ROCKCHIP) += rockchip machine-$(CONFIG_ARCH_RPC) += rpc diff --git a/arch/arm/mach-realtek/Kconfig b/arch/arm/mach-realtek/Kconfig new file mode 100644 index 000000000000..19fdcf093fd1 --- /dev/null +++ b/arch/arm/mach-realtek/Kconfig @@ -0,0 +1,11 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +menuconfig ARCH_REALTEK + bool "Realtek SoCs" + depends on ARCH_MULTI_V7 + select ARM_GIC + select ARM_GLOBAL_TIMER + select CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK + select GENERIC_IRQ_CHIP + select RESET_CONTROLLER + help + This enables support for the Realtek RTD1195 SoC family. diff --git a/arch/arm/mach-realtek/Makefile b/arch/arm/mach-realtek/Makefile new file mode 100644 index 000000000000..5382d5bbdd3c --- /dev/null +++ b/arch/arm/mach-realtek/Makefile @@ -0,0 +1,2 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +obj-y += rtd1195.o diff --git a/arch/arm/mach-realtek/rtd1195.c b/arch/arm/mach-realtek/rtd1195.c new file mode 100644 index 000000000000..0381a4447384 --- /dev/null +++ b/arch/arm/mach-realtek/rtd1195.c @@ -0,0 +1,40 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Realtek RTD1195 + * + * Copyright (c) 2017-2019 Andreas Färber + */ + +#include +#include + +static void __init rtd1195_memblock_remove(phys_addr_t base, phys_addr_t size) +{ + int ret; + + ret = memblock_remove(base, size); + if (ret) + pr_err("Failed to remove memblock %pa (%d)\n", &base, ret); +} + +static void __init rtd1195_reserve(void) +{ + /* Exclude boot ROM from RAM */ + rtd1195_memblock_remove(0x00000000, 0x0000a800); + + /* Exclude peripheral register spaces from RAM */ + rtd1195_memblock_remove(0x18000000, 0x00070000); + rtd1195_memblock_remove(0x18100000, 0x01000000); +} + +static const char *const rtd1195_dt_compat[] __initconst = { + "realtek,rtd1195", + NULL +}; + +DT_MACHINE_START(rtd1195, "Realtek RTD1195") + .dt_compat = rtd1195_dt_compat, + .reserve = rtd1195_reserve, + .l2c_aux_val = 0x0, + .l2c_aux_mask = ~0x0, +MACHINE_END -- cgit v1.2.3 From 37aed36cfec3b35469be3dc5fb52c8a459414cff Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Wed, 12 Feb 2020 11:08:27 +0100 Subject: ARM: rockchip: Replace by The Rockchip platform code is not a clock provider, and just needs to call of_clk_init(). Hence it can include instead of . Signed-off-by: Geert Uytterhoeven Reviewed-by: Stephen Boyd Link: https://lore.kernel.org/r/20200212100830.446-5-geert+renesas@glider.be Signed-off-by: Heiko Stuebner --- arch/arm/mach-rockchip/rockchip.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-rockchip/rockchip.c b/arch/arm/mach-rockchip/rockchip.c index f9797a2b5d0d..beea4564eed4 100644 --- a/arch/arm/mach-rockchip/rockchip.c +++ b/arch/arm/mach-rockchip/rockchip.c @@ -9,9 +9,9 @@ #include #include #include +#include #include #include -#include #include #include #include -- cgit v1.2.3 From 0b973c65d2f2da049252bc8370e4cf037b99c7e9 Mon Sep 17 00:00:00 2001 From: Colin Ian King Date: Thu, 23 Jan 2020 00:48:07 +0000 Subject: ARM: rockchip: fix spelling mistake "to" -> "too" There is a spelling mistake in a pr_err message. Fix it. Signed-off-by: Colin Ian King Link: https://lore.kernel.org/r/20200123004807.2833556-1-colin.king@canonical.com Signed-off-by: Heiko Stuebner --- arch/arm/mach-rockchip/platsmp.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-rockchip/platsmp.c b/arch/arm/mach-rockchip/platsmp.c index 649e0a54784c..d60856898d97 100644 --- a/arch/arm/mach-rockchip/platsmp.c +++ b/arch/arm/mach-rockchip/platsmp.c @@ -180,7 +180,7 @@ static int __init rockchip_smp_prepare_sram(struct device_node *node) rsize = resource_size(&res); if (rsize < trampoline_sz) { - pr_err("%s: reserved block with size 0x%x is to small for trampoline size 0x%x\n", + pr_err("%s: reserved block with size 0x%x is too small for trampoline size 0x%x\n", __func__, rsize, trampoline_sz); return -EINVAL; } -- cgit v1.2.3 From 778627c78f01c6a05abb1211f3e3d763c236506c Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Thu, 26 Mar 2020 22:10:14 +0100 Subject: ARM: s3c64xx: convert to use i2c_new_client_device() Move away from the deprecated API and remove printing a stale 'ret' value. Signed-off-by: Wolfram Sang Acked-by: Charles Keepax Signed-off-by: Krzysztof Kozlowski --- arch/arm/mach-s3c64xx/mach-crag6410-module.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-s3c64xx/mach-crag6410-module.c b/arch/arm/mach-s3c64xx/mach-crag6410-module.c index 937d0a83f8fd..34f1baa10c54 100644 --- a/arch/arm/mach-s3c64xx/mach-crag6410-module.c +++ b/arch/arm/mach-s3c64xx/mach-crag6410-module.c @@ -405,10 +405,9 @@ static int wlf_gf_module_probe(struct i2c_client *i2c, gf_mods[i].name, rev + 1); for (j = 0; j < gf_mods[i].num_i2c_devs; j++) { - if (!i2c_new_device(i2c->adapter, - &(gf_mods[i].i2c_devs[j]))) - dev_err(&i2c->dev, - "Failed to register dev: %d\n", ret); + if (IS_ERR(i2c_new_client_device(i2c->adapter, + &(gf_mods[i].i2c_devs[j])))) + dev_err(&i2c->dev, "Failed to register\n"); } spi_register_board_info(gf_mods[i].spi_devs, -- cgit v1.2.3 From ba637aa019e038a518236bb56afcdb86ebfd269c Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Tue, 21 Jan 2020 11:37:13 +0100 Subject: ARM: integrator: Drop unneeded select of SPARSE_IRQ Support for ARM Ltd. Integrator systems depends on ARCH_MULTIPLATFORM. As the latter selects SPARSE_IRQ, there is no need for ARCH_INTEGRATOR to select SPARSE_IRQ. Signed-off-by: Geert Uytterhoeven Cc: Linus Walleij Signed-off-by: Linus Walleij --- arch/arm/mach-integrator/Kconfig | 1 - 1 file changed, 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-integrator/Kconfig b/arch/arm/mach-integrator/Kconfig index 982eabc36163..fbc35e9db46d 100644 --- a/arch/arm/mach-integrator/Kconfig +++ b/arch/arm/mach-integrator/Kconfig @@ -12,7 +12,6 @@ menuconfig ARCH_INTEGRATOR select POWER_RESET_VERSATILE select POWER_SUPPLY select SOC_INTEGRATOR_CM - select SPARSE_IRQ select VERSATILE_FPGA_IRQ help Support for ARM's Integrator platform. -- cgit v1.2.3 From 65fd41e6fa2ee0905b06379d1ef1ff52b3f27156 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Tue, 21 Jan 2020 11:37:20 +0100 Subject: ARM: realview: Drop unneeded select of multi-platform features Support for ARM Ltd. RealView systems depends on ARCH_MULTIPLATFORM, which selects USE_OF. Support for ARMv6 and ARMv7 variants depends on ARCH_MULTI_V6 or ARCH_MULTI_V7, which both select ARCH_MULTI_V6_V7 and thus MIGHT_HAVE_CACHE_L2X0. Support for ARMv7 variants depends on ARCH_MULTI_V7, which selects HAVE_SMP. Hence there is no need for the affected RealView-specific symbols to select any of them. Signed-off-by: Geert Uytterhoeven Cc: Linus Walleij Signed-off-by: Linus Walleij --- arch/arm/mach-realview/Kconfig | 8 -------- 1 file changed, 8 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-realview/Kconfig b/arch/arm/mach-realview/Kconfig index 44ebbf9ec673..0f139a20e113 100644 --- a/arch/arm/mach-realview/Kconfig +++ b/arch/arm/mach-realview/Kconfig @@ -21,7 +21,6 @@ menuconfig ARCH_REALVIEW select POWER_RESET_VERSATILE select POWER_SUPPLY select SOC_REALVIEW - select USE_OF help This enables support for ARM Ltd RealView boards. @@ -56,8 +55,6 @@ config REALVIEW_EB_ARM1176 config REALVIEW_EB_A9MP bool "Support Multicore Cortex-A9 Tile" depends on MACH_REALVIEW_EB && ARCH_MULTI_V7 - select HAVE_SMP - select MIGHT_HAVE_CACHE_L2X0 help Enable support for the Cortex-A9MPCore tile fitted to the Realview(R) Emulation Baseboard platform. @@ -66,7 +63,6 @@ config REALVIEW_EB_ARM11MP bool "Support ARM11MPCore Tile" depends on MACH_REALVIEW_EB && ARCH_MULTI_V6 select HAVE_SMP - select MIGHT_HAVE_CACHE_L2X0 help Enable support for the ARM11MPCore tile fitted to the Realview(R) Emulation Baseboard platform. @@ -75,7 +71,6 @@ config MACH_REALVIEW_PB11MP bool "Support RealView(R) Platform Baseboard for ARM11MPCore" depends on ARCH_MULTI_V6 select HAVE_SMP - select MIGHT_HAVE_CACHE_L2X0 help Include support for the ARM(R) RealView(R) Platform Baseboard for the ARM11MPCore. This platform has an on-board ARM11MPCore and has @@ -87,7 +82,6 @@ config MACH_REALVIEW_PB1176 depends on ARCH_MULTI_V6 select CPU_V6 select HAVE_TCM - select MIGHT_HAVE_CACHE_L2X0 help Include support for the ARM(R) RealView(R) Platform Baseboard for ARM1176JZF-S. @@ -103,8 +97,6 @@ config MACH_REALVIEW_PBA8 config MACH_REALVIEW_PBX bool "Support RealView(R) Platform Baseboard Explore for Cortex-A9" depends on ARCH_MULTI_V7 - select HAVE_SMP - select MIGHT_HAVE_CACHE_L2X0 select ZONE_DMA help Include support for the ARM(R) RealView(R) Platform Baseboard -- cgit v1.2.3 From db1e113578193c9f8d308cf1edfc1cb050984268 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Thu, 9 Apr 2020 16:19:52 -0600 Subject: ARM: versatile: Remove dead sched_clock code Now that there's a DT based sched_clock driver in drivers/clocksource/timer-versatile.c and all the Arm reference platforms are DT only, the non-DT versatile sched_clock code can be removed. Cc: Linus Walleij Signed-off-by: Rob Herring Link: https://lore.kernel.org/r/20200409221952.31287-1-robh@kernel.org Signed-off-by: Linus Walleij --- arch/arm/Kconfig | 1 - arch/arm/mach-realview/Kconfig | 1 - arch/arm/plat-versatile/Kconfig | 7 ------ arch/arm/plat-versatile/Makefile | 1 - arch/arm/plat-versatile/include/plat/sched_clock.h | 7 ------ arch/arm/plat-versatile/sched-clock.c | 28 ---------------------- 6 files changed, 45 deletions(-) delete mode 100644 arch/arm/plat-versatile/Kconfig delete mode 100644 arch/arm/plat-versatile/include/plat/sched_clock.h delete mode 100644 arch/arm/plat-versatile/sched-clock.c (limited to 'arch/arm') diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 66a04f6f4775..4595e5cd6602 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -735,7 +735,6 @@ source "arch/arm/mach-ux500/Kconfig" source "arch/arm/mach-versatile/Kconfig" source "arch/arm/mach-vexpress/Kconfig" -source "arch/arm/plat-versatile/Kconfig" source "arch/arm/mach-vt8500/Kconfig" diff --git a/arch/arm/mach-realview/Kconfig b/arch/arm/mach-realview/Kconfig index 0f139a20e113..0bed0d3ab364 100644 --- a/arch/arm/mach-realview/Kconfig +++ b/arch/arm/mach-realview/Kconfig @@ -16,7 +16,6 @@ menuconfig ARCH_REALVIEW select MACH_REALVIEW_EB if ARCH_MULTI_V5 select MFD_SYSCON select PLAT_VERSATILE - select PLAT_VERSATILE_SCHED_CLOCK select POWER_RESET select POWER_RESET_VERSATILE select POWER_SUPPLY diff --git a/arch/arm/plat-versatile/Kconfig b/arch/arm/plat-versatile/Kconfig deleted file mode 100644 index 748238f9f10e..000000000000 --- a/arch/arm/plat-versatile/Kconfig +++ /dev/null @@ -1,7 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0-only -if PLAT_VERSATILE - -config PLAT_VERSATILE_SCHED_CLOCK - bool - -endif diff --git a/arch/arm/plat-versatile/Makefile b/arch/arm/plat-versatile/Makefile index e856f0a4ac6e..5de44a57c4de 100644 --- a/arch/arm/plat-versatile/Makefile +++ b/arch/arm/plat-versatile/Makefile @@ -1,6 +1,5 @@ # SPDX-License-Identifier: GPL-2.0-only ccflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/$(src)/include -obj-$(CONFIG_PLAT_VERSATILE_SCHED_CLOCK) += sched-clock.o obj-$(CONFIG_SMP) += headsmp.o platsmp.o obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o diff --git a/arch/arm/plat-versatile/include/plat/sched_clock.h b/arch/arm/plat-versatile/include/plat/sched_clock.h deleted file mode 100644 index 83fdaef23c2e..000000000000 --- a/arch/arm/plat-versatile/include/plat/sched_clock.h +++ /dev/null @@ -1,7 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -#ifndef ARM_PLAT_SCHED_CLOCK_H -#define ARM_PLAT_SCHED_CLOCK_H - -void versatile_sched_clock_init(void __iomem *, unsigned long); - -#endif diff --git a/arch/arm/plat-versatile/sched-clock.c b/arch/arm/plat-versatile/sched-clock.c deleted file mode 100644 index ecb7913d2f53..000000000000 --- a/arch/arm/plat-versatile/sched-clock.c +++ /dev/null @@ -1,28 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * linux/arch/arm/plat-versatile/sched-clock.c - * - * Copyright (C) 1999 - 2003 ARM Limited - * Copyright (C) 2000 Deep Blue Solutions Ltd - */ -#include -#include -#include - -#include - -static void __iomem *ctr; - -static u64 notrace versatile_read_sched_clock(void) -{ - if (ctr) - return readl(ctr); - - return 0; -} - -void __init versatile_sched_clock_init(void __iomem *reg, unsigned long rate) -{ - ctr = reg; - sched_clock_register(versatile_read_sched_clock, 32, rate); -} -- cgit v1.2.3 From ce7107697986edff2bd7e8d0c0990d3109b5a009 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Thu, 9 Apr 2020 16:20:14 -0600 Subject: ARM: versatile: Drop mapping IB2 module registers As of commit 153969fd952d ("ARM: versatile: Drop CLCD platform data"), the IB2 module is not accessed in the platform code, so let's remove mapping it. Cc: Linus Walleij Signed-off-by: Rob Herring Link: https://lore.kernel.org/r/20200409222014.31828-1-robh@kernel.org Signed-off-by: Linus Walleij --- arch/arm/mach-versatile/versatile_dt.c | 5 ----- 1 file changed, 5 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-versatile/versatile_dt.c b/arch/arm/mach-versatile/versatile_dt.c index c00ea4f77af6..02ba68abe533 100644 --- a/arch/arm/mach-versatile/versatile_dt.c +++ b/arch/arm/mach-versatile/versatile_dt.c @@ -39,8 +39,6 @@ #define VERSATILE_MMCI0_BASE 0x10005000 /* MMC interface */ #define VERSATILE_MMCI1_BASE 0x1000B000 /* MMC Interface */ #define VERSATILE_SCTL_BASE 0x101E0000 /* System controller */ -#define VERSATILE_IB2_BASE 0x24000000 /* IB2 module */ -#define VERSATILE_IB2_CTL_BASE (VERSATILE_IB2_BASE + 0x03000000) /* * System controller bit assignment @@ -54,7 +52,6 @@ #define VERSATILE_TIMER4_EnSel 21 static void __iomem *versatile_sys_base; -static void __iomem *versatile_ib2_ctrl; unsigned int mmc_status(struct device *dev) { @@ -169,8 +166,6 @@ static void __init versatile_dt_init(void) versatile_sys_base = of_iomap(np, 0); WARN_ON(!versatile_sys_base); - versatile_ib2_ctrl = ioremap(VERSATILE_IB2_CTL_BASE, SZ_4K); - versatile_dt_pci_init(); of_platform_default_populate(NULL, versatile_auxdata_lookup, NULL); -- cgit v1.2.3 From ee9a71ad25549d28c26542d93270071e9a269408 Mon Sep 17 00:00:00 2001 From: Tang Bin Date: Sun, 19 Apr 2020 15:05:41 +0800 Subject: ARM: samsung: Omit superfluous error message in s3c_adc_probe() In the function s3c_adc_probe(), when get irq failed, the function platform_get_irq() logs an error message, so remove redundant message here. Signed-off-by: Shengju Zhang Signed-off-by: Tang Bin Signed-off-by: Krzysztof Kozlowski --- arch/arm/plat-samsung/adc.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/plat-samsung/adc.c b/arch/arm/plat-samsung/adc.c index 4f7b27239bd4..839bf7d5fee0 100644 --- a/arch/arm/plat-samsung/adc.c +++ b/arch/arm/plat-samsung/adc.c @@ -354,10 +354,8 @@ static int s3c_adc_probe(struct platform_device *pdev) } adc->irq = platform_get_irq(pdev, 1); - if (adc->irq <= 0) { - dev_err(dev, "failed to get adc irq\n"); + if (adc->irq <= 0) return -ENOENT; - } ret = devm_request_irq(dev, adc->irq, s3c_adc_irq, 0, dev_name(dev), adc); -- cgit v1.2.3 From 06b29212c3a2467ef9d25876fe82b77fa3d09ac2 Mon Sep 17 00:00:00 2001 From: Tang Bin Date: Sun, 19 Apr 2020 15:06:07 +0800 Subject: ARM: samsung: Use devm_platform_ioremap_resource() to simplify code Use devm_platform_ioremap_resource() instead of platform_get_resource() + devm_ioremap_resource(). Signed-off-by: Shengju Zhang Signed-off-by: Tang Bin Signed-off-by: Krzysztof Kozlowski --- arch/arm/plat-samsung/adc.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/plat-samsung/adc.c b/arch/arm/plat-samsung/adc.c index 839bf7d5fee0..55b1925f65d7 100644 --- a/arch/arm/plat-samsung/adc.c +++ b/arch/arm/plat-samsung/adc.c @@ -333,7 +333,6 @@ static int s3c_adc_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; struct adc_device *adc; - struct resource *regs; enum s3c_cpu_type cpu = platform_get_device_id(pdev)->driver_data; int ret; unsigned tmp; @@ -370,8 +369,7 @@ static int s3c_adc_probe(struct platform_device *pdev) return PTR_ERR(adc->clk); } - regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); - adc->regs = devm_ioremap_resource(dev, regs); + adc->regs = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(adc->regs)) return PTR_ERR(adc->regs); -- cgit v1.2.3 From d85d5247885ef2e8192287b895c2e381fa931b0b Mon Sep 17 00:00:00 2001 From: Stefan Agner Date: Sun, 29 Mar 2020 22:33:14 +0200 Subject: ARM: OMAP2+: drop unnecessary adrl The adrl instruction has been introduced with commit dd31394779aa ("ARM: omap3: Thumb-2 compatibility for sleep34xx.S"), back when this assembly file was considerably longer. Today adr seems to have enough reach, even when inserting about 60 instructions between the use site and the label. Replace adrl with conventional adr instruction. This allows to build this file using Clang's integrated assembler (which does not support the adrl pseudo instruction). Link: https://github.com/ClangBuiltLinux/linux/issues/430 Signed-off-by: Stefan Agner Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/sleep34xx.S | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-omap2/sleep34xx.S b/arch/arm/mach-omap2/sleep34xx.S index ac1324c6453b..c4e97d35c310 100644 --- a/arch/arm/mach-omap2/sleep34xx.S +++ b/arch/arm/mach-omap2/sleep34xx.S @@ -72,7 +72,7 @@ ENTRY(enable_omap3630_toggle_l2_on_restore) stmfd sp!, {lr} @ save registers on stack /* Setup so that we will disable and enable l2 */ mov r1, #0x1 - adrl r3, l2dis_3630_offset @ may be too distant for plain adr + adr r3, l2dis_3630_offset ldr r2, [r3] @ value for offset str r1, [r2, r3] @ write to l2dis_3630 ldmfd sp!, {pc} @ restore regs and return -- cgit v1.2.3 From dceb213ca4a7a8778786bb2eb49ade722a083fdc Mon Sep 17 00:00:00 2001 From: Andrey Smirnov Date: Thu, 26 Mar 2020 10:42:32 -0700 Subject: ARM: vf610: report soc info via soc device The patch adds plumbing to soc device info code necessary to support Vybrid devices. Use case in mind for this is CAAM driver, which utilizes said API. Signed-off-by: Andrey Smirnov Cc: Lucas Stach Cc: Chris Healy Cc: Shawn Guo Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Cc: linux-imx@nxp.com Tested-by: Chris Healy Reviewed-by: Fabio Estevam Signed-off-by: Shawn Guo --- arch/arm/mach-imx/cpu.c | 16 +++++++++++++ arch/arm/mach-imx/mach-vf610.c | 53 ++++++++++++++++++++++++++++++++++++++++++ arch/arm/mach-imx/mxc.h | 6 +++++ 3 files changed, 75 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/mach-imx/cpu.c b/arch/arm/mach-imx/cpu.c index 06f8d64b65af..e3d12b21d6f6 100644 --- a/arch/arm/mach-imx/cpu.c +++ b/arch/arm/mach-imx/cpu.c @@ -172,6 +172,22 @@ struct device * __init imx_soc_device_init(void) ocotp_compat = "fsl,imx7ulp-ocotp"; soc_id = "i.MX7ULP"; break; + case MXC_CPU_VF500: + ocotp_compat = "fsl,vf610-ocotp"; + soc_id = "VF500"; + break; + case MXC_CPU_VF510: + ocotp_compat = "fsl,vf610-ocotp"; + soc_id = "VF510"; + break; + case MXC_CPU_VF600: + ocotp_compat = "fsl,vf610-ocotp"; + soc_id = "VF600"; + break; + case MXC_CPU_VF610: + ocotp_compat = "fsl,vf610-ocotp"; + soc_id = "VF610"; + break; default: soc_id = "Unknown"; } diff --git a/arch/arm/mach-imx/mach-vf610.c b/arch/arm/mach-imx/mach-vf610.c index 9c929b09310c..565dc08412a2 100644 --- a/arch/arm/mach-imx/mach-vf610.c +++ b/arch/arm/mach-imx/mach-vf610.c @@ -3,11 +3,63 @@ * Copyright 2012-2013 Freescale Semiconductor, Inc. */ +#include #include +#include + #include #include #include +#include "common.h" +#include "hardware.h" + +#define MSCM_CPxCOUNT 0x00c +#define MSCM_CPxCFG1 0x014 + +static void __init vf610_detect_cpu(void) +{ + struct device_node *np; + u32 cpxcount, cpxcfg1; + unsigned int cpu_type; + void __iomem *mscm; + + np = of_find_compatible_node(NULL, NULL, "fsl,vf610-mscm-cpucfg"); + if (WARN_ON(!np)) + return; + + mscm = of_iomap(np, 0); + of_node_put(np); + + if (WARN_ON(!mscm)) + return; + + cpxcount = readl_relaxed(mscm + MSCM_CPxCOUNT); + cpxcfg1 = readl_relaxed(mscm + MSCM_CPxCFG1); + + iounmap(mscm); + + cpu_type = cpxcount ? MXC_CPU_VF600 : MXC_CPU_VF500; + + if (cpxcfg1) + cpu_type |= MXC_CPU_VFx10; + + mxc_set_cpu_type(cpu_type); +} + +static void __init vf610_init_machine(void) +{ + struct device *parent; + + vf610_detect_cpu(); + + parent = imx_soc_device_init(); + if (parent == NULL) + pr_warn("failed to initialize soc device\n"); + + of_platform_default_populate(NULL, NULL, parent); +} + static const char * const vf610_dt_compat[] __initconst = { "fsl,vf500", "fsl,vf510", @@ -20,5 +72,6 @@ static const char * const vf610_dt_compat[] __initconst = { DT_MACHINE_START(VYBRID_VF610, "Freescale Vybrid VF5xx/VF6xx (Device Tree)") .l2c_aux_val = 0, .l2c_aux_mask = ~0, + .init_machine = vf610_init_machine, .dt_compat = vf610_dt_compat, MACHINE_END diff --git a/arch/arm/mach-imx/mxc.h b/arch/arm/mach-imx/mxc.h index 2bfd2d59b4a6..48e6d781f15b 100644 --- a/arch/arm/mach-imx/mxc.h +++ b/arch/arm/mach-imx/mxc.h @@ -33,6 +33,12 @@ #define MXC_CPU_IMX7D 0x72 #define MXC_CPU_IMX7ULP 0xff +#define MXC_CPU_VFx10 0x010 +#define MXC_CPU_VF500 0x500 +#define MXC_CPU_VF510 (MXC_CPU_VF500 | MXC_CPU_VFx10) +#define MXC_CPU_VF600 0x600 +#define MXC_CPU_VF610 (MXC_CPU_VF600 | MXC_CPU_VFx10) + #define IMX_DDR_TYPE_LPDDR2 1 #ifndef __ASSEMBLY__ -- cgit v1.2.3 From 135e7a156ae2c1a7a1f0c1d44bf2b3daece04bbf Mon Sep 17 00:00:00 2001 From: Lad Prabhakar Date: Thu, 23 Apr 2020 22:40:49 +0100 Subject: ARM: shmobile: r8a7742: Basic SoC support Add minimal support for the RZ/G1H (R8A7742) SoC. Signed-off-by: Lad Prabhakar Reviewed-by: Marian-Cristian Rotariu Link: https://lore.kernel.org/r/1587678050-23468-10-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven --- arch/arm/mach-shmobile/setup-rcar-gen2.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/mach-shmobile/setup-rcar-gen2.c b/arch/arm/mach-shmobile/setup-rcar-gen2.c index 1ee5cd2840e0..c42ff8c314c8 100644 --- a/arch/arm/mach-shmobile/setup-rcar-gen2.c +++ b/arch/arm/mach-shmobile/setup-rcar-gen2.c @@ -24,6 +24,7 @@ #include "rcar-gen2.h" static const struct of_device_id cpg_matches[] __initconst = { + { .compatible = "renesas,r8a7742-cpg-mssr", .data = "extal" }, { .compatible = "renesas,r8a7743-cpg-mssr", .data = "extal" }, { .compatible = "renesas,r8a7744-cpg-mssr", .data = "extal" }, { .compatible = "renesas,r8a7790-cpg-mssr", .data = "extal" }, @@ -209,6 +210,7 @@ DT_MACHINE_START(RCAR_GEN2_DT, "Generic R-Car Gen2 (Flattened Device Tree)") MACHINE_END static const char * const rz_g1_boards_compat_dt[] __initconst = { + "renesas,r8a7742", "renesas,r8a7743", "renesas,r8a7744", "renesas,r8a7745", -- cgit v1.2.3 From e07fec6062865ae4fbc096223fbceac039b18acf Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Thu, 13 Feb 2020 15:26:29 +0100 Subject: ARM: integrator: Retire LM and IM-PD1 boardfile code We now support probing and populating logical modules and the IM-PD1 example module in particular directly from the device tree using the LM bus driver. Signed-off-by: Linus Walleij --- arch/arm/mach-integrator/Makefile | 3 +- arch/arm/mach-integrator/impd1.c | 475 ------------------------------- arch/arm/mach-integrator/impd1.h | 15 - arch/arm/mach-integrator/integrator_ap.c | 31 -- arch/arm/mach-integrator/lm.c | 96 ------- arch/arm/mach-integrator/lm.h | 24 -- 6 files changed, 1 insertion(+), 643 deletions(-) delete mode 100644 arch/arm/mach-integrator/impd1.c delete mode 100644 arch/arm/mach-integrator/impd1.h delete mode 100644 arch/arm/mach-integrator/lm.c delete mode 100644 arch/arm/mach-integrator/lm.h (limited to 'arch/arm') diff --git a/arch/arm/mach-integrator/Makefile b/arch/arm/mach-integrator/Makefile index 71b97ffe8d32..7857a55c90b0 100644 --- a/arch/arm/mach-integrator/Makefile +++ b/arch/arm/mach-integrator/Makefile @@ -5,7 +5,6 @@ # Object file lists. -obj-y := core.o lm.o +obj-y := core.o obj-$(CONFIG_ARCH_INTEGRATOR_AP) += integrator_ap.o obj-$(CONFIG_ARCH_INTEGRATOR_CP) += integrator_cp.o -obj-$(CONFIG_INTEGRATOR_IMPD1) += impd1.o diff --git a/arch/arm/mach-integrator/impd1.c b/arch/arm/mach-integrator/impd1.c deleted file mode 100644 index 6f875ded8419..000000000000 --- a/arch/arm/mach-integrator/impd1.c +++ /dev/null @@ -1,475 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/arch/arm/mach-integrator/impd1.c - * - * Copyright (C) 2003 Deep Blue Solutions Ltd, All Rights Reserved. - * - * This file provides the core support for the IM-PD1 module. - * - * Module / boot parameters. - * lmid=n impd1.lmid=n - set the logic module position in stack to 'n' - */ -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include "lm.h" -#include "impd1.h" - -static int module_id; - -module_param_named(lmid, module_id, int, 0444); -MODULE_PARM_DESC(lmid, "logic module stack position"); - -struct impd1_module { - void __iomem *base; - void __iomem *vic_base; -}; - -void impd1_tweak_control(struct device *dev, u32 mask, u32 val) -{ - struct impd1_module *impd1 = dev_get_drvdata(dev); - u32 cur; - - val &= mask; - cur = readl(impd1->base + IMPD1_CTRL) & ~mask; - writel(cur | val, impd1->base + IMPD1_CTRL); -} - -EXPORT_SYMBOL(impd1_tweak_control); - -/* - * MMC support - */ -static struct mmci_platform_data mmc_data = { - .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, -}; - -/* - * CLCD support - */ -#define PANEL PROSPECTOR - -#define LTM10C209 1 -#define PROSPECTOR 2 -#define SVGA 3 -#define VGA 4 - -#if PANEL == VGA -#define PANELTYPE vga -static struct clcd_panel vga = { - .mode = { - .name = "VGA", - .refresh = 60, - .xres = 640, - .yres = 480, - .pixclock = 39721, - .left_margin = 40, - .right_margin = 24, - .upper_margin = 32, - .lower_margin = 11, - .hsync_len = 96, - .vsync_len = 2, - .sync = 0, - .vmode = FB_VMODE_NONINTERLACED, - }, - .width = -1, - .height = -1, - .tim2 = TIM2_BCD | TIM2_IPC, - .cntl = CNTL_LCDTFT | CNTL_LCDVCOMP(1), - .caps = CLCD_CAP_5551, - .connector = IMPD1_CTRL_DISP_VGA, - .bpp = 16, - .grayscale = 0, -}; - -#elif PANEL == SVGA -#define PANELTYPE svga -static struct clcd_panel svga = { - .mode = { - .name = "SVGA", - .refresh = 0, - .xres = 800, - .yres = 600, - .pixclock = 27778, - .left_margin = 20, - .right_margin = 20, - .upper_margin = 5, - .lower_margin = 5, - .hsync_len = 164, - .vsync_len = 62, - .sync = 0, - .vmode = FB_VMODE_NONINTERLACED, - }, - .width = -1, - .height = -1, - .tim2 = TIM2_BCD, - .cntl = CNTL_LCDTFT | CNTL_LCDVCOMP(1), - .connector = IMPD1_CTRL_DISP_VGA, - .caps = CLCD_CAP_5551, - .bpp = 16, - .grayscale = 0, -}; - -#elif PANEL == PROSPECTOR -#define PANELTYPE prospector -static struct clcd_panel prospector = { - .mode = { - .name = "PROSPECTOR", - .refresh = 0, - .xres = 640, - .yres = 480, - .pixclock = 40000, - .left_margin = 33, - .right_margin = 64, - .upper_margin = 36, - .lower_margin = 7, - .hsync_len = 64, - .vsync_len = 25, - .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, - .vmode = FB_VMODE_NONINTERLACED, - }, - .width = -1, - .height = -1, - .tim2 = TIM2_BCD, - .cntl = CNTL_LCDTFT | CNTL_LCDVCOMP(1), - .caps = CLCD_CAP_5551, - .fixedtimings = 1, - .connector = IMPD1_CTRL_DISP_LCD, - .bpp = 16, - .grayscale = 0, -}; - -#elif PANEL == LTM10C209 -#define PANELTYPE ltm10c209 -/* - * Untested. - */ -static struct clcd_panel ltm10c209 = { - .mode = { - .name = "LTM10C209", - .refresh = 0, - .xres = 640, - .yres = 480, - .pixclock = 40000, - .left_margin = 20, - .right_margin = 20, - .upper_margin = 19, - .lower_margin = 19, - .hsync_len = 20, - .vsync_len = 10, - .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, - .vmode = FB_VMODE_NONINTERLACED, - }, - .width = -1, - .height = -1, - .tim2 = TIM2_BCD, - .cntl = CNTL_LCDTFT | CNTL_LCDVCOMP(1), - .caps = CLCD_CAP_5551, - .fixedtimings = 1, - .connector = IMPD1_CTRL_DISP_LCD, - .bpp = 16, - .grayscale = 0, -}; -#endif - -/* - * Disable all display connectors on the interface module. - */ -static void impd1fb_clcd_disable(struct clcd_fb *fb) -{ - impd1_tweak_control(fb->dev->dev.parent, IMPD1_CTRL_DISP_MASK, 0); -} - -/* - * Enable the relevant connector on the interface module. - */ -static void impd1fb_clcd_enable(struct clcd_fb *fb) -{ - impd1_tweak_control(fb->dev->dev.parent, IMPD1_CTRL_DISP_MASK, - fb->panel->connector | IMPD1_CTRL_DISP_ENABLE); -} - -static int impd1fb_clcd_setup(struct clcd_fb *fb) -{ - unsigned long framebase = fb->dev->res.start + 0x01000000; - unsigned long framesize = SZ_1M; - int ret = 0; - - fb->panel = &PANELTYPE; - - if (!request_mem_region(framebase, framesize, "clcd framebuffer")) { - printk(KERN_ERR "IM-PD1: unable to reserve framebuffer\n"); - return -EBUSY; - } - - fb->fb.screen_base = ioremap(framebase, framesize); - if (!fb->fb.screen_base) { - printk(KERN_ERR "IM-PD1: unable to map framebuffer\n"); - ret = -ENOMEM; - goto free_buffer; - } - - fb->fb.fix.smem_start = framebase; - fb->fb.fix.smem_len = framesize; - - return 0; - - free_buffer: - release_mem_region(framebase, framesize); - return ret; -} - -static int impd1fb_clcd_mmap(struct clcd_fb *fb, struct vm_area_struct *vma) -{ - unsigned long start, size; - - start = vma->vm_pgoff + (fb->fb.fix.smem_start >> PAGE_SHIFT); - size = vma->vm_end - vma->vm_start; - - return remap_pfn_range(vma, vma->vm_start, start, size, - vma->vm_page_prot); -} - -static void impd1fb_clcd_remove(struct clcd_fb *fb) -{ - iounmap(fb->fb.screen_base); - release_mem_region(fb->fb.fix.smem_start, fb->fb.fix.smem_len); -} - -static struct clcd_board impd1_clcd_data = { - .name = "IM-PD/1", - .caps = CLCD_CAP_5551 | CLCD_CAP_888, - .check = clcdfb_check, - .decode = clcdfb_decode, - .disable = impd1fb_clcd_disable, - .enable = impd1fb_clcd_enable, - .setup = impd1fb_clcd_setup, - .mmap = impd1fb_clcd_mmap, - .remove = impd1fb_clcd_remove, -}; - -struct impd1_device { - unsigned long offset; - unsigned int irq[2]; - unsigned int id; - void *platform_data; -}; - -static struct impd1_device impd1_devs[] = { - { - .offset = 0x00100000, - .irq = { 1 }, - .id = 0x00141011, - }, { - .offset = 0x00200000, - .irq = { 2 }, - .id = 0x00141011, - }, { - .offset = 0x00300000, - .irq = { 3 }, - .id = 0x00041022, - }, { - .offset = 0x00400000, - .irq = { 4 }, - .id = 0x00041061, - }, { - .offset = 0x00500000, - .irq = { 5 }, - .id = 0x00041061, - }, { - .offset = 0x00600000, - .irq = { 6 }, - .id = 0x00041130, - }, { - .offset = 0x00700000, - .irq = { 7, 8 }, - .id = 0x00041181, - .platform_data = &mmc_data, - }, { - .offset = 0x00800000, - .irq = { 9 }, - .id = 0x00041041, - }, { - .offset = 0x01000000, - .irq = { 11 }, - .id = 0x00041110, - .platform_data = &impd1_clcd_data, - } -}; - -/* - * Valid IRQs: 0 thru 9 and 11, 10 unused. - */ -#define IMPD1_VALID_IRQS 0x00000bffU - -/* - * As this module is bool, it is OK to have this as __ref() - no - * probe calls will be done after the initial system bootup, as devices - * are discovered as part of the machine startup. - */ -static int __ref impd1_probe(struct lm_device *dev) -{ - struct impd1_module *impd1; - int irq_base; - int i; - - if (dev->id != module_id) - return -EINVAL; - - if (!devm_request_mem_region(&dev->dev, dev->resource.start, - SZ_4K, "LM registers")) - return -EBUSY; - - impd1 = devm_kzalloc(&dev->dev, sizeof(struct impd1_module), - GFP_KERNEL); - if (!impd1) - return -ENOMEM; - - impd1->base = devm_ioremap(&dev->dev, dev->resource.start, SZ_4K); - if (!impd1->base) - return -ENOMEM; - - integrator_impd1_clk_init(impd1->base, dev->id); - - if (!devm_request_mem_region(&dev->dev, - dev->resource.start + 0x03000000, - SZ_4K, "VIC")) - return -EBUSY; - - impd1->vic_base = devm_ioremap(&dev->dev, - dev->resource.start + 0x03000000, - SZ_4K); - if (!impd1->vic_base) - return -ENOMEM; - - irq_base = vic_init_cascaded(impd1->vic_base, dev->irq, - IMPD1_VALID_IRQS, 0); - - lm_set_drvdata(dev, impd1); - - dev_info(&dev->dev, "IM-PD1 found at 0x%08lx\n", - (unsigned long)dev->resource.start); - - for (i = 0; i < ARRAY_SIZE(impd1_devs); i++) { - struct impd1_device *idev = impd1_devs + i; - struct amba_device *d; - unsigned long pc_base; - char devname[32]; - int irq1 = idev->irq[0]; - int irq2 = idev->irq[1]; - - /* Translate IRQs to IM-PD1 local numberspace */ - if (irq1) - irq1 += irq_base; - if (irq2) - irq2 += irq_base; - - pc_base = dev->resource.start + idev->offset; - snprintf(devname, 32, "lm%x:%5.5lx", dev->id, idev->offset >> 12); - - /* Add GPIO descriptor lookup table for the PL061 block */ - if (idev->offset == 0x00400000) { - struct gpiod_lookup_table *lookup; - char *chipname; - char *mmciname; - - lookup = devm_kzalloc(&dev->dev, - struct_size(lookup, table, 3), - GFP_KERNEL); - chipname = devm_kstrdup(&dev->dev, devname, GFP_KERNEL); - mmciname = devm_kasprintf(&dev->dev, GFP_KERNEL, - "lm%x:00700", dev->id); - if (!lookup || !chipname || !mmciname) - return -ENOMEM; - - lookup->dev_id = mmciname; - /* - * Offsets on GPIO block 1: - * 3 = MMC WP (write protect) - * 4 = MMC CD (card detect) - * - * Offsets on GPIO block 2: - * 0 = Up key - * 1 = Down key - * 2 = Left key - * 3 = Right key - * 4 = Key lower left - * 5 = Key lower right - */ - /* We need the two MMCI GPIO entries */ - lookup->table[0] = (struct gpiod_lookup) - GPIO_LOOKUP(chipname, 3, "wp", 0); - lookup->table[1] = (struct gpiod_lookup) - GPIO_LOOKUP(chipname, 4, "cd", GPIO_ACTIVE_LOW); - gpiod_add_lookup_table(lookup); - } - - d = amba_ahb_device_add_res(&dev->dev, devname, pc_base, SZ_4K, - irq1, irq2, - idev->platform_data, idev->id, - &dev->resource); - if (IS_ERR(d)) { - dev_err(&dev->dev, "unable to register device: %ld\n", PTR_ERR(d)); - continue; - } - } - - return 0; -} - -static int impd1_remove_one(struct device *dev, void *data) -{ - device_unregister(dev); - return 0; -} - -static void impd1_remove(struct lm_device *dev) -{ - device_for_each_child(&dev->dev, NULL, impd1_remove_one); - integrator_impd1_clk_exit(dev->id); - - lm_set_drvdata(dev, NULL); -} - -static struct lm_driver impd1_driver = { - .drv = { - .name = "impd1", - /* - * As we're dropping the probe() function, suppress driver - * binding from sysfs. - */ - .suppress_bind_attrs = true, - }, - .probe = impd1_probe, - .remove = impd1_remove, -}; - -static int __init impd1_init(void) -{ - return lm_driver_register(&impd1_driver); -} - -static void __exit impd1_exit(void) -{ - lm_driver_unregister(&impd1_driver); -} - -module_init(impd1_init); -module_exit(impd1_exit); - -MODULE_LICENSE("GPL"); -MODULE_DESCRIPTION("Integrator/IM-PD1 logic module core driver"); -MODULE_AUTHOR("Deep Blue Solutions Ltd"); diff --git a/arch/arm/mach-integrator/impd1.h b/arch/arm/mach-integrator/impd1.h deleted file mode 100644 index 36124d34c8f7..000000000000 --- a/arch/arm/mach-integrator/impd1.h +++ /dev/null @@ -1,15 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -#define IMPD1_LEDS 0x0c -#define IMPD1_INT 0x10 -#define IMPD1_SW 0x14 -#define IMPD1_CTRL 0x18 - -#define IMPD1_CTRL_DISP_LCD (0 << 0) -#define IMPD1_CTRL_DISP_VGA (1 << 0) -#define IMPD1_CTRL_DISP_LCD1 (2 << 0) -#define IMPD1_CTRL_DISP_ENABLE (1 << 2) -#define IMPD1_CTRL_DISP_MASK (7 << 0) - -struct device; - -void impd1_tweak_control(struct device *dev, u32 mask, u32 val); diff --git a/arch/arm/mach-integrator/integrator_ap.c b/arch/arm/mach-integrator/integrator_ap.c index 035069ea2c8b..58b02cbbea72 100644 --- a/arch/arm/mach-integrator/integrator_ap.c +++ b/arch/arm/mach-integrator/integrator_ap.c @@ -23,7 +23,6 @@ #include "hardware.h" #include "cm.h" #include "common.h" -#include "lm.h" /* Regmap to the AP system controller */ static struct regmap *ap_syscon_map; @@ -174,10 +173,7 @@ static const struct of_device_id ap_syscon_match[] = { static void __init ap_init_of(void) { - u32 sc_dec; struct device_node *syscon; - int ret; - int i; of_platform_default_populate(NULL, ap_auxdata_lookup, NULL); @@ -189,33 +185,6 @@ static void __init ap_init_of(void) pr_crit("could not find Integrator/AP system controller\n"); return; } - - ret = regmap_read(ap_syscon_map, - INTEGRATOR_SC_DEC_OFFSET, - &sc_dec); - if (ret) { - pr_crit("could not read from Integrator/AP syscon\n"); - return; - } - - for (i = 0; i < 4; i++) { - struct lm_device *lmdev; - - if ((sc_dec & (16 << i)) == 0) - continue; - - lmdev = kzalloc(sizeof(struct lm_device), GFP_KERNEL); - if (!lmdev) - continue; - - lmdev->resource.start = 0xc0000000 + 0x10000000 * i; - lmdev->resource.end = lmdev->resource.start + 0x0fffffff; - lmdev->resource.flags = IORESOURCE_MEM; - lmdev->irq = irq_of_parse_and_map(syscon, i); - lmdev->id = i; - - lm_device_register(lmdev); - } } static const char * ap_dt_board_compat[] = { diff --git a/arch/arm/mach-integrator/lm.c b/arch/arm/mach-integrator/lm.c deleted file mode 100644 index 55cd173d1d76..000000000000 --- a/arch/arm/mach-integrator/lm.c +++ /dev/null @@ -1,96 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/arch/arm/mach-integrator/lm.c - * - * Copyright (C) 2003 Deep Blue Solutions Ltd, All Rights Reserved. - */ -#include -#include -#include -#include - -#include "lm.h" - -#define to_lm_device(d) container_of(d, struct lm_device, dev) -#define to_lm_driver(d) container_of(d, struct lm_driver, drv) - -static int lm_match(struct device *dev, struct device_driver *drv) -{ - return 1; -} - -static int lm_bus_probe(struct device *dev) -{ - struct lm_device *lmdev = to_lm_device(dev); - struct lm_driver *lmdrv = to_lm_driver(dev->driver); - - return lmdrv->probe(lmdev); -} - -static int lm_bus_remove(struct device *dev) -{ - struct lm_device *lmdev = to_lm_device(dev); - struct lm_driver *lmdrv = to_lm_driver(dev->driver); - - if (lmdrv->remove) - lmdrv->remove(lmdev); - return 0; -} - -static struct bus_type lm_bustype = { - .name = "logicmodule", - .match = lm_match, - .probe = lm_bus_probe, - .remove = lm_bus_remove, -// .suspend = lm_bus_suspend, -// .resume = lm_bus_resume, -}; - -static int __init lm_init(void) -{ - return bus_register(&lm_bustype); -} - -postcore_initcall(lm_init); - -int lm_driver_register(struct lm_driver *drv) -{ - drv->drv.bus = &lm_bustype; - return driver_register(&drv->drv); -} - -void lm_driver_unregister(struct lm_driver *drv) -{ - driver_unregister(&drv->drv); -} - -static void lm_device_release(struct device *dev) -{ - struct lm_device *d = to_lm_device(dev); - - kfree(d); -} - -int lm_device_register(struct lm_device *dev) -{ - int ret; - - dev->dev.release = lm_device_release; - dev->dev.bus = &lm_bustype; - - ret = dev_set_name(&dev->dev, "lm%d", dev->id); - if (ret) - return ret; - dev->resource.name = dev_name(&dev->dev); - - ret = request_resource(&iomem_resource, &dev->resource); - if (ret == 0) { - ret = device_register(&dev->dev); - if (ret) - release_resource(&dev->resource); - } - return ret; -} - -EXPORT_SYMBOL(lm_driver_register); -EXPORT_SYMBOL(lm_driver_unregister); diff --git a/arch/arm/mach-integrator/lm.h b/arch/arm/mach-integrator/lm.h deleted file mode 100644 index 172966a699bd..000000000000 --- a/arch/arm/mach-integrator/lm.h +++ /dev/null @@ -1,24 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ - -struct lm_device { - struct device dev; - struct resource resource; - unsigned int irq; - unsigned int id; -}; - -struct lm_driver { - struct device_driver drv; - int (*probe)(struct lm_device *); - void (*remove)(struct lm_device *); - int (*suspend)(struct lm_device *, pm_message_t); - int (*resume)(struct lm_device *); -}; - -int lm_driver_register(struct lm_driver *drv); -void lm_driver_unregister(struct lm_driver *drv); - -int lm_device_register(struct lm_device *dev); - -#define lm_get_drvdata(lm) dev_get_drvdata(&(lm)->dev) -#define lm_set_drvdata(lm,d) dev_set_drvdata(&(lm)->dev, d) -- cgit v1.2.3 From d2854bbe5f5c4b4bec8061caf4f2e603d8819446 Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Thu, 13 Feb 2020 15:27:54 +0100 Subject: ARM: integrator: Add some Kconfig selections The CMA and DMA_CMA Kconfig options need to be selected by the Integrator in order to produce boot console on some Integrator systems. The REGULATOR and REGULATOR_FIXED_VOLTAGE need to be selected in order to boot the system from an external MMC card when using MMCI/PL181 from the device tree probe path. Select these things directly from the Kconfig so we are sure to be able to bring the systems up with console from any device tree. Signed-off-by: Linus Walleij --- arch/arm/mach-integrator/Kconfig | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-integrator/Kconfig b/arch/arm/mach-integrator/Kconfig index fbc35e9db46d..106670c37c94 100644 --- a/arch/arm/mach-integrator/Kconfig +++ b/arch/arm/mach-integrator/Kconfig @@ -4,6 +4,8 @@ menuconfig ARCH_INTEGRATOR depends on ARCH_MULTI_V4T || ARCH_MULTI_V5 || ARCH_MULTI_V6 select ARM_AMBA select COMMON_CLK_VERSATILE + select CMA + select DMA_CMA select HAVE_TCM select ICST select MFD_SYSCON @@ -34,14 +36,13 @@ config INTEGRATOR_IMPD1 select ARM_VIC select GPIO_PL061 select GPIOLIB + select REGULATOR + select REGULATOR_FIXED_VOLTAGE help The IM-PD1 is an add-on logic module for the Integrator which allows ARM(R) Ltd PrimeCells to be developed and evaluated. The IM-PD1 can be found on the Integrator/PP2 platform. - To compile this driver as a module, choose M here: the - module will be called impd1. - config INTEGRATOR_CM7TDMI bool "Integrator/CM7TDMI core module" depends on ARCH_INTEGRATOR_AP -- cgit v1.2.3 From 96866b1a1d32318b6bbc321a762bf79db1f4686e Mon Sep 17 00:00:00 2001 From: Lad Prabhakar Date: Wed, 29 Apr 2020 22:56:41 +0100 Subject: ARM: debug-ll: Add support for r8a7742 Enable low-level debugging support for RZ/G1H (R8A7742). RZ/G1H uses SCIFA2 for the debug console. Signed-off-by: Lad Prabhakar Reviewed-by: Marian-Cristian Rotariu Link: https://lore.kernel.org/r/1588197415-13747-5-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven --- arch/arm/Kconfig.debug | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index f46e18a77645..26a158e35e2c 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug @@ -976,6 +976,13 @@ choice Say Y here if you want kernel low-level debugging support via SCIF4 on Renesas RZ/G1E (R8A7745). + config DEBUG_RCAR_GEN2_SCIFA2 + bool "Kernel low-level debugging messages via SCIFA2 on R8A7742" + depends on ARCH_R8A7742 + help + Say Y here if you want kernel low-level debugging support + via SCIFA2 on Renesas RZ/G1H (R8A7742). + config DEBUG_RMOBILE_SCIFA0 bool "Kernel low-level debugging messages via SCIFA0 on R8A73A4" depends on ARCH_R8A73A4 @@ -1577,6 +1584,7 @@ config DEBUG_LL_INCLUDE default "debug/renesas-scif.S" if DEBUG_RCAR_GEN2_SCIF1 default "debug/renesas-scif.S" if DEBUG_RCAR_GEN2_SCIF2 default "debug/renesas-scif.S" if DEBUG_RCAR_GEN2_SCIF4 + default "debug/renesas-scif.S" if DEBUG_RCAR_GEN2_SCIFA2 default "debug/renesas-scif.S" if DEBUG_RMOBILE_SCIFA0 default "debug/renesas-scif.S" if DEBUG_RMOBILE_SCIFA1 default "debug/renesas-scif.S" if DEBUG_RMOBILE_SCIFA4 @@ -1696,6 +1704,7 @@ config DEBUG_UART_PHYS default 0xe4007000 if DEBUG_HIP04_UART default 0xe6c40000 if DEBUG_RMOBILE_SCIFA0 default 0xe6c50000 if DEBUG_RMOBILE_SCIFA1 + default 0xe6c60000 if DEBUG_RCAR_GEN2_SCIFA2 default 0xe6c80000 if DEBUG_RMOBILE_SCIFA4 default 0xe6e58000 if DEBUG_RCAR_GEN2_SCIF2 default 0xe6e60000 if DEBUG_RCAR_GEN2_SCIF0 @@ -1737,6 +1746,7 @@ config DEBUG_UART_PHYS DEBUG_RCAR_GEN1_SCIF0 || DEBUG_RCAR_GEN1_SCIF2 || \ DEBUG_RCAR_GEN2_SCIF0 || DEBUG_RCAR_GEN2_SCIF1 || \ DEBUG_RCAR_GEN2_SCIF2 || DEBUG_RCAR_GEN2_SCIF4 || \ + DEBUG_RCAR_GEN2_SCIFA2 || \ DEBUG_RMOBILE_SCIFA0 || DEBUG_RMOBILE_SCIFA1 || \ DEBUG_RMOBILE_SCIFA4 || DEBUG_S3C24XX_UART || \ DEBUG_S3C64XX_UART || \ -- cgit v1.2.3 From 9b06fc39084e161da84a399b6b5dc524e673f51e Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Wed, 29 Apr 2020 15:58:10 -0500 Subject: ARM: vexpress: Move vexpress_flags_set() into arch code vexpress_flags_set() is only used by the platform SMP related code and has nothing to do with the vexpress-sysreg MFD driver other than both access the same h/w block. It's also only needed for 32-bit systems and must be built-in for them. Let's move vexpress_flags_set() closer to where it is being used. This will allow for vexpress-sysreg to be built as a module. Cc: Lorenzo Pieralisi Cc: Linus Walleij Reviewed-by: Sudeep Holla Acked-by: Arnd Bergmann Acked-by: Liviu Dudau Acked-by: Lee Jones Signed-off-by: Rob Herring --- arch/arm/mach-vexpress/Kconfig | 1 - arch/arm/mach-vexpress/core.h | 1 + arch/arm/mach-vexpress/dcscb.c | 1 + arch/arm/mach-vexpress/v2m.c | 23 +++++++++++++++++++++++ drivers/mfd/vexpress-sysreg.c | 19 ------------------- include/linux/vexpress.h | 4 ---- 6 files changed, 25 insertions(+), 24 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-vexpress/Kconfig b/arch/arm/mach-vexpress/Kconfig index 726a68085c3b..18951cd20d9d 100644 --- a/arch/arm/mach-vexpress/Kconfig +++ b/arch/arm/mach-vexpress/Kconfig @@ -22,7 +22,6 @@ menuconfig ARCH_VEXPRESS select REGULATOR_FIXED_VOLTAGE if REGULATOR select VEXPRESS_CONFIG select VEXPRESS_SYSCFG - select MFD_VEXPRESS_SYSREG help This option enables support for systems using Cortex processor based ARM core and logic (FPGA) tiles on the Versatile Express motherboard, diff --git a/arch/arm/mach-vexpress/core.h b/arch/arm/mach-vexpress/core.h index f4a7519084f1..bda78675c55d 100644 --- a/arch/arm/mach-vexpress/core.h +++ b/arch/arm/mach-vexpress/core.h @@ -1,3 +1,4 @@ bool vexpress_smp_init_ops(void); +void vexpress_flags_set(u32 data); extern const struct smp_operations vexpress_smp_dt_ops; diff --git a/arch/arm/mach-vexpress/dcscb.c b/arch/arm/mach-vexpress/dcscb.c index 46a903c88c6a..a0554d7d04f7 100644 --- a/arch/arm/mach-vexpress/dcscb.c +++ b/arch/arm/mach-vexpress/dcscb.c @@ -20,6 +20,7 @@ #include #include +#include "core.h" #define RST_HOLD0 0x0 #define RST_HOLD1 0x4 diff --git a/arch/arm/mach-vexpress/v2m.c b/arch/arm/mach-vexpress/v2m.c index 95886b3bb9dd..ffe7c7a85ae9 100644 --- a/arch/arm/mach-vexpress/v2m.c +++ b/arch/arm/mach-vexpress/v2m.c @@ -1,8 +1,31 @@ // SPDX-License-Identifier: GPL-2.0 +#include +#include #include #include "core.h" +#define SYS_FLAGSSET 0x030 +#define SYS_FLAGSCLR 0x034 + +void vexpress_flags_set(u32 data) +{ + static void __iomem *base; + + if (!base) { + struct device_node *node = of_find_compatible_node(NULL, NULL, + "arm,vexpress-sysreg"); + + base = of_iomap(node, 0); + } + + if (WARN_ON(!base)) + return; + + writel(~0, base + SYS_FLAGSCLR); + writel(data, base + SYS_FLAGSSET); +} + static const char * const v2m_dt_match[] __initconst = { "arm,vexpress", NULL, diff --git a/drivers/mfd/vexpress-sysreg.c b/drivers/mfd/vexpress-sysreg.c index c68ff56dbdb1..0b9cc67706c7 100644 --- a/drivers/mfd/vexpress-sysreg.c +++ b/drivers/mfd/vexpress-sysreg.c @@ -8,7 +8,6 @@ #include #include #include -#include #include #include #include @@ -42,24 +41,6 @@ #define SYS_MISC_MASTERSITE (1 << 14) -void vexpress_flags_set(u32 data) -{ - static void __iomem *base; - - if (!base) { - struct device_node *node = of_find_compatible_node(NULL, NULL, - "arm,vexpress-sysreg"); - - base = of_iomap(node, 0); - } - - if (WARN_ON(!base)) - return; - - writel(~0, base + SYS_FLAGSCLR); - writel(data, base + SYS_FLAGSSET); -} - /* The sysreg block is just a random collection of various functions... */ static struct syscon_platform_data vexpress_sysreg_sys_id_pdata = { diff --git a/include/linux/vexpress.h b/include/linux/vexpress.h index 0e130b5077a5..2ec7992b054c 100644 --- a/include/linux/vexpress.h +++ b/include/linux/vexpress.h @@ -40,8 +40,4 @@ struct device *vexpress_config_bridge_register(struct device *parent, struct regmap *devm_regmap_init_vexpress_config(struct device *dev); -/* Platform control */ - -void vexpress_flags_set(u32 data); - #endif -- cgit v1.2.3 From 81134fb541d46d0441ce7fce557eba6c418fcc36 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Wed, 29 Apr 2020 15:58:13 -0500 Subject: clk: versatile: Rework kconfig structure CONFIG_COMMON_CLK_VERSATILE doesn't really do anything other than hiding Arm Ltd reference platform clock drivers. It is both selected by the platforms that need it and has a 'depends on' for those platforms. Let's drop the selects and convert CONFIG_COMMON_CLK_VERSATILE into a menuconfig entry. With this make CONFIG_ICST visible. Move the 'select REGMAP_MMIO' to the drivers that require it (SP810 did not). This also has the side effect of enabling CONFIG_ICST for COMPILE_TEST as it was not visible before. Cc: Catalin Marinas Cc: Will Deacon Cc: Liviu Dudau Cc: Lorenzo Pieralisi Cc: Linus Walleij Reviewed-by: Sudeep Holla Reviewed-by: Stephen Boyd Signed-off-by: Rob Herring --- arch/arm/mach-integrator/Kconfig | 1 - arch/arm/mach-realview/Kconfig | 1 - arch/arm/mach-versatile/Kconfig | 1 - arch/arm/mach-vexpress/Kconfig | 1 - arch/arm64/Kconfig.platforms | 1 - drivers/clk/Makefile | 2 +- drivers/clk/versatile/Kconfig | 22 ++++++++++++---------- 7 files changed, 13 insertions(+), 16 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-integrator/Kconfig b/arch/arm/mach-integrator/Kconfig index 982eabc36163..d59ba15a6b69 100644 --- a/arch/arm/mach-integrator/Kconfig +++ b/arch/arm/mach-integrator/Kconfig @@ -3,7 +3,6 @@ menuconfig ARCH_INTEGRATOR bool "ARM Ltd. Integrator family" depends on ARCH_MULTI_V4T || ARCH_MULTI_V5 || ARCH_MULTI_V6 select ARM_AMBA - select COMMON_CLK_VERSATILE select HAVE_TCM select ICST select MFD_SYSCON diff --git a/arch/arm/mach-realview/Kconfig b/arch/arm/mach-realview/Kconfig index 44ebbf9ec673..002404fafc14 100644 --- a/arch/arm/mach-realview/Kconfig +++ b/arch/arm/mach-realview/Kconfig @@ -6,7 +6,6 @@ menuconfig ARCH_REALVIEW select ARM_GIC select ARM_TIMER_SP804 select CLK_SP810 - select COMMON_CLK_VERSATILE select GPIO_PL061 if GPIOLIB select HAVE_ARM_SCU if SMP select HAVE_ARM_TWD if SMP diff --git a/arch/arm/mach-versatile/Kconfig b/arch/arm/mach-versatile/Kconfig index f5c275434d6c..d88e7725bf99 100644 --- a/arch/arm/mach-versatile/Kconfig +++ b/arch/arm/mach-versatile/Kconfig @@ -6,7 +6,6 @@ config ARCH_VERSATILE select ARM_TIMER_SP804 select ARM_VIC select CLKSRC_VERSATILE - select COMMON_CLK_VERSATILE select CPU_ARM926T select ICST select MFD_SYSCON diff --git a/arch/arm/mach-vexpress/Kconfig b/arch/arm/mach-vexpress/Kconfig index 18951cd20d9d..2d1fdec4c230 100644 --- a/arch/arm/mach-vexpress/Kconfig +++ b/arch/arm/mach-vexpress/Kconfig @@ -7,7 +7,6 @@ menuconfig ARCH_VEXPRESS select ARM_GIC select ARM_GLOBAL_TIMER select ARM_TIMER_SP804 - select COMMON_CLK_VERSATILE select GPIOLIB select HAVE_ARM_SCU if SMP select HAVE_ARM_TWD if SMP diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms index 5c38dc56b808..25cbb556d863 100644 --- a/arch/arm64/Kconfig.platforms +++ b/arch/arm64/Kconfig.platforms @@ -274,7 +274,6 @@ config ARCH_UNIPHIER config ARCH_VEXPRESS bool "ARMv8 software model (Versatile Express)" - select COMMON_CLK_VERSATILE select GPIOLIB select PM select PM_GENERIC_DOMAINS diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile index f4169cc2fd31..fb30c16e1596 100644 --- a/drivers/clk/Makefile +++ b/drivers/clk/Makefile @@ -114,7 +114,7 @@ obj-$(CONFIG_ARCH_TEGRA) += tegra/ obj-y += ti/ obj-$(CONFIG_CLK_UNIPHIER) += uniphier/ obj-$(CONFIG_ARCH_U8500) += ux500/ -obj-$(CONFIG_COMMON_CLK_VERSATILE) += versatile/ +obj-y += versatile/ ifeq ($(CONFIG_COMMON_CLK), y) obj-$(CONFIG_X86) += x86/ endif diff --git a/drivers/clk/versatile/Kconfig b/drivers/clk/versatile/Kconfig index c2618f1477a2..df0d50bb846c 100644 --- a/drivers/clk/versatile/Kconfig +++ b/drivers/clk/versatile/Kconfig @@ -1,22 +1,22 @@ # SPDX-License-Identifier: GPL-2.0-only -config ICST - bool -config COMMON_CLK_VERSATILE - bool "Clock driver for ARM Reference designs" - depends on ARCH_INTEGRATOR || ARCH_REALVIEW || \ - ARCH_VERSATILE || ARCH_VEXPRESS || ARM64 || \ - COMPILE_TEST +menuconfig COMMON_CLK_VERSATILE + bool "Clock driver for ARM Reference designs" if COMPILE_TEST + default y if ARCH_INTEGRATOR || ARCH_REALVIEW || \ + ARCH_VERSATILE || ARCH_VEXPRESS + +if COMMON_CLK_VERSATILE + +config ICST + bool "Clock driver for ARM Reference designs ICST" select REGMAP_MMIO ---help--- Supports clocking on ARM Reference designs: - Integrator/AP and Integrator/CP - RealView PB1176, EB, PB11MP and PBX - - Versatile Express config CLK_SP810 bool "Clock driver for ARM SP810 System Controller" - depends on COMMON_CLK_VERSATILE default y if ARCH_VEXPRESS ---help--- Supports clock muxing (REFCLK/TIMCLK to TIMERCLKEN0-3) capabilities @@ -24,10 +24,12 @@ config CLK_SP810 config CLK_VEXPRESS_OSC bool "Clock driver for Versatile Express OSC clock generators" - depends on COMMON_CLK_VERSATILE depends on VEXPRESS_CONFIG + select REGMAP_MMIO default y if ARCH_VEXPRESS ---help--- Simple regmap-based driver driving clock generators on Versatile Express platforms hidden behind its configuration infrastructure, commonly known as OSCs. + +endif -- cgit v1.2.3 From 36dc3b1a7e9dd332d224cc187acdaa9f2023a1f1 Mon Sep 17 00:00:00 2001 From: Dmitry Osipenko Date: Wed, 25 Mar 2020 01:43:33 +0300 Subject: ARM: tegra: Initialize r0 register for firmware wake-up MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Downstream kernel of ASUS TF300T sets r0 to #3. There is no explanation in downstream code whether this is really needed and some of T30 downstream kernels have and explicit comment telling that all arguments are ignored by firmware. Let's take a safe side by replicating behavior of the TF300T downstream kernel. This change works fine on Ouya and Nexus 7 devices. Tested-by: Michał Mirosław Tested-by: Jasper Korten Tested-by: David Heidelberg Tested-by: Peter Geis Signed-off-by: Dmitry Osipenko Signed-off-by: Thierry Reding --- arch/arm/mach-tegra/reset-handler.S | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-tegra/reset-handler.S b/arch/arm/mach-tegra/reset-handler.S index 53123ae4ac3b..06ca44b09381 100644 --- a/arch/arm/mach-tegra/reset-handler.S +++ b/arch/arm/mach-tegra/reset-handler.S @@ -98,7 +98,12 @@ ENTRY(tegra_resume_trusted_foundations) reteq lr .arch_extension sec - /* First call after suspend wakes firmware. No arguments required. */ + /* + * First call after suspend wakes firmware. No arguments required + * for some firmware versions. Downstream kernel of ASUS TF300T uses + * r0=3 for the wake-up notification. + */ + mov r0, #3 smc #0 b cpu_resume -- cgit v1.2.3 From 38743e414e7cc6d23f41276f298ad4781890a89f Mon Sep 17 00:00:00 2001 From: Dmitry Osipenko Date: Wed, 25 Mar 2020 01:43:34 +0300 Subject: ARM: tegra: Do not fully reinitialize L2 on resume MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit ASUS TF300T device may not work properly if firmware is asked to fully re-initialize L2 cache after resume from LP2 suspend. The downstream kernel of TF300T uses different opcode to enable cache after resuming from LP2, this opcode also works fine on Nexus 7 and Ouya devices. Supposedly, this may be needed by an older firmware versions. Reported-by: Michał Mirosław Tested-by: Michał Mirosław Tested-by: Jasper Korten Tested-by: David Heidelberg Tested-by: Peter Geis Signed-off-by: Dmitry Osipenko Signed-off-by: Thierry Reding --- arch/arm/mach-tegra/pm.c | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/mach-tegra/pm.c b/arch/arm/mach-tegra/pm.c index d1e1a61b12cf..6452ebf68d40 100644 --- a/arch/arm/mach-tegra/pm.c +++ b/arch/arm/mach-tegra/pm.c @@ -216,6 +216,8 @@ int tegra_pm_enter_lp2(void) restore_cpu_complex(); cpu_cluster_pm_exit(); + call_firmware_op(prepare_idle, TF_PM_MODE_NONE); + return err; } @@ -391,6 +393,8 @@ static int tegra_suspend_enter(suspend_state_t state) local_fiq_enable(); + call_firmware_op(prepare_idle, TF_PM_MODE_NONE); + return 0; } -- cgit v1.2.3 From 35509737c8f958944e059d501255a0bf18361ba0 Mon Sep 17 00:00:00 2001 From: Dmitry Osipenko Date: Fri, 13 Mar 2020 12:01:04 +0300 Subject: ARM: tegra: Correct PL310 Auxiliary Control Register initialization The PL310 Auxiliary Control Register shouldn't have the "Full line of zero" optimization bit being set before L2 cache is enabled. The L2X0 driver takes care of enabling the optimization by itself. This patch fixes a noisy error message on Tegra20 and Tegra30 telling that cache optimization is erroneously enabled without enabling it for the CPU: L2C-310: enabling full line of zeros but not enabled in Cortex-A9 Cc: Signed-off-by: Dmitry Osipenko Tested-by: Nicolas Chauvet Signed-off-by: Thierry Reding --- arch/arm/mach-tegra/tegra.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-tegra/tegra.c b/arch/arm/mach-tegra/tegra.c index f1ce2857a251..b620b0651157 100644 --- a/arch/arm/mach-tegra/tegra.c +++ b/arch/arm/mach-tegra/tegra.c @@ -107,8 +107,8 @@ static const char * const tegra_dt_board_compat[] = { }; DT_MACHINE_START(TEGRA_DT, "NVIDIA Tegra SoC (Flattened Device Tree)") - .l2c_aux_val = 0x3c400001, - .l2c_aux_mask = 0xc20fc3fe, + .l2c_aux_val = 0x3c400000, + .l2c_aux_mask = 0xc20fc3ff, .smp = smp_ops(tegra_smp_ops), .map_io = tegra_map_common_io, .init_early = tegra_init_early, -- cgit v1.2.3 From d3c32c04adfdb6c646722dc5fde1a3d88f293fd4 Mon Sep 17 00:00:00 2001 From: Dmitry Osipenko Date: Thu, 19 Mar 2020 22:02:23 +0300 Subject: ARM: tegra: Switch CPU to PLLP on resume from LP1 on Tegra30/114/124 The early-resume code shall not switch CPU to PLLX because PLLX configuration could be unstable or PLLX should be simply disabled if CPU enters into suspend running off some other PLL (the case if CPUFREQ driver is active). The actual burst policy is restored by the clock drivers. Acked-by: Peter De Schrijver Tested-by: Peter Geis Tested-by: Marcel Ziswiler Tested-by: Jasper Korten Tested-by: David Heidelberg Tested-by: Nicolas Chauvet Signed-off-by: Dmitry Osipenko Signed-off-by: Thierry Reding --- arch/arm/mach-tegra/sleep-tegra30.S | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-tegra/sleep-tegra30.S b/arch/arm/mach-tegra/sleep-tegra30.S index e7bcf7dc4675..9942265ed650 100644 --- a/arch/arm/mach-tegra/sleep-tegra30.S +++ b/arch/arm/mach-tegra/sleep-tegra30.S @@ -398,11 +398,8 @@ _pll_m_c_x_done: ldr r4, [r5, #0x1C] @ restore SCLK_BURST str r4, [r0, #CLK_RESET_SCLK_BURST] - cmp r10, #TEGRA30 - movweq r4, #:lower16:((1 << 28) | (0x8)) @ burst policy is PLLX - movteq r4, #:upper16:((1 << 28) | (0x8)) - movwne r4, #:lower16:((1 << 28) | (0xe)) - movtne r4, #:upper16:((1 << 28) | (0xe)) + movw r4, #:lower16:((1 << 28) | (0x4)) @ burst policy is PLLP + movt r4, #:upper16:((1 << 28) | (0x4)) str r4, [r0, #CLK_RESET_CCLK_BURST] /* Restore pad power state to normal */ -- cgit v1.2.3 From 04985d00e2c949f81dfdf4d76de97881690c6613 Mon Sep 17 00:00:00 2001 From: Dmitry Osipenko Date: Thu, 19 Mar 2020 22:02:24 +0300 Subject: ARM: tegra: Don't enable PLLX while resuming from LP1 on Tegra30 PLLX may be kept disabled if cpufreq driver selects some other clock for CPU. In that case PLLX will be disabled later in the resume path by the CLK driver, which also can enable PLLX if necessary by itself. Thus there is no need to enable PLLX early during resume. Tegra114/124 CLK drivers do not manage PLLX on resume and thus they are left untouched by this patch. Acked-by: Peter De Schrijver Tested-by: Peter Geis Tested-by: Marcel Ziswiler Tested-by: Jasper Korten Tested-by: David Heidelberg Tested-by: Nicolas Chauvet Signed-off-by: Dmitry Osipenko Signed-off-by: Thierry Reding --- arch/arm/mach-tegra/sleep-tegra30.S | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-tegra/sleep-tegra30.S b/arch/arm/mach-tegra/sleep-tegra30.S index 9942265ed650..2667bcdb5dc6 100644 --- a/arch/arm/mach-tegra/sleep-tegra30.S +++ b/arch/arm/mach-tegra/sleep-tegra30.S @@ -361,7 +361,6 @@ _no_pll_iddq_exit: pll_enable r1, r0, CLK_RESET_PLLM_BASE, CLK_RESET_PLLM_MISC pll_enable r1, r0, CLK_RESET_PLLC_BASE, CLK_RESET_PLLC_MISC - pll_enable r1, r0, CLK_RESET_PLLX_BASE, CLK_RESET_PLLX_MISC _pll_m_c_x_done: pll_enable r1, r0, CLK_RESET_PLLP_BASE, CLK_RESET_PLLP_MISC @@ -371,12 +370,18 @@ _pll_m_c_x_done: pll_locked r1, r0, CLK_RESET_PLLP_BASE pll_locked r1, r0, CLK_RESET_PLLA_BASE pll_locked r1, r0, CLK_RESET_PLLC_BASE - pll_locked r1, r0, CLK_RESET_PLLX_BASE + /* + * CPUFreq driver could select other PLL for CPU. PLLX will be + * enabled by the Tegra30 CLK driver on an as-needed basis, see + * tegra30_cpu_clock_resume(). + */ tegra_get_soc_id TEGRA_APB_MISC_BASE, r1 cmp r1, #TEGRA30 beq 1f + pll_locked r1, r0, CLK_RESET_PLLX_BASE + ldr r1, [r0, #CLK_RESET_PLLP_BASE] bic r1, r1, #(1<<31) @ disable PllP bypass str r1, [r0, #CLK_RESET_PLLP_BASE] -- cgit v1.2.3 From b9bf73aed99ed3170b37fbbf98557c70a6f19e50 Mon Sep 17 00:00:00 2001 From: Dmitry Osipenko Date: Thu, 19 Mar 2020 22:02:27 +0300 Subject: ARM: tegra: Create tegra20-cpufreq platform device on Tegra30 The tegra20-cpufreq now instantiates cpufreq-dt and Tegra30 is fully supported by that driver. Acked-by: Peter De Schrijver Tested-by: Peter Geis Tested-by: Marcel Ziswiler Tested-by: Jasper Korten Tested-by: David Heidelberg Signed-off-by: Dmitry Osipenko Signed-off-by: Thierry Reding --- arch/arm/mach-tegra/tegra.c | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/mach-tegra/tegra.c b/arch/arm/mach-tegra/tegra.c index b620b0651157..c011359bcdb4 100644 --- a/arch/arm/mach-tegra/tegra.c +++ b/arch/arm/mach-tegra/tegra.c @@ -96,6 +96,10 @@ static void __init tegra_dt_init_late(void) if (IS_ENABLED(CONFIG_ARM_TEGRA_CPUIDLE) && !psci_smp_available()) platform_device_register_simple("tegra-cpuidle", -1, NULL, 0); + + if (IS_ENABLED(CONFIG_ARCH_TEGRA_3x_SOC) && + of_machine_is_compatible("nvidia,tegra30")) + platform_device_register_simple("tegra20-cpufreq", -1, NULL, 0); } static const char * const tegra_dt_board_compat[] = { -- cgit v1.2.3 From 446937a5056fed6c8bea4306eb0249bd5c50ce5e Mon Sep 17 00:00:00 2001 From: Florian Fainelli Date: Mon, 1 Apr 2019 20:23:12 -0700 Subject: ARM: mm: Remove virtual address print from B15 RAC driver We would be trying to print the kernel virtual address of the base register address which is not very useful and is not displayed by default because of pointer restriction. Print the Device Tree node name instead which is what was originally intended. Signed-off-by: Florian Fainelli --- arch/arm/mm/cache-b15-rac.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mm/cache-b15-rac.c b/arch/arm/mm/cache-b15-rac.c index 3471fc64a3ae..bdc07030997b 100644 --- a/arch/arm/mm/cache-b15-rac.c +++ b/arch/arm/mm/cache-b15-rac.c @@ -358,8 +358,7 @@ static int __init b15_rac_init(void) set_bit(RAC_ENABLED, &b15_rac_flags); spin_unlock(&rac_lock); - pr_info("Broadcom Brahma-B15 readahead cache at: 0x%p\n", - b15_rac_base + RAC_CONFIG0_REG); + pr_info("%pOF: Broadcom Brahma-B15 readahead cache\n", dn); goto out; -- cgit v1.2.3 From 4f0f02cc4b5406a3dc0079722aaa01b31c5783f7 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Tue, 5 May 2020 17:07:19 +0200 Subject: ARM: omap2plus: Drop unneeded select of MIGHT_HAVE_CACHE_L2X0 Support for TI AM43x SoCs depends on ARCH_MULTI_V7, which selects ARCH_MULTI_V6_V7. As the latter selects MIGHT_HAVE_CACHE_L2X0, there is no need for SOC_AM43XX to select MIGHT_HAVE_CACHE_L2X0. Signed-off-by: Geert Uytterhoeven Cc: Tony Lindgren Cc: linux-omap@vger.kernel.org Acked-by: Arnd Bergmann Acked-by: Tony Lindgren Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/Kconfig | 1 - 1 file changed, 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index dca7d06c0b93..ea23205bf70f 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig @@ -66,7 +66,6 @@ config SOC_AM43XX select ARCH_OMAP2PLUS select ARM_GIC select MACH_OMAP_GENERIC - select MIGHT_HAVE_CACHE_L2X0 select HAVE_ARM_SCU select GENERIC_CLOCKEVENTS_BROADCAST select HAVE_ARM_TWD -- cgit v1.2.3 From 90d0ce39f8b088a3f227acd79d79b5ccf5a091b3 Mon Sep 17 00:00:00 2001 From: Ma Feng Date: Mon, 11 May 2020 20:21:44 +0800 Subject: ARM: omap2: make omap5_erratum_workaround_801819 static Fix sparse warning: arch/arm/mach-omap2/omap-smp.c:75:6: warning: symbol 'omap5_erratum_workaround_801819' was not declared. Should it be static? Reported-by: Hulk Robot Signed-off-by: Ma Feng Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/omap-smp.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-omap2/omap-smp.c b/arch/arm/mach-omap2/omap-smp.c index 6a82fce3f822..570a987e6d1a 100644 --- a/arch/arm/mach-omap2/omap-smp.c +++ b/arch/arm/mach-omap2/omap-smp.c @@ -72,7 +72,7 @@ void __iomem *omap4_get_scu_base(void) } #ifdef CONFIG_OMAP5_ERRATA_801819 -void omap5_erratum_workaround_801819(void) +static void omap5_erratum_workaround_801819(void) { u32 acr, revidr; u32 acr_mask; -- cgit v1.2.3 From d33e3d542b6c09a5cb4fa51d82109b2ca92e89c2 Mon Sep 17 00:00:00 2001 From: Samuel Zou Date: Tue, 12 May 2020 10:41:11 +0800 Subject: ARM: OMAP2+: pm33xx-core: Make am43xx_get_rtc_base_addr static Fix the following sparse warning: arch/arm/mach-omap2/pm33xx-core.c:270:14: warning: symbol 'am43xx_get_rtc_base_addr' was not declared. The am43xx_get_rtc_base_addr has only call site within pm33xx-core.c It should be static Fixes: 8c5a916f4c88 ("ARM: OMAP2+: sleep33/43xx: Add RTC-Mode support") Reported-by: Hulk Robot Signed-off-by: Samuel Zou Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/pm33xx-core.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-omap2/pm33xx-core.c b/arch/arm/mach-omap2/pm33xx-core.c index 5455fc98c60e..58236c7dc83e 100644 --- a/arch/arm/mach-omap2/pm33xx-core.c +++ b/arch/arm/mach-omap2/pm33xx-core.c @@ -267,7 +267,7 @@ static struct am33xx_pm_sram_addr *amx3_get_sram_addrs(void) return NULL; } -void __iomem *am43xx_get_rtc_base_addr(void) +static void __iomem *am43xx_get_rtc_base_addr(void) { rtc_oh = omap_hwmod_lookup("rtc"); -- cgit v1.2.3 From d06cfe3f123c50449a0c3ece21bc16668289c50f Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Wed, 29 Apr 2020 15:58:21 -0500 Subject: bus: vexpress-config: Merge vexpress-syscfg into vexpress-config The only thing that vexpress-syscfg does is provide a regmap to vexpress-config bus child devices. There's little reason to have 2 components for this. The current structure with initcall ordering requirements makes turning these components into modules more difficult. So let's start to simplify things and merge vexpress-syscfg into vexpress-config. There's no functional change in this commit and it's still separate components until subsequent commits. Cc: Lorenzo Pieralisi Cc: Linus Walleij Cc: Arnd Bergmann Reviewed-by: Sudeep Holla Acked-by: Greg Kroah-Hartman Acked-by: Liviu Dudau Signed-off-by: Rob Herring --- arch/arm/mach-vexpress/Kconfig | 1 - drivers/bus/vexpress-config.c | 283 +++++++++++++++++++++++++++++++++++++++-- drivers/misc/Kconfig | 9 -- drivers/misc/Makefile | 1 - drivers/misc/vexpress-syscfg.c | 280 ---------------------------------------- include/linux/vexpress.h | 17 --- 6 files changed, 274 insertions(+), 317 deletions(-) delete mode 100644 drivers/misc/vexpress-syscfg.c (limited to 'arch/arm') diff --git a/arch/arm/mach-vexpress/Kconfig b/arch/arm/mach-vexpress/Kconfig index 2d1fdec4c230..065e12991663 100644 --- a/arch/arm/mach-vexpress/Kconfig +++ b/arch/arm/mach-vexpress/Kconfig @@ -20,7 +20,6 @@ menuconfig ARCH_VEXPRESS select REGULATOR if MMC_ARMMMCI select REGULATOR_FIXED_VOLTAGE if REGULATOR select VEXPRESS_CONFIG - select VEXPRESS_SYSCFG help This option enables support for systems using Cortex processor based ARM core and logic (FPGA) tiles on the Versatile Express motherboard, diff --git a/drivers/bus/vexpress-config.c b/drivers/bus/vexpress-config.c index ff70575b2db6..43f5beac9811 100644 --- a/drivers/bus/vexpress-config.c +++ b/drivers/bus/vexpress-config.c @@ -6,10 +6,48 @@ #include #include +#include #include +#include #include +#include +#include #include +#define SYS_CFGDATA 0x0 + +#define SYS_CFGCTRL 0x4 +#define SYS_CFGCTRL_START (1 << 31) +#define SYS_CFGCTRL_WRITE (1 << 30) +#define SYS_CFGCTRL_DCC(n) (((n) & 0xf) << 26) +#define SYS_CFGCTRL_FUNC(n) (((n) & 0x3f) << 20) +#define SYS_CFGCTRL_SITE(n) (((n) & 0x3) << 16) +#define SYS_CFGCTRL_POSITION(n) (((n) & 0xf) << 12) +#define SYS_CFGCTRL_DEVICE(n) (((n) & 0xfff) << 0) + +#define SYS_CFGSTAT 0x8 +#define SYS_CFGSTAT_ERR (1 << 1) +#define SYS_CFGSTAT_COMPLETE (1 << 0) + + +struct vexpress_syscfg { + struct device *dev; + void __iomem *base; + struct list_head funcs; +}; + +struct vexpress_syscfg_func { + struct list_head list; + struct vexpress_syscfg *syscfg; + struct regmap *regmap; + int num_templates; + u32 template[]; /* Keep it last! */ +}; + +struct vexpress_config_bridge_ops { + struct regmap * (*regmap_init)(struct device *dev, void *context); + void (*regmap_exit)(struct regmap *regmap, void *context); +}; struct vexpress_config_bridge { struct vexpress_config_bridge_ops *ops; @@ -27,17 +65,12 @@ void vexpress_config_set_master(u32 site) vexpress_config_site_master = site; } -u32 vexpress_config_get_master(void) -{ - return vexpress_config_site_master; -} - -void vexpress_config_lock(void *arg) +static void vexpress_config_lock(void *arg) { mutex_lock(&vexpress_config_mutex); } -void vexpress_config_unlock(void *arg) +static void vexpress_config_unlock(void *arg) { mutex_unlock(&vexpress_config_mutex); } @@ -59,7 +92,7 @@ static void vexpress_config_find_prop(struct device_node *node, } } -int vexpress_config_get_topo(struct device_node *node, u32 *site, +static int vexpress_config_get_topo(struct device_node *node, u32 *site, u32 *position, u32 *dcc) { vexpress_config_find_prop(node, "arm,vexpress,site", site); @@ -113,7 +146,7 @@ struct regmap *devm_regmap_init_vexpress_config(struct device *dev) } EXPORT_SYMBOL_GPL(devm_regmap_init_vexpress_config); -struct device *vexpress_config_bridge_register(struct device *parent, +static struct device *vexpress_config_bridge_register(struct device *parent, struct vexpress_config_bridge_ops *ops, void *context) { struct device *dev; @@ -201,3 +234,235 @@ static int __init vexpress_config_init(void) } postcore_initcall(vexpress_config_init); +static int vexpress_syscfg_exec(struct vexpress_syscfg_func *func, + int index, bool write, u32 *data) +{ + struct vexpress_syscfg *syscfg = func->syscfg; + u32 command, status; + int tries; + long timeout; + + if (WARN_ON(index >= func->num_templates)) + return -EINVAL; + + command = readl(syscfg->base + SYS_CFGCTRL); + if (WARN_ON(command & SYS_CFGCTRL_START)) + return -EBUSY; + + command = func->template[index]; + command |= SYS_CFGCTRL_START; + command |= write ? SYS_CFGCTRL_WRITE : 0; + + /* Use a canary for reads */ + if (!write) + *data = 0xdeadbeef; + + dev_dbg(syscfg->dev, "func %p, command %x, data %x\n", + func, command, *data); + writel(*data, syscfg->base + SYS_CFGDATA); + writel(0, syscfg->base + SYS_CFGSTAT); + writel(command, syscfg->base + SYS_CFGCTRL); + mb(); + + /* The operation can take ages... Go to sleep, 100us initially */ + tries = 100; + timeout = 100; + do { + if (!irqs_disabled()) { + set_current_state(TASK_INTERRUPTIBLE); + schedule_timeout(usecs_to_jiffies(timeout)); + if (signal_pending(current)) + return -EINTR; + } else { + udelay(timeout); + } + + status = readl(syscfg->base + SYS_CFGSTAT); + if (status & SYS_CFGSTAT_ERR) + return -EFAULT; + + if (timeout > 20) + timeout -= 20; + } while (--tries && !(status & SYS_CFGSTAT_COMPLETE)); + if (WARN_ON_ONCE(!tries)) + return -ETIMEDOUT; + + if (!write) { + *data = readl(syscfg->base + SYS_CFGDATA); + dev_dbg(syscfg->dev, "func %p, read data %x\n", func, *data); + } + + return 0; +} + +static int vexpress_syscfg_read(void *context, unsigned int index, + unsigned int *val) +{ + struct vexpress_syscfg_func *func = context; + + return vexpress_syscfg_exec(func, index, false, val); +} + +static int vexpress_syscfg_write(void *context, unsigned int index, + unsigned int val) +{ + struct vexpress_syscfg_func *func = context; + + return vexpress_syscfg_exec(func, index, true, &val); +} + +static struct regmap_config vexpress_syscfg_regmap_config = { + .lock = vexpress_config_lock, + .unlock = vexpress_config_unlock, + .reg_bits = 32, + .val_bits = 32, + .reg_read = vexpress_syscfg_read, + .reg_write = vexpress_syscfg_write, + .reg_format_endian = REGMAP_ENDIAN_LITTLE, + .val_format_endian = REGMAP_ENDIAN_LITTLE, +}; + + +static struct regmap *vexpress_syscfg_regmap_init(struct device *dev, + void *context) +{ + int err; + struct vexpress_syscfg *syscfg = context; + struct vexpress_syscfg_func *func; + struct property *prop; + const __be32 *val = NULL; + __be32 energy_quirk[4]; + int num; + u32 site, position, dcc; + int i; + + err = vexpress_config_get_topo(dev->of_node, &site, + &position, &dcc); + if (err) + return ERR_PTR(err); + + prop = of_find_property(dev->of_node, + "arm,vexpress-sysreg,func", NULL); + if (!prop) + return ERR_PTR(-EINVAL); + + num = prop->length / sizeof(u32) / 2; + val = prop->value; + + /* + * "arm,vexpress-energy" function used to be described + * by its first device only, now it requires both + */ + if (num == 1 && of_device_is_compatible(dev->of_node, + "arm,vexpress-energy")) { + num = 2; + energy_quirk[0] = *val; + energy_quirk[2] = *val++; + energy_quirk[1] = *val; + energy_quirk[3] = cpu_to_be32(be32_to_cpup(val) + 1); + val = energy_quirk; + } + + func = kzalloc(struct_size(func, template, num), GFP_KERNEL); + if (!func) + return ERR_PTR(-ENOMEM); + + func->syscfg = syscfg; + func->num_templates = num; + + for (i = 0; i < num; i++) { + u32 function, device; + + function = be32_to_cpup(val++); + device = be32_to_cpup(val++); + + dev_dbg(dev, "func %p: %u/%u/%u/%u/%u\n", + func, site, position, dcc, + function, device); + + func->template[i] = SYS_CFGCTRL_DCC(dcc); + func->template[i] |= SYS_CFGCTRL_SITE(site); + func->template[i] |= SYS_CFGCTRL_POSITION(position); + func->template[i] |= SYS_CFGCTRL_FUNC(function); + func->template[i] |= SYS_CFGCTRL_DEVICE(device); + } + + vexpress_syscfg_regmap_config.max_register = num - 1; + + func->regmap = regmap_init(dev, NULL, func, + &vexpress_syscfg_regmap_config); + + if (IS_ERR(func->regmap)) { + void *err = func->regmap; + + kfree(func); + return err; + } + + list_add(&func->list, &syscfg->funcs); + + return func->regmap; +} + +static void vexpress_syscfg_regmap_exit(struct regmap *regmap, void *context) +{ + struct vexpress_syscfg *syscfg = context; + struct vexpress_syscfg_func *func, *tmp; + + regmap_exit(regmap); + + list_for_each_entry_safe(func, tmp, &syscfg->funcs, list) { + if (func->regmap == regmap) { + list_del(&syscfg->funcs); + kfree(func); + break; + } + } +} + +static struct vexpress_config_bridge_ops vexpress_syscfg_bridge_ops = { + .regmap_init = vexpress_syscfg_regmap_init, + .regmap_exit = vexpress_syscfg_regmap_exit, +}; + + +static int vexpress_syscfg_probe(struct platform_device *pdev) +{ + struct vexpress_syscfg *syscfg; + struct resource *res; + struct device *bridge; + + syscfg = devm_kzalloc(&pdev->dev, sizeof(*syscfg), GFP_KERNEL); + if (!syscfg) + return -ENOMEM; + syscfg->dev = &pdev->dev; + INIT_LIST_HEAD(&syscfg->funcs); + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + syscfg->base = devm_ioremap_resource(&pdev->dev, res); + if (IS_ERR(syscfg->base)) + return PTR_ERR(syscfg->base); + + /* Must use dev.parent (MFD), as that's where DT phandle points at... */ + bridge = vexpress_config_bridge_register(pdev->dev.parent, + &vexpress_syscfg_bridge_ops, syscfg); + + return PTR_ERR_OR_ZERO(bridge); +} + +static const struct platform_device_id vexpress_syscfg_id_table[] = { + { "vexpress-syscfg", }, + {}, +}; + +static struct platform_driver vexpress_syscfg_driver = { + .driver.name = "vexpress-syscfg", + .id_table = vexpress_syscfg_id_table, + .probe = vexpress_syscfg_probe, +}; + +static int __init vexpress_syscfg_init(void) +{ + return platform_driver_register(&vexpress_syscfg_driver); +} +core_initcall(vexpress_syscfg_init); diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig index 99e151475d8f..edd5dd5ebfdc 100644 --- a/drivers/misc/Kconfig +++ b/drivers/misc/Kconfig @@ -423,15 +423,6 @@ config SRAM config SRAM_EXEC bool -config VEXPRESS_SYSCFG - bool "Versatile Express System Configuration driver" - depends on VEXPRESS_CONFIG - default y - help - ARM Ltd. Versatile Express uses specialised platform configuration - bus. System Configuration interface is one of the possible means - of generating transactions on this bus. - config PCI_ENDPOINT_TEST depends on PCI select CRC32 diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile index 9abf2923d831..c7bd01ac6291 100644 --- a/drivers/misc/Makefile +++ b/drivers/misc/Makefile @@ -49,7 +49,6 @@ obj-$(CONFIG_SRAM_EXEC) += sram-exec.o obj-y += mic/ obj-$(CONFIG_GENWQE) += genwqe/ obj-$(CONFIG_ECHO) += echo/ -obj-$(CONFIG_VEXPRESS_SYSCFG) += vexpress-syscfg.o obj-$(CONFIG_CXL_BASE) += cxl/ obj-$(CONFIG_PCI_ENDPOINT_TEST) += pci_endpoint_test.o obj-$(CONFIG_OCXL) += ocxl/ diff --git a/drivers/misc/vexpress-syscfg.c b/drivers/misc/vexpress-syscfg.c deleted file mode 100644 index a431787c0898..000000000000 --- a/drivers/misc/vexpress-syscfg.c +++ /dev/null @@ -1,280 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * - * Copyright (C) 2014 ARM Limited - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include - - -#define SYS_CFGDATA 0x0 - -#define SYS_CFGCTRL 0x4 -#define SYS_CFGCTRL_START (1 << 31) -#define SYS_CFGCTRL_WRITE (1 << 30) -#define SYS_CFGCTRL_DCC(n) (((n) & 0xf) << 26) -#define SYS_CFGCTRL_FUNC(n) (((n) & 0x3f) << 20) -#define SYS_CFGCTRL_SITE(n) (((n) & 0x3) << 16) -#define SYS_CFGCTRL_POSITION(n) (((n) & 0xf) << 12) -#define SYS_CFGCTRL_DEVICE(n) (((n) & 0xfff) << 0) - -#define SYS_CFGSTAT 0x8 -#define SYS_CFGSTAT_ERR (1 << 1) -#define SYS_CFGSTAT_COMPLETE (1 << 0) - - -struct vexpress_syscfg { - struct device *dev; - void __iomem *base; - struct list_head funcs; -}; - -struct vexpress_syscfg_func { - struct list_head list; - struct vexpress_syscfg *syscfg; - struct regmap *regmap; - int num_templates; - u32 template[]; /* Keep it last! */ -}; - - -static int vexpress_syscfg_exec(struct vexpress_syscfg_func *func, - int index, bool write, u32 *data) -{ - struct vexpress_syscfg *syscfg = func->syscfg; - u32 command, status; - int tries; - long timeout; - - if (WARN_ON(index >= func->num_templates)) - return -EINVAL; - - command = readl(syscfg->base + SYS_CFGCTRL); - if (WARN_ON(command & SYS_CFGCTRL_START)) - return -EBUSY; - - command = func->template[index]; - command |= SYS_CFGCTRL_START; - command |= write ? SYS_CFGCTRL_WRITE : 0; - - /* Use a canary for reads */ - if (!write) - *data = 0xdeadbeef; - - dev_dbg(syscfg->dev, "func %p, command %x, data %x\n", - func, command, *data); - writel(*data, syscfg->base + SYS_CFGDATA); - writel(0, syscfg->base + SYS_CFGSTAT); - writel(command, syscfg->base + SYS_CFGCTRL); - mb(); - - /* The operation can take ages... Go to sleep, 100us initially */ - tries = 100; - timeout = 100; - do { - if (!irqs_disabled()) { - set_current_state(TASK_INTERRUPTIBLE); - schedule_timeout(usecs_to_jiffies(timeout)); - if (signal_pending(current)) - return -EINTR; - } else { - udelay(timeout); - } - - status = readl(syscfg->base + SYS_CFGSTAT); - if (status & SYS_CFGSTAT_ERR) - return -EFAULT; - - if (timeout > 20) - timeout -= 20; - } while (--tries && !(status & SYS_CFGSTAT_COMPLETE)); - if (WARN_ON_ONCE(!tries)) - return -ETIMEDOUT; - - if (!write) { - *data = readl(syscfg->base + SYS_CFGDATA); - dev_dbg(syscfg->dev, "func %p, read data %x\n", func, *data); - } - - return 0; -} - -static int vexpress_syscfg_read(void *context, unsigned int index, - unsigned int *val) -{ - struct vexpress_syscfg_func *func = context; - - return vexpress_syscfg_exec(func, index, false, val); -} - -static int vexpress_syscfg_write(void *context, unsigned int index, - unsigned int val) -{ - struct vexpress_syscfg_func *func = context; - - return vexpress_syscfg_exec(func, index, true, &val); -} - -static struct regmap_config vexpress_syscfg_regmap_config = { - .lock = vexpress_config_lock, - .unlock = vexpress_config_unlock, - .reg_bits = 32, - .val_bits = 32, - .reg_read = vexpress_syscfg_read, - .reg_write = vexpress_syscfg_write, - .reg_format_endian = REGMAP_ENDIAN_LITTLE, - .val_format_endian = REGMAP_ENDIAN_LITTLE, -}; - - -static struct regmap *vexpress_syscfg_regmap_init(struct device *dev, - void *context) -{ - int err; - struct vexpress_syscfg *syscfg = context; - struct vexpress_syscfg_func *func; - struct property *prop; - const __be32 *val = NULL; - __be32 energy_quirk[4]; - int num; - u32 site, position, dcc; - int i; - - err = vexpress_config_get_topo(dev->of_node, &site, - &position, &dcc); - if (err) - return ERR_PTR(err); - - prop = of_find_property(dev->of_node, - "arm,vexpress-sysreg,func", NULL); - if (!prop) - return ERR_PTR(-EINVAL); - - num = prop->length / sizeof(u32) / 2; - val = prop->value; - - /* - * "arm,vexpress-energy" function used to be described - * by its first device only, now it requires both - */ - if (num == 1 && of_device_is_compatible(dev->of_node, - "arm,vexpress-energy")) { - num = 2; - energy_quirk[0] = *val; - energy_quirk[2] = *val++; - energy_quirk[1] = *val; - energy_quirk[3] = cpu_to_be32(be32_to_cpup(val) + 1); - val = energy_quirk; - } - - func = kzalloc(struct_size(func, template, num), GFP_KERNEL); - if (!func) - return ERR_PTR(-ENOMEM); - - func->syscfg = syscfg; - func->num_templates = num; - - for (i = 0; i < num; i++) { - u32 function, device; - - function = be32_to_cpup(val++); - device = be32_to_cpup(val++); - - dev_dbg(dev, "func %p: %u/%u/%u/%u/%u\n", - func, site, position, dcc, - function, device); - - func->template[i] = SYS_CFGCTRL_DCC(dcc); - func->template[i] |= SYS_CFGCTRL_SITE(site); - func->template[i] |= SYS_CFGCTRL_POSITION(position); - func->template[i] |= SYS_CFGCTRL_FUNC(function); - func->template[i] |= SYS_CFGCTRL_DEVICE(device); - } - - vexpress_syscfg_regmap_config.max_register = num - 1; - - func->regmap = regmap_init(dev, NULL, func, - &vexpress_syscfg_regmap_config); - - if (IS_ERR(func->regmap)) { - void *err = func->regmap; - - kfree(func); - return err; - } - - list_add(&func->list, &syscfg->funcs); - - return func->regmap; -} - -static void vexpress_syscfg_regmap_exit(struct regmap *regmap, void *context) -{ - struct vexpress_syscfg *syscfg = context; - struct vexpress_syscfg_func *func, *tmp; - - regmap_exit(regmap); - - list_for_each_entry_safe(func, tmp, &syscfg->funcs, list) { - if (func->regmap == regmap) { - list_del(&syscfg->funcs); - kfree(func); - break; - } - } -} - -static struct vexpress_config_bridge_ops vexpress_syscfg_bridge_ops = { - .regmap_init = vexpress_syscfg_regmap_init, - .regmap_exit = vexpress_syscfg_regmap_exit, -}; - - -static int vexpress_syscfg_probe(struct platform_device *pdev) -{ - struct vexpress_syscfg *syscfg; - struct resource *res; - struct device *bridge; - - syscfg = devm_kzalloc(&pdev->dev, sizeof(*syscfg), GFP_KERNEL); - if (!syscfg) - return -ENOMEM; - syscfg->dev = &pdev->dev; - INIT_LIST_HEAD(&syscfg->funcs); - - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - syscfg->base = devm_ioremap_resource(&pdev->dev, res); - if (IS_ERR(syscfg->base)) - return PTR_ERR(syscfg->base); - - /* Must use dev.parent (MFD), as that's where DT phandle points at... */ - bridge = vexpress_config_bridge_register(pdev->dev.parent, - &vexpress_syscfg_bridge_ops, syscfg); - - return PTR_ERR_OR_ZERO(bridge); -} - -static const struct platform_device_id vexpress_syscfg_id_table[] = { - { "vexpress-syscfg", }, - {}, -}; - -static struct platform_driver vexpress_syscfg_driver = { - .driver.name = "vexpress-syscfg", - .id_table = vexpress_syscfg_id_table, - .probe = vexpress_syscfg_probe, -}; - -static int __init vexpress_syscfg_init(void) -{ - return platform_driver_register(&vexpress_syscfg_driver); -} -core_initcall(vexpress_syscfg_init); diff --git a/include/linux/vexpress.h b/include/linux/vexpress.h index 2ec7992b054c..65096c792d57 100644 --- a/include/linux/vexpress.h +++ b/include/linux/vexpress.h @@ -18,23 +18,6 @@ /* Config infrastructure */ void vexpress_config_set_master(u32 site); -u32 vexpress_config_get_master(void); - -void vexpress_config_lock(void *arg); -void vexpress_config_unlock(void *arg); - -int vexpress_config_get_topo(struct device_node *node, u32 *site, - u32 *position, u32 *dcc); - -/* Config bridge API */ - -struct vexpress_config_bridge_ops { - struct regmap * (*regmap_init)(struct device *dev, void *context); - void (*regmap_exit)(struct regmap *regmap, void *context); -}; - -struct device *vexpress_config_bridge_register(struct device *parent, - struct vexpress_config_bridge_ops *ops, void *context); /* Config regmap API */ -- cgit v1.2.3 From 848685c25da99d871bbd87369f3c3d6eead661ac Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Wed, 29 Apr 2020 15:58:25 -0500 Subject: ARM: vexpress: Don't select VEXPRESS_CONFIG CONFIG_VEXPRESS_CONFIG has 'default y if ARCH_VEXPRESS', so selecting is unnecessary. Selecting it also prevents setting CONFIG_VEXPRESS_CONFIG to a module. Cc: Lorenzo Pieralisi Cc: Linus Walleij Reviewed-by: Sudeep Holla Acked-by: Liviu Dudau Signed-off-by: Rob Herring --- arch/arm/mach-vexpress/Kconfig | 1 - 1 file changed, 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-vexpress/Kconfig b/arch/arm/mach-vexpress/Kconfig index 065e12991663..8391a5b3cd78 100644 --- a/arch/arm/mach-vexpress/Kconfig +++ b/arch/arm/mach-vexpress/Kconfig @@ -19,7 +19,6 @@ menuconfig ARCH_VEXPRESS select POWER_SUPPLY select REGULATOR if MMC_ARMMMCI select REGULATOR_FIXED_VOLTAGE if REGULATOR - select VEXPRESS_CONFIG help This option enables support for systems using Cortex processor based ARM core and logic (FPGA) tiles on the Versatile Express motherboard, -- cgit v1.2.3 From 9bffcf42c6700114d4a602370a66816c1ebd2798 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Tue, 5 May 2020 17:45:34 +0200 Subject: ARM/time: Replace by The ARM time code is not a clock provider, and just needs to call of_clk_init(). Hence it can include instead of . Link: https://lore.kernel.org/r/20200505154536.4099-2-geert+renesas@glider.be Signed-off-by: Geert Uytterhoeven Reviewed-by: Stephen Boyd Signed-off-by: Arnd Bergmann --- arch/arm/kernel/time.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/kernel/time.c b/arch/arm/kernel/time.c index dddc7ebf4db4..09b149b09c43 100644 --- a/arch/arm/kernel/time.c +++ b/arch/arm/kernel/time.c @@ -8,7 +8,6 @@ * This file contains the ARM-specific time handling details: * reading the RTC at bootup, etc... */ -#include #include #include #include @@ -17,6 +16,7 @@ #include #include #include +#include #include #include #include -- cgit v1.2.3 From 1c2f05e72adef5ace094b686aa9069b5b206be74 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Tue, 5 May 2020 17:45:35 +0200 Subject: ARM: mediatek: Replace by The Mediatek platform code is not a clock provider, and just needs to call of_clk_init(). Hence it can include instead of . Link: https://lore.kernel.org/r/20200505154536.4099-3-geert+renesas@glider.be Signed-off-by: Geert Uytterhoeven Reviewed-by: Stephen Boyd Signed-off-by: Arnd Bergmann --- arch/arm/mach-mediatek/mediatek.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-mediatek/mediatek.c b/arch/arm/mach-mediatek/mediatek.c index f6f102fa9e23..e6e9f93a1f01 100644 --- a/arch/arm/mach-mediatek/mediatek.c +++ b/arch/arm/mach-mediatek/mediatek.c @@ -9,7 +9,7 @@ #include #include #include -#include +#include #include -- cgit v1.2.3 From b5bb63177d38cfa295a9c74962519fcddca94876 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Tue, 5 May 2020 17:45:36 +0200 Subject: ARM: mmp: Replace by The Marvell MMP platform code is not a clock provider, and just needs to call of_clk_init(). Hence it can include instead of . Link: https://lore.kernel.org/r/20200505154536.4099-4-geert+renesas@glider.be Signed-off-by: Geert Uytterhoeven Reviewed-by: Stephen Boyd Acked-by: Lubomir Rintel Signed-off-by: Arnd Bergmann --- arch/arm/mach-mmp/mmp-dt.c | 2 +- arch/arm/mach-mmp/mmp2-dt.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-mmp/mmp-dt.c b/arch/arm/mach-mmp/mmp-dt.c index 91214996acec..3f43c0867dca 100644 --- a/arch/arm/mach-mmp/mmp-dt.c +++ b/arch/arm/mach-mmp/mmp-dt.c @@ -8,7 +8,7 @@ #include #include -#include +#include #include #include #include diff --git a/arch/arm/mach-mmp/mmp2-dt.c b/arch/arm/mach-mmp/mmp2-dt.c index 510c762ddc48..34a5fe4b3949 100644 --- a/arch/arm/mach-mmp/mmp2-dt.c +++ b/arch/arm/mach-mmp/mmp2-dt.c @@ -9,7 +9,7 @@ #include #include #include -#include +#include #include #include #include -- cgit v1.2.3 From 4c8a2bd23115e9871a82c92b465c6625bdd25808 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Tue, 5 May 2020 17:07:08 +0200 Subject: ARM: arch timer: Drop unneeded select GENERIC_CLOCKEVENTS The ARM Architected timer is available on ARMv7 SoCs only. As both ARCH_MULTIPLATFORM and ARM_SINGLE_ARMV7M select GENERIC_CLOCKEVENTS, there is no need for HAVE_ARM_ARCH_TIMER to select GENERIC_CLOCKEVENTS. Link: https://lore.kernel.org/r/20200505150722.1575-2-geert+renesas@glider.be Signed-off-by: Geert Uytterhoeven Signed-off-by: Arnd Bergmann --- arch/arm/Kconfig | 1 - 1 file changed, 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index d2dfb9919aea..d5cd71213128 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1246,7 +1246,6 @@ config HAVE_ARM_ARCH_TIMER bool "Architected timer support" depends on CPU_V7 select ARM_ARCH_TIMER - select GENERIC_CLOCKEVENTS help This option enables support for the ARM architected timer -- cgit v1.2.3 From 4039a44c9ee9ce09fe0ca480788b89071ee6c585 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Tue, 5 May 2020 17:07:09 +0200 Subject: ARM: actions: Drop unneeded select of COMMON_CLK MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Support for Actions Semi SoCs depends on ARCH_MULTI_V7, and thus on ARCH_MULTIPLATFORM. As the latter selects COMMON_CLK, there is no need for ARCH_ACTIONS to select COMMON_CLK. Link: https://lore.kernel.org/r/20200505150722.1575-3-geert+renesas@glider.be Signed-off-by: Geert Uytterhoeven Cc: Andreas Färber Cc: Manivannan Sadhasivam Acked-by: Arnd Bergmann Reviewed-by: Andreas Färber Signed-off-by: Arnd Bergmann --- arch/arm/mach-actions/Kconfig | 1 - 1 file changed, 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-actions/Kconfig b/arch/arm/mach-actions/Kconfig index b5e0ac965ec0..00fb4babccdd 100644 --- a/arch/arm/mach-actions/Kconfig +++ b/arch/arm/mach-actions/Kconfig @@ -7,7 +7,6 @@ menuconfig ARCH_ACTIONS select ARM_GLOBAL_TIMER select CACHE_L2X0 select CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK - select COMMON_CLK select GENERIC_IRQ_CHIP select HAVE_ARM_SCU if SMP select HAVE_ARM_TWD if SMP -- cgit v1.2.3 From 84ce0141031a80864083448ba919046393ca0eb4 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Tue, 5 May 2020 17:07:10 +0200 Subject: ARM: alpine: Drop unneeded select of HAVE_SMP Support for Annapurna Labs Alpine platforms depends on ARCH_MULTI_V7. As the latter selects HAVE_SMP, there is no need for ARCH_ALPINE to select HAVE_SMP. Link: https://lore.kernel.org/r/20200505150722.1575-4-geert+renesas@glider.be Signed-off-by: Geert Uytterhoeven Cc: Tsahee Zidenberg Cc: Antoine Tenart Acked-by: Arnd Bergmann Signed-off-by: Arnd Bergmann --- arch/arm/mach-alpine/Kconfig | 1 - 1 file changed, 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-alpine/Kconfig b/arch/arm/mach-alpine/Kconfig index bc04c91294cf..6a68a162385b 100644 --- a/arch/arm/mach-alpine/Kconfig +++ b/arch/arm/mach-alpine/Kconfig @@ -7,7 +7,6 @@ config ARCH_ALPINE select ARM_GIC select GENERIC_IRQ_CHIP select HAVE_ARM_ARCH_TIMER - select HAVE_SMP select MFD_SYSCON select FORCE_PCI select PCI_HOST_GENERIC -- cgit v1.2.3 From 80454a9908d70f76c44b28f3ec2af61aea16e0c1 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Tue, 5 May 2020 17:07:11 +0200 Subject: ARM: asm9260: Drop unneeded select of GENERIC_CLOCKEVENTS Support for the Alphascale ASM9260 platform depends on ARCH_MULTI_V5, and thus on ARCH_MULTIPLATFORM. As the latter selects GENERIC_CLOCKEVENTS, there is no need for MACH_ASM9260 to select GENERIC_CLOCKEVENTS. Link: https://lore.kernel.org/r/20200505150722.1575-5-geert+renesas@glider.be Signed-off-by: Geert Uytterhoeven Cc: Oleksij Rempel Acked-by: Arnd Bergmann Signed-off-by: Arnd Bergmann --- arch/arm/mach-asm9260/Kconfig | 1 - 1 file changed, 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-asm9260/Kconfig b/arch/arm/mach-asm9260/Kconfig index e42dbaa53bc6..a2e1d0aaf252 100644 --- a/arch/arm/mach-asm9260/Kconfig +++ b/arch/arm/mach-asm9260/Kconfig @@ -4,6 +4,5 @@ config MACH_ASM9260 depends on ARCH_MULTI_V5 select CPU_ARM926T select ASM9260_TIMER - select GENERIC_CLOCKEVENTS help Support for Alphascale ASM9260 based platform. -- cgit v1.2.3 From 9fdba09a039e9a045e6c7cd0342ff646ad8f81ff Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Tue, 5 May 2020 17:07:12 +0200 Subject: ARM: aspeed: Drop unneeded select of HAVE_SMP Support for the 6th generation Aspeed SoCs depends on ARCH_MULTI_V7. As the latter selects HAVE_SMP, there is no need for MACH_ASPEED_G6 to select HAVE_SMP. Link: https://lore.kernel.org/r/20200505150722.1575-6-geert+renesas@glider.be Signed-off-by: Geert Uytterhoeven Cc: Joel Stanley Cc: Andrew Jeffery Acked-by: Arnd Bergmann Reviewed-by: Andrew Jeffery Signed-off-by: Arnd Bergmann --- arch/arm/mach-aspeed/Kconfig | 1 - 1 file changed, 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-aspeed/Kconfig b/arch/arm/mach-aspeed/Kconfig index e8d6e9957d65..ea96d11b8502 100644 --- a/arch/arm/mach-aspeed/Kconfig +++ b/arch/arm/mach-aspeed/Kconfig @@ -39,7 +39,6 @@ config MACH_ASPEED_G6 select PINCTRL_ASPEED_G6 select ARM_GIC select HAVE_ARM_ARCH_TIMER - select HAVE_SMP help Say yes if you intend to run on an Aspeed ast2600 or similar sixth generation Aspeed BMCs. -- cgit v1.2.3 From b8c5a80689bae8c13029bde2cc605b7011a09dfe Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Tue, 5 May 2020 17:07:13 +0200 Subject: ARM: berlin: Drop unneeded select of HAVE_SMP Support for Marvell Berlin SoCs depends on ARCH_MULTI_V7. As the latter selects HAVE_SMP, there is no need for MACH_BERLIN_BG2 to select HAVE_SMP. Link: https://lore.kernel.org/r/20200505150722.1575-7-geert+renesas@glider.be Signed-off-by: Geert Uytterhoeven Cc: Jisheng Zhang Cc: Sebastian Hesselbarth Acked-by: Arnd Bergmann Signed-off-by: Arnd Bergmann --- arch/arm/mach-berlin/Kconfig | 1 - 1 file changed, 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-berlin/Kconfig b/arch/arm/mach-berlin/Kconfig index 5b1f61fd7878..01861fa72c97 100644 --- a/arch/arm/mach-berlin/Kconfig +++ b/arch/arm/mach-berlin/Kconfig @@ -19,7 +19,6 @@ config MACH_BERLIN_BG2 select CPU_PJ4B select HAVE_ARM_SCU if SMP select HAVE_ARM_TWD if SMP - select HAVE_SMP select PINCTRL_BERLIN_BG2 config MACH_BERLIN_BG2CD -- cgit v1.2.3 From 022dacdd278da6d3746c8f62ce293c67aaa7b6fc Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Tue, 5 May 2020 17:07:14 +0200 Subject: ARM: clps711x: Drop unneeded select of multi-platform selected options Support for Cirrus Logic EP721x/EP731x-based SoCs depends on ARCH_MULTI_V7, and thus on ARCH_MULTIPLATFORM. As the latter selects AUTO_ZRELADDR, TIMER_OF, COMMON_CLK, GENERIC_CLOCKEVENTS, and USE_OF, there is no need for ARCH_CLPS711X to select any of them. Link: https://lore.kernel.org/r/20200505150722.1575-8-geert+renesas@glider.be Signed-off-by: Geert Uytterhoeven Cc: Alexander Shiyan Acked-by: Arnd Bergmann Signed-off-by: Arnd Bergmann --- arch/arm/mach-clps711x/Kconfig | 5 ----- 1 file changed, 5 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-clps711x/Kconfig b/arch/arm/mach-clps711x/Kconfig index fc9188b54dd6..314de9477b84 100644 --- a/arch/arm/mach-clps711x/Kconfig +++ b/arch/arm/mach-clps711x/Kconfig @@ -2,15 +2,10 @@ menuconfig ARCH_CLPS711X bool "Cirrus Logic EP721x/EP731x-based" depends on ARCH_MULTI_V4T - select AUTO_ZRELADDR - select TIMER_OF select CLPS711X_TIMER - select COMMON_CLK select CPU_ARM720T - select GENERIC_CLOCKEVENTS select GPIOLIB select MFD_SYSCON select OF_IRQ - select USE_OF help Select this if you use ARMv4T Cirrus Logic chips. -- cgit v1.2.3 From 671ae272850484844b0897bf1c2f01a52a284dc7 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Tue, 5 May 2020 17:07:15 +0200 Subject: ARM: davinci: Drop unneeded select of TIMER_OF Support for TI DaVinci SoCs depends on ARCH_MULTI_V5, and thus on ARCH_MULTIPLATFORM. As the latter selects TIMER_OF, there is no need for MACH_DA8XX_DT to select TIMER_OF. Link: https://lore.kernel.org/r/20200505150722.1575-9-geert+renesas@glider.be Signed-off-by: Geert Uytterhoeven Cc: Sekhar Nori Cc: Bartosz Golaszewski Acked-by: Arnd Bergmann Acked-by: Sekhar Nori Signed-off-by: Arnd Bergmann --- arch/arm/mach-davinci/Kconfig | 1 - 1 file changed, 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-davinci/Kconfig b/arch/arm/mach-davinci/Kconfig index 02b180ad7245..d028d38a44bf 100644 --- a/arch/arm/mach-davinci/Kconfig +++ b/arch/arm/mach-davinci/Kconfig @@ -64,7 +64,6 @@ config MACH_DA8XX_DT default y depends on ARCH_DAVINCI_DA850 select PINCTRL - select TIMER_OF help Say y here to include support for TI DaVinci DA850 based using Flattened Device Tree. More information at Documentation/devicetree -- cgit v1.2.3 From 1942cf1cb5e233a9223c1ad1ea05aa26bce7a51c Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Tue, 5 May 2020 17:07:17 +0200 Subject: ARM: mmp: Drop unneeded select of COMMON_CLK Support for Marvell MMP ARMv5 platforms depends on ARCH_MULTI_V5, and thus on ARCH_MULTIPLATFORM. As the latter selects COMMON_CLK, there is no need for MACH_MMP_DT to select COMMON_CLK. Link: https://lore.kernel.org/r/20200505150722.1575-11-geert+renesas@glider.be Signed-off-by: Geert Uytterhoeven Cc: Lubomir Rintel Acked-by: Arnd Bergmann Acked-by: Lubomir Rintel Signed-off-by: Arnd Bergmann --- arch/arm/mach-mmp/Kconfig | 1 - 1 file changed, 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-mmp/Kconfig b/arch/arm/mach-mmp/Kconfig index b58a03b18bde..6fe1550f43ec 100644 --- a/arch/arm/mach-mmp/Kconfig +++ b/arch/arm/mach-mmp/Kconfig @@ -110,7 +110,6 @@ config MACH_MMP_DT depends on ARCH_MULTI_V5 select PINCTRL select PINCTRL_SINGLE - select COMMON_CLK select ARCH_HAS_RESET_CONTROLLER select CPU_MOHAWK help -- cgit v1.2.3 From c5b18873f5b956bd46d42effbffb1b929788190a Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Tue, 5 May 2020 17:07:18 +0200 Subject: ARM: mvebu: Drop unneeded select of HAVE_SMP Support for Marvell Armada 375, 380, 385, and 39x SoCs depends on ARCH_MULTI_V7. As the latter selects HAVE_SMP, there is no need for MACH_ARMADA_375, MACH_ARMADA_38X, and MACH_ARMADA_39X to select HAVE_SMP. Link: https://lore.kernel.org/r/20200505150722.1575-12-geert+renesas@glider.be Signed-off-by: Geert Uytterhoeven Cc: Jason Cooper Cc: Andrew Lunn Cc: Gregory Clement Cc: Sebastian Hesselbarth Acked-by: Arnd Bergmann Reviewed-by: Andrew Lunn Signed-off-by: Arnd Bergmann --- arch/arm/mach-mvebu/Kconfig | 3 --- 1 file changed, 3 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig index 7a5629b9bede..34dbeaab94b0 100644 --- a/arch/arm/mach-mvebu/Kconfig +++ b/arch/arm/mach-mvebu/Kconfig @@ -47,7 +47,6 @@ config MACH_ARMADA_375 select ARMADA_375_CLK select HAVE_ARM_SCU select HAVE_ARM_TWD if SMP - select HAVE_SMP select MACH_MVEBU_V7 select PINCTRL_ARMADA_375 help @@ -66,7 +65,6 @@ config MACH_ARMADA_38X select ARMADA_38X_CLK select HAVE_ARM_SCU select HAVE_ARM_TWD if SMP - select HAVE_SMP select MACH_MVEBU_V7 select PINCTRL_ARMADA_38X help @@ -82,7 +80,6 @@ config MACH_ARMADA_39X select CACHE_L2X0 select HAVE_ARM_SCU select HAVE_ARM_TWD if SMP - select HAVE_SMP select MACH_MVEBU_V7 select PINCTRL_ARMADA_39X help -- cgit v1.2.3 From 9fe2b45889db54fdfa9080f826e08e3bdcf0e18d Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Tue, 5 May 2020 17:07:20 +0200 Subject: ARM: prima2: Drop unneeded select of HAVE_SMP Support for CSR SiRF SoCs depends on ARCH_MULTI_V7. As the latter selects HAVE_SMP, there is no need for ARCH_ATLAS7 to select HAVE_SMP. Link: https://lore.kernel.org/r/20200505150722.1575-14-geert+renesas@glider.be Signed-off-by: Geert Uytterhoeven Cc: Barry Song Acked-by: Arnd Bergmann Signed-off-by: Arnd Bergmann --- arch/arm/mach-prima2/Kconfig | 1 - 1 file changed, 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-prima2/Kconfig b/arch/arm/mach-prima2/Kconfig index 6f66785fab01..ea077f66372d 100644 --- a/arch/arm/mach-prima2/Kconfig +++ b/arch/arm/mach-prima2/Kconfig @@ -30,7 +30,6 @@ config ARCH_ATLAS7 select ARM_GIC select ATLAS7_TIMER select HAVE_ARM_SCU if SMP - select HAVE_SMP help Support for CSR SiRFSoC ARM Cortex A7 Platform -- cgit v1.2.3 From 9d281a4f6fd61341da2fd08bf0b9449ed72b40e3 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Tue, 5 May 2020 17:07:22 +0200 Subject: ARM: socfpga: Drop unneeded select of PCI_DOMAINS_GENERIC Support for Altera SOCFPGA systems depends on ARCH_MULTI_V7, and thus on ARCH_MULTIPLATFORM. As the latter selects PCI_DOMAINS_GENERIC, there is no need for ARCH_SOCFPGA to select PCI_DOMAINS_GENERIC. Link: https://lore.kernel.org/r/20200505150722.1575-16-geert+renesas@glider.be Signed-off-by: Geert Uytterhoeven Cc: Dinh Nguyen Acked-by: Arnd Bergmann Acked-by: Dinh Nguyen Signed-off-by: Arnd Bergmann --- arch/arm/mach-socfpga/Kconfig | 1 - 1 file changed, 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-socfpga/Kconfig index 22af5e308db6..c3bb68d57cea 100644 --- a/arch/arm/mach-socfpga/Kconfig +++ b/arch/arm/mach-socfpga/Kconfig @@ -11,7 +11,6 @@ menuconfig ARCH_SOCFPGA select HAVE_ARM_SCU select HAVE_ARM_TWD if SMP select MFD_SYSCON - select PCI_DOMAINS_GENERIC if PCI select ARM_ERRATA_754322 select ARM_ERRATA_764369 if SMP select ARM_ERRATA_775420 -- cgit v1.2.3 From e69b4e1a7577c169e9f52edf977401734a6a29eb Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Thu, 7 May 2020 09:59:31 -0700 Subject: ARM: OMAP2+: Add omap_init_time_of() This allows us to move the SoCs to probe system timers one SoC at at time. As arch/arm/mach-omap2/timer.c will be eventually gone, let's just add omap_init_time_of() to board-generic.c directly. Cc: Grygorii Strashko Cc: Keerthy Cc: Lokesh Vutla Cc: Rob Herring Cc: Tero Kristo Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/board-generic.c | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c index ff992f8895ee..c6f7dcf13a15 100644 --- a/arch/arm/mach-omap2/board-generic.c +++ b/arch/arm/mach-omap2/board-generic.c @@ -12,6 +12,7 @@ #include #include #include +#include #include #include @@ -31,6 +32,13 @@ static void __init __maybe_unused omap_generic_init(void) omap_soc_device_init(); } +/* Clocks are needed early, see drivers/clocksource for the rest */ +void __init __maybe_unused omap_init_time_of(void) +{ + omap_clk_init(); + timer_probe(); +} + #ifdef CONFIG_SOC_OMAP2420 static const char *const omap242x_boards_compat[] __initconst = { "ti,omap2420", -- cgit v1.2.3 From e20ef23dd6937c38df2cfddf15270668153c8177 Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Thu, 7 May 2020 09:59:31 -0700 Subject: ARM: dts: Configure system timers for am335x We can now init system timers using the dmtimer and 32k counter based on only devicetree data and drivers/clocksource timers. Let's configure the clocksource and clockevent, and drop the old unused platform data. As we're just dropping platform data, and the early platform data init is based on the custom ti,hwmods property, we want to drop both the platform data and ti,hwmods property in a single patch. Since the dmtimer can use both 32k clock and system clock as the source, let's also configure the SoC specific default values. The board specific dts files can reconfigure these with assigned-clocks and assigned-clock-parents as needed. Cc: devicetree@vger.kernel.org Cc: Grygorii Strashko Cc: Keerthy Cc: Lokesh Vutla Cc: Rob Herring Cc: Tero Kristo Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/am33xx-l4.dtsi | 6 ++---- arch/arm/boot/dts/am33xx.dtsi | 20 ++++++++++++++++++++ arch/arm/mach-omap2/board-generic.c | 2 +- .../mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c | 2 -- arch/arm/mach-omap2/omap_hwmod_33xx_data.c | 10 ---------- 5 files changed, 23 insertions(+), 17 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/am33xx-l4.dtsi b/arch/arm/boot/dts/am33xx-l4.dtsi index 5ed7f3c58c0f..7ff11d6bf0f2 100644 --- a/arch/arm/boot/dts/am33xx-l4.dtsi +++ b/arch/arm/boot/dts/am33xx-l4.dtsi @@ -330,9 +330,8 @@ }; }; - target-module@31000 { /* 0x44e31000, ap 25 40.0 */ + timer1_target: target-module@31000 { /* 0x44e31000, ap 25 40.0 */ compatible = "ti,sysc-omap2-timer", "ti,sysc"; - ti,hwmods = "timer1"; reg = <0x31000 0x4>, <0x31010 0x4>, <0x31014 0x4>; @@ -1117,9 +1116,8 @@ }; }; - target-module@40000 { /* 0x48040000, ap 22 1e.0 */ + timer2_target: target-module@40000 { /* 0x48040000, ap 22 1e.0 */ compatible = "ti,sysc-omap4-timer", "ti,sysc"; - ti,hwmods = "timer2"; reg = <0x40000 0x4>, <0x40010 0x4>, <0x40014 0x4>; diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi index a35f5052d76f..3b177c9c4412 100644 --- a/arch/arm/boot/dts/am33xx.dtsi +++ b/arch/arm/boot/dts/am33xx.dtsi @@ -619,3 +619,23 @@ #reset-cells = <1>; }; }; + +/* Preferred always-on timer for clocksource */ +&timer1_target { + ti,no-reset-on-init; + ti,no-idle; + timer@0 { + assigned-clocks = <&timer1_fck>; + assigned-clock-parents = <&sys_clkin_ck>; + }; +}; + +/* Preferred timer for clockevent */ +&timer2_target { + ti,no-reset-on-init; + ti,no-idle; + timer@0 { + assigned-clocks = <&timer2_fck>; + assigned-clock-parents = <&sys_clkin_ck>; + }; +}; diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c index c6f7dcf13a15..cce9523eaa77 100644 --- a/arch/arm/mach-omap2/board-generic.c +++ b/arch/arm/mach-omap2/board-generic.c @@ -236,7 +236,7 @@ DT_MACHINE_START(AM33XX_DT, "Generic AM33XX (Flattened Device Tree)") .init_early = am33xx_init_early, .init_machine = omap_generic_init, .init_late = am33xx_init_late, - .init_time = omap3_gptimer_timer_init, + .init_time = omap_init_time_of, .dt_compat = am33xx_boards_compat, .restart = am33xx_restart, MACHINE_END diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c index dca5a3a7b97c..99c633338488 100644 --- a/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c @@ -367,12 +367,10 @@ struct omap_hwmod am33xx_timer2_hwmod = { static void omap_hwmod_am33xx_clkctrl(void) { - CLKCTRL(am33xx_timer2_hwmod, AM33XX_CM_PER_TIMER2_CLKCTRL_OFFSET); CLKCTRL(am33xx_smartreflex0_hwmod, AM33XX_CM_WKUP_SMARTREFLEX0_CLKCTRL_OFFSET); CLKCTRL(am33xx_smartreflex1_hwmod, AM33XX_CM_WKUP_SMARTREFLEX1_CLKCTRL_OFFSET); - CLKCTRL(am33xx_timer1_hwmod, AM33XX_CM_WKUP_TIMER1_CLKCTRL_OFFSET); CLKCTRL(am33xx_rtc_hwmod, AM33XX_CM_RTC_RTC_CLKCTRL_OFFSET); PRCM_FLAGS(am33xx_rtc_hwmod, HWMOD_OMAP4_ZERO_CLKCTRL_OFFSET); CLKCTRL(am33xx_gpmc_hwmod, AM33XX_CM_PER_GPMC_CLKCTRL_OFFSET); diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c index c64b735c8acc..3cf9c4c90b18 100644 --- a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c @@ -265,14 +265,6 @@ static struct omap_hwmod_ocp_if am33xx_l4_wkup__control = { .user = OCP_USER_MPU, }; -/* l4 wkup -> timer1 */ -static struct omap_hwmod_ocp_if am33xx_l4_wkup__timer1 = { - .master = &am33xx_l4_wkup_hwmod, - .slave = &am33xx_timer1_hwmod, - .clk = "dpll_core_m4_div2_ck", - .user = OCP_USER_MPU, -}; - static struct omap_hwmod_ocp_if *am33xx_hwmod_ocp_ifs[] __initdata = { &am33xx_l3_main__emif, &am33xx_mpu__l3_main, @@ -291,9 +283,7 @@ static struct omap_hwmod_ocp_if *am33xx_hwmod_ocp_ifs[] __initdata = { &am33xx_l4_wkup__control, &am33xx_l4_wkup__smartreflex0, &am33xx_l4_wkup__smartreflex1, - &am33xx_l4_wkup__timer1, &am33xx_l4_wkup__rtc, - &am33xx_l4_ls__timer2, &am33xx_l3_s__gpmc, &am33xx_l3_main__ocmc, NULL, -- cgit v1.2.3 From 545a95582e80a2c66527dbf7f0ae495902fc083a Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Thu, 7 May 2020 09:59:31 -0700 Subject: ARM: dts: Configure system timers for am437x We can now init system timers using the dmtimer and 32k counter based on only devicetree data and drivers/clocksource timers. Let's configure the clocksource and clockevent, and drop the old unused platform data. As we're just dropping platform data, and the early platform data init is based on the custom ti,hwmods property, we want to drop both the platform data and ti,hwmods property in a single patch. Since the dmtimer can use both 32k clock and system clock as the source, let's also configure the SoC specific default values. The board specific dts files can reconfigure these with assigned-clocks and assigned-clock-parents as needed. Cc: devicetree@vger.kernel.org Cc: Grygorii Strashko Cc: Keerthy Cc: Lokesh Vutla Cc: Rob Herring Cc: Tero Kristo Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/am4372.dtsi | 20 ++++++++ arch/arm/boot/dts/am437x-l4.dtsi | 7 +-- arch/arm/mach-omap2/board-generic.c | 2 +- .../mach-omap2/omap_hwmod_33xx_43xx_common_data.h | 2 - .../omap_hwmod_33xx_43xx_interconnect_data.c | 8 --- .../mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c | 60 ---------------------- arch/arm/mach-omap2/omap_hwmod_43xx_data.c | 45 ---------------- 7 files changed, 23 insertions(+), 121 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi index dba87bfaf33e..b4861f70f178 100644 --- a/arch/arm/boot/dts/am4372.dtsi +++ b/arch/arm/boot/dts/am4372.dtsi @@ -553,3 +553,23 @@ #reset-cells = <1>; }; }; + +/* Preferred always-on timer for clocksource */ +&timer1_target { + ti,no-reset-on-init; + ti,no-idle; + timer@0 { + assigned-clocks = <&timer1_fck>; + assigned-clock-parents = <&sys_clkin_ck>; + }; +}; + +/* Preferred timer for clockevent */ +&timer2_target { + ti,no-reset-on-init; + ti,no-idle; + timer@0 { + assigned-clocks = <&timer2_fck>; + assigned-clock-parents = <&sys_clkin_ck>; + }; +}; diff --git a/arch/arm/boot/dts/am437x-l4.dtsi b/arch/arm/boot/dts/am437x-l4.dtsi index 49c6a872052e..0d0f9fe4a882 100644 --- a/arch/arm/boot/dts/am437x-l4.dtsi +++ b/arch/arm/boot/dts/am437x-l4.dtsi @@ -328,9 +328,8 @@ }; }; - target-module@31000 { /* 0x44e31000, ap 24 40.0 */ + timer1_target: target-module@31000 { /* 0x44e31000, ap 24 40.0 */ compatible = "ti,sysc-omap2-timer", "ti,sysc"; - ti,hwmods = "timer1"; reg = <0x31000 0x4>, <0x31010 0x4>, <0x31014 0x4>; @@ -450,7 +449,6 @@ target-module@86000 { /* 0x44e86000, ap 40 70.0 */ compatible = "ti,sysc-omap2", "ti,sysc"; - ti,hwmods = "counter_32k"; reg = <0x86000 0x4>, <0x86004 0x4>; reg-names = "rev", "sysc"; @@ -868,9 +866,8 @@ }; }; - target-module@40000 { /* 0x48040000, ap 18 1e.0 */ + timer2_target: target-module@40000 { /* 0x48040000, ap 18 1e.0 */ compatible = "ti,sysc-omap4-timer", "ti,sysc"; - ti,hwmods = "timer2"; reg = <0x40000 0x4>, <0x40010 0x4>, <0x40014 0x4>; diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c index cce9523eaa77..fa299e09730d 100644 --- a/arch/arm/mach-omap2/board-generic.c +++ b/arch/arm/mach-omap2/board-generic.c @@ -308,7 +308,7 @@ DT_MACHINE_START(AM43_DT, "Generic AM43 (Flattened Device Tree)") .init_late = am43xx_init_late, .init_irq = omap_gic_of_init, .init_machine = omap_generic_init, - .init_time = omap3_gptimer_timer_init, + .init_time = omap_init_time_of, .dt_compat = am43_boards_compat, .restart = omap44xx_restart, MACHINE_END diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_common_data.h b/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_common_data.h index fa2ff41f84b9..5f4ab24dd60d 100644 --- a/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_common_data.h +++ b/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_common_data.h @@ -44,8 +44,6 @@ extern struct omap_hwmod am33xx_smartreflex0_hwmod; extern struct omap_hwmod am33xx_smartreflex1_hwmod; extern struct omap_hwmod am33xx_gpmc_hwmod; extern struct omap_hwmod am33xx_rtc_hwmod; -extern struct omap_hwmod am33xx_timer1_hwmod; -extern struct omap_hwmod am33xx_timer2_hwmod; extern struct omap_hwmod_class am33xx_emif_hwmod_class; extern struct omap_hwmod_class am33xx_l4_hwmod_class; diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_interconnect_data.c b/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_interconnect_data.c index 0ebbfbb4fb1c..b389d6589c32 100644 --- a/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_interconnect_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_interconnect_data.c @@ -106,14 +106,6 @@ struct omap_hwmod_ocp_if am33xx_l3_s__gpmc = { .user = OCP_USER_MPU, }; -/* l4 per -> timer2 */ -struct omap_hwmod_ocp_if am33xx_l4_ls__timer2 = { - .master = &am33xx_l4_ls_hwmod, - .slave = &am33xx_timer2_hwmod, - .clk = "l4ls_gclk", - .user = OCP_USER_MPU, -}; - /* l3 main -> ocmc */ struct omap_hwmod_ocp_if am33xx_l3_main__ocmc = { .master = &am33xx_l3_main_hwmod, diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c index 99c633338488..4b3cd590fb52 100644 --- a/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c @@ -307,64 +307,6 @@ struct omap_hwmod am33xx_rtc_hwmod = { }, }; -/* 'timer 2-7' class */ -static struct omap_hwmod_class_sysconfig am33xx_timer_sysc = { - .rev_offs = 0x0000, - .sysc_offs = 0x0010, - .syss_offs = 0x0014, - .sysc_flags = SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET | - SYSC_HAS_RESET_STATUS, - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | - SIDLE_SMART_WKUP), - .sysc_fields = &omap_hwmod_sysc_type2, -}; - -struct omap_hwmod_class am33xx_timer_hwmod_class = { - .name = "timer", - .sysc = &am33xx_timer_sysc, -}; - -/* timer1 1ms */ -static struct omap_hwmod_class_sysconfig am33xx_timer1ms_sysc = { - .rev_offs = 0x0000, - .sysc_offs = 0x0010, - .syss_offs = 0x0014, - .sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE | - SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE | - SYSS_HAS_RESET_STATUS), - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), - .sysc_fields = &omap_hwmod_sysc_type1, -}; - -static struct omap_hwmod_class am33xx_timer1ms_hwmod_class = { - .name = "timer", - .sysc = &am33xx_timer1ms_sysc, -}; - -struct omap_hwmod am33xx_timer1_hwmod = { - .name = "timer1", - .class = &am33xx_timer1ms_hwmod_class, - .clkdm_name = "l4_wkup_clkdm", - .main_clk = "timer1_fck", - .prcm = { - .omap4 = { - .modulemode = MODULEMODE_SWCTRL, - }, - }, -}; - -struct omap_hwmod am33xx_timer2_hwmod = { - .name = "timer2", - .class = &am33xx_timer_hwmod_class, - .clkdm_name = "l4ls_clkdm", - .main_clk = "timer2_fck", - .prcm = { - .omap4 = { - .modulemode = MODULEMODE_SWCTRL, - }, - }, -}; - static void omap_hwmod_am33xx_clkctrl(void) { CLKCTRL(am33xx_smartreflex0_hwmod, @@ -397,12 +339,10 @@ void omap_hwmod_am33xx_reg(void) static void omap_hwmod_am43xx_clkctrl(void) { - CLKCTRL(am33xx_timer2_hwmod, AM43XX_CM_PER_TIMER2_CLKCTRL_OFFSET); CLKCTRL(am33xx_smartreflex0_hwmod, AM43XX_CM_WKUP_SMARTREFLEX0_CLKCTRL_OFFSET); CLKCTRL(am33xx_smartreflex1_hwmod, AM43XX_CM_WKUP_SMARTREFLEX1_CLKCTRL_OFFSET); - CLKCTRL(am33xx_timer1_hwmod, AM43XX_CM_WKUP_TIMER1_CLKCTRL_OFFSET); CLKCTRL(am33xx_rtc_hwmod, AM43XX_CM_RTC_RTC_CLKCTRL_OFFSET); CLKCTRL(am33xx_gpmc_hwmod, AM43XX_CM_PER_GPMC_CLKCTRL_OFFSET); CLKCTRL(am33xx_l4_ls_hwmod, AM43XX_CM_PER_L4LS_CLKCTRL_OFFSET); diff --git a/arch/arm/mach-omap2/omap_hwmod_43xx_data.c b/arch/arm/mach-omap2/omap_hwmod_43xx_data.c index d2203f44af88..3f338732ee6c 100644 --- a/arch/arm/mach-omap2/omap_hwmod_43xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_43xx_data.c @@ -85,34 +85,6 @@ static struct omap_hwmod am43xx_control_hwmod = { }, }; -static struct omap_hwmod_class_sysconfig am43xx_synctimer_sysc = { - .rev_offs = 0x0, - .sysc_offs = 0x4, - .sysc_flags = SYSC_HAS_SIDLEMODE, - .idlemodes = (SIDLE_FORCE | SIDLE_NO), - .sysc_fields = &omap_hwmod_sysc_type1, -}; - -static struct omap_hwmod_class am43xx_synctimer_hwmod_class = { - .name = "synctimer", - .sysc = &am43xx_synctimer_sysc, -}; - -static struct omap_hwmod am43xx_synctimer_hwmod = { - .name = "counter_32k", - .class = &am43xx_synctimer_hwmod_class, - .clkdm_name = "l4_wkup_aon_clkdm", - .flags = HWMOD_SWSUP_SIDLE, - .main_clk = "synctimer_32kclk", - .prcm = { - .omap4 = { - .clkctrl_offs = AM43XX_CM_WKUP_SYNCTIMER_CLKCTRL_OFFSET, - .modulemode = MODULEMODE_SWCTRL, - }, - }, -}; - - static struct omap_hwmod_class_sysconfig am43xx_usb_otg_ss_sysc = { .rev_offs = 0x0000, .sysc_offs = 0x0010, @@ -206,20 +178,6 @@ static struct omap_hwmod_ocp_if am43xx_l4_wkup__control = { .user = OCP_USER_MPU, }; -static struct omap_hwmod_ocp_if am43xx_l4_wkup__timer1 = { - .master = &am33xx_l4_wkup_hwmod, - .slave = &am33xx_timer1_hwmod, - .clk = "sys_clkin_ck", - .user = OCP_USER_MPU, -}; - -static struct omap_hwmod_ocp_if am33xx_l4_wkup__synctimer = { - .master = &am33xx_l4_wkup_hwmod, - .slave = &am43xx_synctimer_hwmod, - .clk = "sys_clkin_ck", - .user = OCP_USER_MPU, -}; - static struct omap_hwmod_ocp_if am43xx_l3_s__usbotgss0 = { .master = &am33xx_l3_s_hwmod, .slave = &am43xx_usb_otg_ss0_hwmod, @@ -235,7 +193,6 @@ static struct omap_hwmod_ocp_if am43xx_l3_s__usbotgss1 = { }; static struct omap_hwmod_ocp_if *am43xx_hwmod_ocp_ifs[] __initdata = { - &am33xx_l4_wkup__synctimer, &am33xx_mpu__l3_main, &am33xx_mpu__prcm, &am33xx_l3_s__l4_ls, @@ -252,8 +209,6 @@ static struct omap_hwmod_ocp_if *am43xx_hwmod_ocp_ifs[] __initdata = { &am43xx_l4_wkup__control, &am43xx_l4_wkup__smartreflex0, &am43xx_l4_wkup__smartreflex1, - &am43xx_l4_wkup__timer1, - &am33xx_l4_ls__timer2, &am33xx_l3_s__gpmc, &am33xx_l3_main__ocmc, &am43xx_l3_s__usbotgss0, -- cgit v1.2.3 From 14b1925a721992d781f5e9d28db26b85174e3927 Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Thu, 7 May 2020 09:59:31 -0700 Subject: ARM: dts: Configure system timers for omap4 We can now init system timers using the dmtimer and 32k counter based on only devicetree data and drivers/clocksource timers. Let's configure the clocksource and clockevent, and drop the old unused platform data. As we're just dropping platform data, and the early platform data init is based on the custom ti,hwmods property, we want to drop both the platform data and ti,hwmods property in a single patch. Since the dmtimer can use both 32k clock and system clock as the source, let's also configure the SoC specific default values. The board specific dts files can reconfigure these with assigned-clocks and assigned-clock-parents as needed. Cc: devicetree@vger.kernel.org Cc: Grygorii Strashko Cc: Keerthy Cc: Lokesh Vutla Cc: Rob Herring Cc: Tero Kristo Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/omap4-l4.dtsi | 4 +- arch/arm/boot/dts/omap4.dtsi | 10 ++++ arch/arm/mach-omap2/board-generic.c | 2 +- arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 90 ------------------------------ 4 files changed, 12 insertions(+), 94 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/omap4-l4.dtsi b/arch/arm/boot/dts/omap4-l4.dtsi index ef59e4e97d7c..fcc52121ff09 100644 --- a/arch/arm/boot/dts/omap4-l4.dtsi +++ b/arch/arm/boot/dts/omap4-l4.dtsi @@ -974,7 +974,6 @@ target-module@4000 { /* 0x4a304000, ap 17 24.0 */ compatible = "ti,sysc-omap2", "ti,sysc"; - ti,hwmods = "counter_32k"; reg = <0x4000 0x4>, <0x4004 0x4>; reg-names = "rev", "sysc"; @@ -1139,9 +1138,8 @@ }; }; - target-module@8000 { /* 0x4a318000, ap 9 1c.0 */ + timer1_target: target-module@8000 { /* 0x4a318000, ap 9 1c.0 */ compatible = "ti,sysc-omap2-timer", "ti,sysc"; - ti,hwmods = "timer1"; reg = <0x8000 0x4>, <0x8010 0x4>, <0x8014 0x4>; diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi index 763bdea8c829..6c2b07f0704d 100644 --- a/arch/arm/boot/dts/omap4.dtsi +++ b/arch/arm/boot/dts/omap4.dtsi @@ -655,3 +655,13 @@ #reset-cells = <1>; }; }; + +/* Preferred always-on timer for clockevent */ +&timer1_target { + ti,no-reset-on-init; + ti,no-idle; + timer@0 { + assigned-clocks = <&l4_wkup_clkctrl OMAP4_TIMER1_CLKCTRL 24>; + assigned-clock-parents = <&sys_clkin_ck>; + }; +}; diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c index fa299e09730d..4818fd429f98 100644 --- a/arch/arm/mach-omap2/board-generic.c +++ b/arch/arm/mach-omap2/board-generic.c @@ -261,7 +261,7 @@ DT_MACHINE_START(OMAP4_DT, "Generic OMAP4 (Flattened Device Tree)") .init_irq = omap_gic_of_init, .init_machine = omap_generic_init, .init_late = omap4430_init_late, - .init_time = omap4_local_timer_init, + .init_time = omap_init_time_of, .dt_compat = omap4_boards_compat, .restart = omap44xx_restart, MACHINE_END diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c index 33f6596c03f7..de13c46b984f 100644 --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c @@ -231,39 +231,6 @@ static struct omap_hwmod omap44xx_ocp_wp_noc_hwmod = { * usim */ -/* - * 'counter' class - * 32-bit ordinary counter, clocked by the falling edge of the 32 khz clock - */ - -static struct omap_hwmod_class_sysconfig omap44xx_counter_sysc = { - .rev_offs = 0x0000, - .sysc_offs = 0x0004, - .sysc_flags = SYSC_HAS_SIDLEMODE, - .idlemodes = (SIDLE_FORCE | SIDLE_NO), - .sysc_fields = &omap_hwmod_sysc_type1, -}; - -static struct omap_hwmod_class omap44xx_counter_hwmod_class = { - .name = "counter", - .sysc = &omap44xx_counter_sysc, -}; - -/* counter_32k */ -static struct omap_hwmod omap44xx_counter_32k_hwmod = { - .name = "counter_32k", - .class = &omap44xx_counter_hwmod_class, - .clkdm_name = "l4_wkup_clkdm", - .flags = HWMOD_SWSUP_SIDLE, - .main_clk = "sys_32k_ck", - .prcm = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_WKUP_SYNCTIMER_CLKCTRL_OFFSET, - .context_offs = OMAP4_RM_WKUP_SYNCTIMER_CONTEXT_OFFSET, - }, - }, -}; - /* * 'ctrl_module' class * attila core control module + core pad control module + wkup pad control @@ -672,45 +639,6 @@ static struct omap_hwmod omap44xx_sl2if_hwmod = { }, }; -/* - * 'timer' class - * general purpose timer module with accurate 1ms tick - * This class contains several variants: ['timer_1ms', 'timer'] - */ - -static struct omap_hwmod_class_sysconfig omap44xx_timer_1ms_sysc = { - .rev_offs = 0x0000, - .sysc_offs = 0x0010, - .syss_offs = 0x0014, - .sysc_flags = (SYSC_HAS_AUTOIDLE | SYSC_HAS_CLOCKACTIVITY | - SYSC_HAS_EMUFREE | SYSC_HAS_ENAWAKEUP | - SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET | - SYSS_HAS_RESET_STATUS), - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), - .sysc_fields = &omap_hwmod_sysc_type1, -}; - -static struct omap_hwmod_class omap44xx_timer_1ms_hwmod_class = { - .name = "timer", - .sysc = &omap44xx_timer_1ms_sysc, -}; - -/* timer1 */ -static struct omap_hwmod omap44xx_timer1_hwmod = { - .name = "timer1", - .class = &omap44xx_timer_1ms_hwmod_class, - .clkdm_name = "l4_wkup_clkdm", - .flags = HWMOD_SET_DEFAULT_CLOCKACT, - .main_clk = "dmt1_clk_mux", - .prcm = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_WKUP_TIMER1_CLKCTRL_OFFSET, - .context_offs = OMAP4_RM_WKUP_TIMER1_CONTEXT_OFFSET, - .modulemode = MODULEMODE_SWCTRL, - }, - }, -}; - /* * 'usb_host_fs' class * full-speed usb host controller @@ -1063,14 +991,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__ocp_wp_noc = { .user = OCP_USER_MPU | OCP_USER_SDMA, }; -/* l4_wkup -> counter_32k */ -static struct omap_hwmod_ocp_if omap44xx_l4_wkup__counter_32k = { - .master = &omap44xx_l4_wkup_hwmod, - .slave = &omap44xx_counter_32k_hwmod, - .clk = "l4_wkup_clk_mux_ck", - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - /* l4_cfg -> ctrl_module_core */ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__ctrl_module_core = { .master = &omap44xx_l4_cfg_hwmod, @@ -1199,14 +1119,6 @@ static struct omap_hwmod_ocp_if __maybe_unused omap44xx_l3_main_2__sl2if = { .user = OCP_USER_MPU | OCP_USER_SDMA, }; -/* l4_wkup -> timer1 */ -static struct omap_hwmod_ocp_if omap44xx_l4_wkup__timer1 = { - .master = &omap44xx_l4_wkup_hwmod, - .slave = &omap44xx_timer1_hwmod, - .clk = "l4_wkup_clk_mux_ck", - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - /* l4_cfg -> usb_host_fs */ static struct omap_hwmod_ocp_if __maybe_unused omap44xx_l4_cfg__usb_host_fs = { .master = &omap44xx_l4_cfg_hwmod, @@ -1273,7 +1185,6 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = { &omap44xx_l4_cfg__l4_wkup, &omap44xx_mpu__mpu_private, &omap44xx_l4_cfg__ocp_wp_noc, - &omap44xx_l4_wkup__counter_32k, &omap44xx_l4_cfg__ctrl_module_core, &omap44xx_l4_cfg__ctrl_module_pad_core, &omap44xx_l4_wkup__ctrl_module_wkup, @@ -1290,7 +1201,6 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = { &omap44xx_l4_wkup__prm, &omap44xx_l4_wkup__scrm, /* &omap44xx_l3_main_2__sl2if, */ - &omap44xx_l4_wkup__timer1, /* &omap44xx_l4_cfg__usb_host_fs, */ &omap44xx_l4_cfg__usb_host_hs, &omap44xx_l4_cfg__usb_tll_hs, -- cgit v1.2.3 From 036a3d42bb8f28ae3cdd7c9570135c243724fbd6 Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Thu, 7 May 2020 09:59:31 -0700 Subject: ARM: dts: Configure system timers for omap5 and dra7 We can now init system timers using the dmtimer and 32k counter based on only devicetree data and drivers/clocksource timers. Let's configure the clocksource and clockevent, and drop the old unused platform data. As we're just dropping platform data, and the early platform data init is based on the custom ti,hwmods property, we want to drop both the platform data and ti,hwmods property in a single patch. Since the dmtimer can use both 32k clock and system clock as the source, let's also configure the SoC specific default values. The board specific dts files can reconfigure these with assigned-clocks and assigned-clock-parents as needed. Note that similar to omap_init_time_of(), we now need to call omap_clk_init() also from omap5_realtime_timer_init(). Cc: devicetree@vger.kernel.org Cc: Grygorii Strashko Cc: Keerthy Cc: Lokesh Vutla Cc: Rob Herring Cc: Tero Kristo Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/dra7-l4.dtsi | 7 +- arch/arm/boot/dts/dra7.dtsi | 10 ++ arch/arm/boot/dts/omap5-l4.dtsi | 4 +- arch/arm/boot/dts/omap5.dtsi | 10 ++ arch/arm/mach-omap2/omap_hwmod_54xx_data.c | 89 --------------- arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 176 ----------------------------- arch/arm/mach-omap2/timer.c | 17 +-- 7 files changed, 23 insertions(+), 290 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/dra7-l4.dtsi b/arch/arm/boot/dts/dra7-l4.dtsi index 2119a78e9c15..fc728c606eef 100644 --- a/arch/arm/boot/dts/dra7-l4.dtsi +++ b/arch/arm/boot/dts/dra7-l4.dtsi @@ -1143,7 +1143,6 @@ target-module@32000 { /* 0x48032000, ap 5 3e.0 */ compatible = "ti,sysc-omap4-timer", "ti,sysc"; - ti,hwmods = "timer2"; reg = <0x32000 0x4>, <0x32010 0x4>; reg-names = "rev", "sysc"; @@ -1171,7 +1170,6 @@ target-module@34000 { /* 0x48034000, ap 7 46.0 */ compatible = "ti,sysc-omap4-timer", "ti,sysc"; - ti,hwmods = "timer3"; reg = <0x34000 0x4>, <0x34010 0x4>; reg-names = "rev", "sysc"; @@ -1199,7 +1197,6 @@ target-module@36000 { /* 0x48036000, ap 9 4e.0 */ compatible = "ti,sysc-omap4-timer", "ti,sysc"; - ti,hwmods = "timer4"; reg = <0x36000 0x4>, <0x36010 0x4>; reg-names = "rev", "sysc"; @@ -4295,7 +4292,6 @@ target-module@4000 { /* 0x4ae04000, ap 15 40.0 */ compatible = "ti,sysc-omap2", "ti,sysc"; - ti,hwmods = "counter_32k"; reg = <0x4000 0x4>, <0x4010 0x4>; reg-names = "rev", "sysc"; @@ -4430,9 +4426,8 @@ }; }; - target-module@8000 { /* 0x4ae18000, ap 9 30.0 */ + timer1_target: target-module@8000 { /* 0x4ae18000, ap 9 30.0 */ compatible = "ti,sysc-omap4-timer", "ti,sysc"; - ti,hwmods = "timer1"; reg = <0x8000 0x4>, <0x8010 0x4>; reg-names = "rev", "sysc"; diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi index 4740989ed9c4..ad4401b0f270 100644 --- a/arch/arm/boot/dts/dra7.dtsi +++ b/arch/arm/boot/dts/dra7.dtsi @@ -1044,3 +1044,13 @@ reg = <0x1c00 0x60>; }; }; + +/* Preferred always-on timer for clockevent */ +&timer1_target { + ti,no-reset-on-init; + ti,no-idle; + timer@0 { + assigned-clocks = <&wkupaon_clkctrl DRA7_TIMER1_CLKCTRL 24>; + assigned-clock-parents = <&sys_32k_ck>; + }; +}; diff --git a/arch/arm/boot/dts/omap5-l4.dtsi b/arch/arm/boot/dts/omap5-l4.dtsi index f68740abb8aa..a7e718c4ccea 100644 --- a/arch/arm/boot/dts/omap5-l4.dtsi +++ b/arch/arm/boot/dts/omap5-l4.dtsi @@ -2150,7 +2150,6 @@ target-module@4000 { /* 0x4ae04000, ap 17 20.0 */ compatible = "ti,sysc-omap2", "ti,sysc"; - ti,hwmods = "counter_32k"; reg = <0x4000 0x4>, <0x4010 0x4>; reg-names = "rev", "sysc"; @@ -2336,9 +2335,8 @@ }; }; - target-module@8000 { /* 0x4ae18000, ap 9 18.0 */ + timer1_target: target-module@8000 { /* 0x4ae18000, ap 9 18.0 */ compatible = "ti,sysc-omap4-timer", "ti,sysc"; - ti,hwmods = "timer1"; reg = <0x8000 0x4>, <0x8010 0x4>; reg-names = "rev", "sysc"; diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi index 2ac7f021c284..e30a556f7c18 100644 --- a/arch/arm/boot/dts/omap5.dtsi +++ b/arch/arm/boot/dts/omap5.dtsi @@ -581,3 +581,13 @@ #reset-cells = <1>; }; }; + +/* Preferred always-on timer for clockevent */ +&timer1_target { + ti,no-reset-on-init; + ti,no-idle; + timer@0 { + assigned-clocks = <&wkupaon_clkctrl OMAP5_TIMER1_CLKCTRL 24>; + assigned-clock-parents = <&sys_32k_ck>; + }; +}; diff --git a/arch/arm/mach-omap2/omap_hwmod_54xx_data.c b/arch/arm/mach-omap2/omap_hwmod_54xx_data.c index 08f34f4732fd..4cb194ac7a7e 100644 --- a/arch/arm/mach-omap2/omap_hwmod_54xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_54xx_data.c @@ -193,39 +193,6 @@ static struct omap_hwmod omap54xx_mpu_private_hwmod = { }, }; -/* - * 'counter' class - * 32-bit ordinary counter, clocked by the falling edge of the 32 khz clock - */ - -static struct omap_hwmod_class_sysconfig omap54xx_counter_sysc = { - .rev_offs = 0x0000, - .sysc_offs = 0x0010, - .sysc_flags = SYSC_HAS_SIDLEMODE, - .idlemodes = (SIDLE_FORCE | SIDLE_NO), - .sysc_fields = &omap_hwmod_sysc_type1, -}; - -static struct omap_hwmod_class omap54xx_counter_hwmod_class = { - .name = "counter", - .sysc = &omap54xx_counter_sysc, -}; - -/* counter_32k */ -static struct omap_hwmod omap54xx_counter_32k_hwmod = { - .name = "counter_32k", - .class = &omap54xx_counter_hwmod_class, - .clkdm_name = "wkupaon_clkdm", - .flags = HWMOD_SWSUP_SIDLE, - .main_clk = "wkupaon_iclk_mux", - .prcm = { - .omap4 = { - .clkctrl_offs = OMAP54XX_CM_WKUPAON_COUNTER_32K_CLKCTRL_OFFSET, - .context_offs = OMAP54XX_RM_WKUPAON_COUNTER_32K_CONTEXT_OFFSET, - }, - }, -}; - /* * 'emif' class * external memory interface no1 (wrapper) @@ -299,44 +266,6 @@ static struct omap_hwmod omap54xx_mpu_hwmod = { }, }; - -/* - * 'timer' class - * general purpose timer module with accurate 1ms tick - * This class contains several variants: ['timer_1ms', 'timer'] - */ - -static struct omap_hwmod_class_sysconfig omap54xx_timer_1ms_sysc = { - .rev_offs = 0x0000, - .sysc_offs = 0x0010, - .sysc_flags = (SYSC_HAS_EMUFREE | SYSC_HAS_RESET_STATUS | - SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET), - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | - SIDLE_SMART_WKUP), - .sysc_fields = &omap_hwmod_sysc_type2, -}; - -static struct omap_hwmod_class omap54xx_timer_1ms_hwmod_class = { - .name = "timer", - .sysc = &omap54xx_timer_1ms_sysc, -}; - -/* timer1 */ -static struct omap_hwmod omap54xx_timer1_hwmod = { - .name = "timer1", - .class = &omap54xx_timer_1ms_hwmod_class, - .clkdm_name = "wkupaon_clkdm", - .main_clk = "timer1_gfclk_mux", - .flags = HWMOD_SET_DEFAULT_CLOCKACT, - .prcm = { - .omap4 = { - .clkctrl_offs = OMAP54XX_CM_WKUPAON_TIMER1_CLKCTRL_OFFSET, - .context_offs = OMAP54XX_RM_WKUPAON_TIMER1_CONTEXT_OFFSET, - .modulemode = MODULEMODE_SWCTRL, - }, - }, -}; - /* * 'usb_host_hs' class * high-speed multi-port usb host controller @@ -666,14 +595,6 @@ static struct omap_hwmod_ocp_if omap54xx_mpu__mpu_private = { .user = OCP_USER_MPU | OCP_USER_SDMA, }; -/* l4_wkup -> counter_32k */ -static struct omap_hwmod_ocp_if omap54xx_l4_wkup__counter_32k = { - .master = &omap54xx_l4_wkup_hwmod, - .slave = &omap54xx_counter_32k_hwmod, - .clk = "wkupaon_iclk_mux", - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - /* mpu -> emif1 */ static struct omap_hwmod_ocp_if omap54xx_mpu__emif1 = { .master = &omap54xx_mpu_hwmod, @@ -698,14 +619,6 @@ static struct omap_hwmod_ocp_if omap54xx_l4_cfg__mpu = { .user = OCP_USER_MPU | OCP_USER_SDMA, }; -/* l4_wkup -> timer1 */ -static struct omap_hwmod_ocp_if omap54xx_l4_wkup__timer1 = { - .master = &omap54xx_l4_wkup_hwmod, - .slave = &omap54xx_timer1_hwmod, - .clk = "wkupaon_iclk_mux", - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - /* l4_cfg -> usb_host_hs */ static struct omap_hwmod_ocp_if omap54xx_l4_cfg__usb_host_hs = { .master = &omap54xx_l4_cfg_hwmod, @@ -747,11 +660,9 @@ static struct omap_hwmod_ocp_if *omap54xx_hwmod_ocp_ifs[] __initdata = { &omap54xx_l3_main_2__l4_per, &omap54xx_l3_main_1__l4_wkup, &omap54xx_mpu__mpu_private, - &omap54xx_l4_wkup__counter_32k, &omap54xx_mpu__emif1, &omap54xx_mpu__emif2, &omap54xx_l4_cfg__mpu, - &omap54xx_l4_wkup__timer1, &omap54xx_l4_cfg__usb_host_hs, &omap54xx_l4_cfg__usb_tll_hs, &omap54xx_l4_cfg__usb_otg_ss, diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c index e95668bdbc3f..07b7458deae4 100644 --- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c @@ -221,40 +221,6 @@ static struct omap_hwmod dra7xx_bb2d_hwmod = { }, }; -/* - * 'counter' class - * - */ - -static struct omap_hwmod_class_sysconfig dra7xx_counter_sysc = { - .rev_offs = 0x0000, - .sysc_offs = 0x0010, - .sysc_flags = SYSC_HAS_SIDLEMODE, - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | - SIDLE_SMART_WKUP), - .sysc_fields = &omap_hwmod_sysc_type1, -}; - -static struct omap_hwmod_class dra7xx_counter_hwmod_class = { - .name = "counter", - .sysc = &dra7xx_counter_sysc, -}; - -/* counter_32k */ -static struct omap_hwmod dra7xx_counter_32k_hwmod = { - .name = "counter_32k", - .class = &dra7xx_counter_hwmod_class, - .clkdm_name = "wkupaon_clkdm", - .flags = HWMOD_SWSUP_SIDLE, - .main_clk = "wkupaon_iclk_mux", - .prcm = { - .omap4 = { - .clkctrl_offs = DRA7XX_CM_WKUPAON_COUNTER_32K_CLKCTRL_OFFSET, - .context_offs = DRA7XX_RM_WKUPAON_COUNTER_32K_CONTEXT_OFFSET, - }, - }, -}; - /* * 'ctrl_module' class * @@ -525,103 +491,6 @@ static struct omap_hwmod dra7xx_sata_hwmod = { }, }; -/* - * 'timer' class - * - * This class contains several variants: ['timer_1ms', 'timer_secure', - * 'timer'] - */ - -static struct omap_hwmod_class_sysconfig dra7xx_timer_1ms_sysc = { - .rev_offs = 0x0000, - .sysc_offs = 0x0010, - .sysc_flags = (SYSC_HAS_EMUFREE | SYSC_HAS_RESET_STATUS | - SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET), - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | - SIDLE_SMART_WKUP), - .sysc_fields = &omap_hwmod_sysc_type2, -}; - -static struct omap_hwmod_class dra7xx_timer_1ms_hwmod_class = { - .name = "timer", - .sysc = &dra7xx_timer_1ms_sysc, -}; - -static struct omap_hwmod_class_sysconfig dra7xx_timer_sysc = { - .rev_offs = 0x0000, - .sysc_offs = 0x0010, - .sysc_flags = (SYSC_HAS_EMUFREE | SYSC_HAS_RESET_STATUS | - SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET), - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | - SIDLE_SMART_WKUP), - .sysc_fields = &omap_hwmod_sysc_type2, -}; - -static struct omap_hwmod_class dra7xx_timer_hwmod_class = { - .name = "timer", - .sysc = &dra7xx_timer_sysc, -}; - -/* timer1 */ -static struct omap_hwmod dra7xx_timer1_hwmod = { - .name = "timer1", - .class = &dra7xx_timer_1ms_hwmod_class, - .clkdm_name = "wkupaon_clkdm", - .main_clk = "timer1_gfclk_mux", - .prcm = { - .omap4 = { - .clkctrl_offs = DRA7XX_CM_WKUPAON_TIMER1_CLKCTRL_OFFSET, - .context_offs = DRA7XX_RM_WKUPAON_TIMER1_CONTEXT_OFFSET, - .modulemode = MODULEMODE_SWCTRL, - }, - }, -}; - -/* timer2 */ -static struct omap_hwmod dra7xx_timer2_hwmod = { - .name = "timer2", - .class = &dra7xx_timer_1ms_hwmod_class, - .clkdm_name = "l4per_clkdm", - .main_clk = "timer2_gfclk_mux", - .prcm = { - .omap4 = { - .clkctrl_offs = DRA7XX_CM_L4PER_TIMER2_CLKCTRL_OFFSET, - .context_offs = DRA7XX_RM_L4PER_TIMER2_CONTEXT_OFFSET, - .modulemode = MODULEMODE_SWCTRL, - }, - }, -}; - -/* timer3 */ -static struct omap_hwmod dra7xx_timer3_hwmod = { - .name = "timer3", - .class = &dra7xx_timer_hwmod_class, - .clkdm_name = "l4per_clkdm", - .main_clk = "timer3_gfclk_mux", - .prcm = { - .omap4 = { - .clkctrl_offs = DRA7XX_CM_L4PER_TIMER3_CLKCTRL_OFFSET, - .context_offs = DRA7XX_RM_L4PER_TIMER3_CONTEXT_OFFSET, - .modulemode = MODULEMODE_SWCTRL, - }, - }, -}; - -/* timer4 */ -static struct omap_hwmod dra7xx_timer4_hwmod = { - .name = "timer4", - .class = &dra7xx_timer_hwmod_class, - .clkdm_name = "l4per_clkdm", - .main_clk = "timer4_gfclk_mux", - .prcm = { - .omap4 = { - .clkctrl_offs = DRA7XX_CM_L4PER_TIMER4_CLKCTRL_OFFSET, - .context_offs = DRA7XX_RM_L4PER_TIMER4_CONTEXT_OFFSET, - .modulemode = MODULEMODE_SWCTRL, - }, - }, -}; - /* * 'usb_otg_ss' class * @@ -864,14 +733,6 @@ static struct omap_hwmod_ocp_if dra7xx_l3_main_1__bb2d = { .user = OCP_USER_MPU | OCP_USER_SDMA, }; -/* l4_wkup -> counter_32k */ -static struct omap_hwmod_ocp_if dra7xx_l4_wkup__counter_32k = { - .master = &dra7xx_l4_wkup_hwmod, - .slave = &dra7xx_counter_32k_hwmod, - .clk = "wkupaon_iclk_mux", - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - /* l4_wkup -> ctrl_module_wkup */ static struct omap_hwmod_ocp_if dra7xx_l4_wkup__ctrl_module_wkup = { .master = &dra7xx_l4_wkup_hwmod, @@ -952,38 +813,6 @@ static struct omap_hwmod_ocp_if dra7xx_l4_cfg__sata = { .user = OCP_USER_MPU | OCP_USER_SDMA, }; -/* l4_wkup -> timer1 */ -static struct omap_hwmod_ocp_if dra7xx_l4_wkup__timer1 = { - .master = &dra7xx_l4_wkup_hwmod, - .slave = &dra7xx_timer1_hwmod, - .clk = "wkupaon_iclk_mux", - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* l4_per1 -> timer2 */ -static struct omap_hwmod_ocp_if dra7xx_l4_per1__timer2 = { - .master = &dra7xx_l4_per1_hwmod, - .slave = &dra7xx_timer2_hwmod, - .clk = "l3_iclk_div", - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* l4_per1 -> timer3 */ -static struct omap_hwmod_ocp_if dra7xx_l4_per1__timer3 = { - .master = &dra7xx_l4_per1_hwmod, - .slave = &dra7xx_timer3_hwmod, - .clk = "l3_iclk_div", - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* l4_per1 -> timer4 */ -static struct omap_hwmod_ocp_if dra7xx_l4_per1__timer4 = { - .master = &dra7xx_l4_per1_hwmod, - .slave = &dra7xx_timer4_hwmod, - .clk = "l3_iclk_div", - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - /* l4_per3 -> usb_otg_ss1 */ static struct omap_hwmod_ocp_if dra7xx_l4_per3__usb_otg_ss1 = { .master = &dra7xx_l4_per3_hwmod, @@ -1062,7 +891,6 @@ static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[] __initdata = { &dra7xx_l3_main_1__l4_wkup, &dra7xx_l4_per2__atl, &dra7xx_l3_main_1__bb2d, - &dra7xx_l4_wkup__counter_32k, &dra7xx_l4_wkup__ctrl_module_wkup, &dra7xx_l3_main_1__gpmc, &dra7xx_l4_cfg__mpu, @@ -1072,10 +900,6 @@ static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[] __initdata = { &dra7xx_l4_cfg__pciess2, &dra7xx_l3_main_1__qspi, &dra7xx_l4_cfg__sata, - &dra7xx_l4_wkup__timer1, - &dra7xx_l4_per1__timer2, - &dra7xx_l4_per1__timer3, - &dra7xx_l4_per1__timer4, &dra7xx_l4_per3__usb_otg_ss1, &dra7xx_l4_per3__usb_otg_ss2, &dra7xx_l4_per3__usb_otg_ss3, diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c index 8b09cdacc30d..662a31004b91 100644 --- a/arch/arm/mach-omap2/timer.c +++ b/arch/arm/mach-omap2/timer.c @@ -576,21 +576,6 @@ void __init omap3_gptimer_timer_init(void) } #endif -#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) || \ - defined(CONFIG_SOC_DRA7XX) -static void __init omap4_sync32k_timer_init(void) -{ - __omap_sync32k_timer_init(1, "timer_32k_ck", "ti,timer-alwon", - 0, NULL, NULL, false); -} - -void __init omap4_local_timer_init(void) -{ - omap4_sync32k_timer_init(); - timer_probe(); -} -#endif - #if defined(CONFIG_SOC_OMAP5) || defined(CONFIG_SOC_DRA7XX) /* @@ -708,7 +693,7 @@ sysclk1_based: void __init omap5_realtime_timer_init(void) { - omap4_sync32k_timer_init(); + omap_clk_init(); realtime_counter_init(); timer_probe(); -- cgit v1.2.3 From e428e250fde683ad3a658f8476f0914714e7eb6f Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Thu, 7 May 2020 09:59:31 -0700 Subject: ARM: dts: Configure system timers for omap3 We can now init system timers using the dmtimer and 32k counter based on only devicetree data and drivers/clocksource timers. Let's configure the clocksource and clockevent, and drop the old unused platform data. As we're just dropping platform data, and the early platform data init is based on the custom ti,hwmods property, we want to drop both the platform data and ti,hwmods property in a single patch. Since the dmtimer can use both 32k clock and system clock as the source, let's also configure the SoC specific default values. The board specific dts files can reconfigure these with assigned-clocks and assigned-clock-parents as needed. Let's also update the dts file to use #include while at it. Cc: devicetree@vger.kernel.org Cc: Adam Ford Cc: Andreas Kemnade Cc: Grygorii Strashko Cc: "H. Nikolaus Schaller" Cc: Keerthy Cc: Lokesh Vutla Cc: Rob Herring Cc: Tero Kristo Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/am3517.dtsi | 24 ++++- arch/arm/boot/dts/omap3-beagle.dts | 33 +++++++ arch/arm/boot/dts/omap3-devkit8000.dts | 33 +++++++ arch/arm/boot/dts/omap3.dtsi | 134 +++++++++++++++++++++----- arch/arm/mach-omap2/board-generic.c | 10 +- arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 146 +---------------------------- 6 files changed, 205 insertions(+), 175 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/am3517.dtsi b/arch/arm/boot/dts/am3517.dtsi index e0b5a00e2078..dc8927f14b6c 100644 --- a/arch/arm/boot/dts/am3517.dtsi +++ b/arch/arm/boot/dts/am3517.dtsi @@ -169,5 +169,25 @@ status = "disabled"; }; -/include/ "am35xx-clocks.dtsi" -/include/ "omap36xx-am35xx-omap3430es2plus-clocks.dtsi" +#include "am35xx-clocks.dtsi" +#include "omap36xx-am35xx-omap3430es2plus-clocks.dtsi" + +/* Preferred always-on timer for clocksource */ +&timer1_target { + ti,no-reset-on-init; + ti,no-idle; + timer@0 { + assigned-clocks = <&gpt1_fck>; + assigned-clock-parents = <&sys_ck>; + }; +}; + +/* Preferred timer for clockevent */ +&timer2_target { + ti,no-reset-on-init; + ti,no-idle; + timer@0 { + assigned-clocks = <&gpt2_fck>; + assigned-clock-parents = <&sys_ck>; + }; +}; diff --git a/arch/arm/boot/dts/omap3-beagle.dts b/arch/arm/boot/dts/omap3-beagle.dts index 4ed3f93f5841..dfa158647d91 100644 --- a/arch/arm/boot/dts/omap3-beagle.dts +++ b/arch/arm/boot/dts/omap3-beagle.dts @@ -304,6 +304,39 @@ phys = <0 &hsusb2_phy>; }; +/* Unusable as clocksource because of unreliable oscillator */ +&counter32k { + status = "disabled"; +}; + +/* Unusable as clockevent because if unreliable oscillator, allow to idle */ +&timer1_target { + /delete-property/ti,no-reset-on-init; + /delete-property/ti,no-idle; + timer@0 { + /delete-property/ti,timer-alwon; + }; +}; + +/* Preferred always-on timer for clocksource */ +&timer12_target { + ti,no-reset-on-init; + ti,no-idle; + timer@0 { + /* Always clocked by secure_32k_fck */ + }; +}; + +/* Preferred timer for clockevent */ +&timer2_target { + ti,no-reset-on-init; + ti,no-idle; + timer@0 { + assigned-clocks = <&gpt2_fck>; + assigned-clock-parents = <&sys_ck>; + }; +}; + &twl_gpio { ti,use-leds; /* pullups: BIT(1) */ diff --git a/arch/arm/boot/dts/omap3-devkit8000.dts b/arch/arm/boot/dts/omap3-devkit8000.dts index 162d0726b008..c2995a280729 100644 --- a/arch/arm/boot/dts/omap3-devkit8000.dts +++ b/arch/arm/boot/dts/omap3-devkit8000.dts @@ -14,3 +14,36 @@ display2 = &tv0; }; }; + +/* Unusable as clocksource because of unreliable oscillator */ +&counter32k { + status = "disabled"; +}; + +/* Unusable as clockevent because if unreliable oscillator, allow to idle */ +&timer1_target { + /delete-property/ti,no-reset-on-init; + /delete-property/ti,no-idle; + timer@0 { + /delete-property/ti,timer-alwon; + }; +}; + +/* Preferred always-on timer for clocksource */ +&timer12_target { + ti,no-reset-on-init; + ti,no-idle; + timer@0 { + /* Always clocked by secure_32k_fck */ + }; +}; + +/* Preferred timer for clockevent */ +&timer2_target { + ti,no-reset-on-init; + ti,no-idle; + timer@0 { + assigned-clocks = <&gpt2_fck>; + assigned-clock-parents = <&sys_ck>; + }; +}; diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi index 634ea16a711e..1296d0643943 100644 --- a/arch/arm/boot/dts/omap3.dtsi +++ b/arch/arm/boot/dts/omap3.dtsi @@ -193,10 +193,23 @@ }; }; - counter32k: counter@48320000 { - compatible = "ti,omap-counter32k"; - reg = <0x48320000 0x20>; - ti,hwmods = "counter_32k"; + target-module@48320000 { + compatible = "ti,sysc-omap2", "ti,sysc"; + reg = <0x48320000 0x4>, + <0x48320004 0x4>; + reg-names = "rev", "sysc"; + ti,sysc-sidle = , + ; + clocks = <&wkup_32k_fck>, <&omap_32ksync_ick>; + clock-names = "fck", "ick"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x48320000 0x1000>; + + counter32k: counter@0 { + compatible = "ti,omap-counter32k"; + reg = <0x0 0x20>; + }; }; intc: interrupt-controller@48200000 { @@ -637,19 +650,63 @@ dma-names = "rx"; }; - timer1: timer@48318000 { - compatible = "ti,omap3430-timer"; - reg = <0x48318000 0x400>; - interrupts = <37>; - ti,hwmods = "timer1"; - ti,timer-alwon; + timer1_target: target-module@48318000 { + compatible = "ti,sysc-omap2-timer", "ti,sysc"; + reg = <0x48318000 0x4>, + <0x48318010 0x4>, + <0x48318014 0x4>; + reg-names = "rev", "sysc", "syss"; + ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | + SYSC_OMAP2_EMUFREE | + SYSC_OMAP2_ENAWAKEUP | + SYSC_OMAP2_SOFTRESET | + SYSC_OMAP2_AUTOIDLE)>; + ti,sysc-sidle = , + , + ; + ti,syss-mask = <1>; + clocks = <&gpt1_fck>, <&gpt1_ick>; + clock-names = "fck", "ick"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x48318000 0x1000>; + + timer1: timer@0 { + compatible = "ti,omap3430-timer"; + reg = <0x0 0x80>; + clocks = <&gpt1_fck>; + clock-names = "fck"; + interrupts = <37>; + ti,timer-alwon; + }; }; - timer2: timer@49032000 { - compatible = "ti,omap3430-timer"; - reg = <0x49032000 0x400>; - interrupts = <38>; - ti,hwmods = "timer2"; + timer2_target: target-module@49032000 { + compatible = "ti,sysc-omap2-timer", "ti,sysc"; + reg = <0x49032000 0x4>, + <0x49032010 0x4>, + <0x49032014 0x4>; + reg-names = "rev", "sysc", "syss"; + ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | + SYSC_OMAP2_EMUFREE | + SYSC_OMAP2_ENAWAKEUP | + SYSC_OMAP2_SOFTRESET | + SYSC_OMAP2_AUTOIDLE)>; + ti,sysc-sidle = , + , + ; + ti,syss-mask = <1>; + clocks = <&gpt2_fck>, <&gpt2_ick>; + clock-names = "fck", "ick"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x49032000 0x1000>; + + timer2: timer@0 { + compatible = "ti,omap3430-timer"; + reg = <0 0x400>; + interrupts = <38>; + }; }; timer3: timer@49034000 { @@ -723,13 +780,34 @@ ti,timer-pwm; }; - timer12: timer@48304000 { - compatible = "ti,omap3430-timer"; - reg = <0x48304000 0x400>; - interrupts = <95>; - ti,hwmods = "timer12"; - ti,timer-alwon; - ti,timer-secure; + timer12_target: target-module@48304000 { + compatible = "ti,sysc-omap2-timer", "ti,sysc"; + reg = <0x48304000 0x4>, + <0x48304010 0x4>, + <0x48304014 0x4>; + reg-names = "rev", "sysc", "syss"; + ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | + SYSC_OMAP2_EMUFREE | + SYSC_OMAP2_ENAWAKEUP | + SYSC_OMAP2_SOFTRESET | + SYSC_OMAP2_AUTOIDLE)>; + ti,sysc-sidle = , + , + ; + ti,syss-mask = <1>; + clocks = <&gpt12_fck>, <&gpt12_ick>; + clock-names = "fck", "ick"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x48304000 0x1000>; + + timer12: timer@0 { + compatible = "ti,omap3430-timer"; + reg = <0 0x400>; + interrupts = <95>; + ti,timer-alwon; + ti,timer-secure; + }; }; usbhstll: usbhstll@48062000 { @@ -886,4 +964,14 @@ }; }; -/include/ "omap3xxx-clocks.dtsi" +#include "omap3xxx-clocks.dtsi" + +/* Preferred always-on timer for clockevent. Some boards must use dmtimer12 */ +&timer1_target { + ti,no-reset-on-init; + ti,no-idle; + timer@0 { + assigned-clocks = <&gpt1_fck>; + assigned-clock-parents = <&omap_32k_fck>; + }; +}; diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c index 4818fd429f98..a10a74e95385 100644 --- a/arch/arm/mach-omap2/board-generic.c +++ b/arch/arm/mach-omap2/board-generic.c @@ -114,7 +114,7 @@ DT_MACHINE_START(OMAP3_N900_DT, "Nokia RX-51 board") .init_early = omap3430_init_early, .init_machine = omap_generic_init, .init_late = omap3_init_late, - .init_time = omap_init_time, + .init_time = omap_init_time_of, .dt_compat = n900_boards_compat, .restart = omap3xxx_restart, MACHINE_END @@ -132,7 +132,7 @@ DT_MACHINE_START(OMAP3_DT, "Generic OMAP3 (Flattened Device Tree)") .init_early = omap3430_init_early, .init_machine = omap_generic_init, .init_late = omap3_init_late, - .init_time = omap_init_time, + .init_time = omap_init_time_of, .dt_compat = omap3_boards_compat, .restart = omap3xxx_restart, MACHINE_END @@ -149,7 +149,7 @@ DT_MACHINE_START(OMAP36XX_DT, "Generic OMAP36xx (Flattened Device Tree)") .init_early = omap3630_init_early, .init_machine = omap_generic_init, .init_late = omap3_init_late, - .init_time = omap_init_time, + .init_time = omap_init_time_of, .dt_compat = omap36xx_boards_compat, .restart = omap3xxx_restart, MACHINE_END @@ -166,7 +166,7 @@ DT_MACHINE_START(OMAP3_GP_DT, "Generic OMAP3-GP (Flattened Device Tree)") .init_early = omap3430_init_early, .init_machine = omap_generic_init, .init_late = omap3_init_late, - .init_time = omap3_secure_sync32k_timer_init, + .init_time = omap_init_time_of, .dt_compat = omap3_gp_boards_compat, .restart = omap3xxx_restart, MACHINE_END @@ -182,7 +182,7 @@ DT_MACHINE_START(AM3517_DT, "Generic AM3517 (Flattened Device Tree)") .init_early = am35xx_init_early, .init_machine = omap_generic_init, .init_late = omap3_init_late, - .init_time = omap3_gptimer_timer_init, + .init_time = omap_init_time_of, .dt_compat = am3517_boards_compat, .restart = omap3xxx_restart, MACHINE_END diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c index 3c8d2b6e887a..ca02f91237e3 100644 --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c @@ -147,36 +147,6 @@ static struct omap_hwmod_class omap3xxx_timer_hwmod_class = { .sysc = &omap3xxx_timer_sysc, }; -/* timer1 */ -static struct omap_hwmod omap3xxx_timer1_hwmod = { - .name = "timer1", - .main_clk = "gpt1_fck", - .prcm = { - .omap2 = { - .module_offs = WKUP_MOD, - .idlest_reg_id = 1, - .idlest_idle_bit = OMAP3430_ST_GPT1_SHIFT, - }, - }, - .class = &omap3xxx_timer_hwmod_class, - .flags = HWMOD_SET_DEFAULT_CLOCKACT, -}; - -/* timer2 */ -static struct omap_hwmod omap3xxx_timer2_hwmod = { - .name = "timer2", - .main_clk = "gpt2_fck", - .prcm = { - .omap2 = { - .module_offs = OMAP3430_PER_MOD, - .idlest_reg_id = 1, - .idlest_idle_bit = OMAP3430_ST_GPT2_SHIFT, - }, - }, - .class = &omap3xxx_timer_hwmod_class, - .flags = HWMOD_SET_DEFAULT_CLOCKACT, -}; - /* timer3 */ static struct omap_hwmod omap3xxx_timer3_hwmod = { .name = "timer3", @@ -312,21 +282,6 @@ static struct omap_hwmod omap3xxx_timer11_hwmod = { .flags = HWMOD_SET_DEFAULT_CLOCKACT, }; -/* timer12 */ -static struct omap_hwmod omap3xxx_timer12_hwmod = { - .name = "timer12", - .main_clk = "gpt12_fck", - .prcm = { - .omap2 = { - .module_offs = WKUP_MOD, - .idlest_reg_id = 1, - .idlest_idle_bit = OMAP3430_ST_GPT12_SHIFT, - }, - }, - .class = &omap3xxx_timer_hwmod_class, - .flags = HWMOD_SET_DEFAULT_CLOCKACT, -}; - /* * 'wd_timer' class * 32-bit watchdog upward counter that generates a pulse on the reset pin on @@ -1524,38 +1479,6 @@ static struct omap_hwmod omap3xxx_sad2d_hwmod = { .class = &omap3xxx_sad2d_class, }; -/* - * '32K sync counter' class - * 32-bit ordinary counter, clocked by the falling edge of the 32 khz clock - */ -static struct omap_hwmod_class_sysconfig omap3xxx_counter_sysc = { - .rev_offs = 0x0000, - .sysc_offs = 0x0004, - .sysc_flags = SYSC_HAS_SIDLEMODE, - .idlemodes = (SIDLE_FORCE | SIDLE_NO), - .sysc_fields = &omap_hwmod_sysc_type1, -}; - -static struct omap_hwmod_class omap3xxx_counter_hwmod_class = { - .name = "counter", - .sysc = &omap3xxx_counter_sysc, -}; - -static struct omap_hwmod omap3xxx_counter_32k_hwmod = { - .name = "counter_32k", - .class = &omap3xxx_counter_hwmod_class, - .clkdm_name = "wkup_clkdm", - .flags = HWMOD_SWSUP_SIDLE, - .main_clk = "wkup_32k_fck", - .prcm = { - .omap2 = { - .module_offs = WKUP_MOD, - .idlest_reg_id = 1, - .idlest_idle_bit = OMAP3430_ST_32KSYNC_SHIFT, - }, - }, -}; - /* * 'gpmc' class * general purpose memory controller @@ -1868,25 +1791,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l3__iva = { .user = OCP_USER_MPU | OCP_USER_SDMA, }; - -/* l4_wkup -> timer1 */ -static struct omap_hwmod_ocp_if omap3xxx_l4_wkup__timer1 = { - .master = &omap3xxx_l4_wkup_hwmod, - .slave = &omap3xxx_timer1_hwmod, - .clk = "gpt1_ick", - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - - -/* l4_per -> timer2 */ -static struct omap_hwmod_ocp_if omap3xxx_l4_per__timer2 = { - .master = &omap3xxx_l4_per_hwmod, - .slave = &omap3xxx_timer2_hwmod, - .clk = "gpt2_ick", - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - - /* l4_per -> timer3 */ static struct omap_hwmod_ocp_if omap3xxx_l4_per__timer3 = { .master = &omap3xxx_l4_per_hwmod, @@ -1965,15 +1869,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__timer11 = { .user = OCP_USER_MPU | OCP_USER_SDMA, }; - -/* l4_core -> timer12 */ -static struct omap_hwmod_ocp_if omap3xxx_l4_sec__timer12 = { - .master = &omap3xxx_l4_sec_hwmod, - .slave = &omap3xxx_timer12_hwmod, - .clk = "gpt12_ick", - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - /* l4_wkup -> wd_timer2 */ static struct omap_hwmod_ocp_if omap3xxx_l4_wkup__wd_timer2 = { @@ -2325,16 +2220,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__hdq1w = { .flags = OMAP_FIREWALL_L4 | OCPIF_SWSUP_IDLE, }; -/* l4_wkup -> 32ksync_counter */ - - -static struct omap_hwmod_ocp_if omap3xxx_l4_wkup__counter_32k = { - .master = &omap3xxx_l4_wkup_hwmod, - .slave = &omap3xxx_counter_32k_hwmod, - .clk = "omap_32ksync_ick", - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - /* am35xx has Davinci MDIO & EMAC */ static struct omap_hwmod_class am35xx_mdio_class = { .name = "davinci_mdio", @@ -2551,8 +2436,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_hwmod_ocp_ifs[] __initdata = { &omap3_l4_core__i2c2, &omap3_l4_core__i2c3, &omap3xxx_l4_wkup__l4_sec, - &omap3xxx_l4_wkup__timer1, - &omap3xxx_l4_per__timer2, &omap3xxx_l4_per__timer3, &omap3xxx_l4_per__timer4, &omap3xxx_l4_per__timer5, @@ -2580,27 +2463,10 @@ static struct omap_hwmod_ocp_if *omap3xxx_hwmod_ocp_ifs[] __initdata = { &omap34xx_l4_core__mcspi2, &omap34xx_l4_core__mcspi3, &omap34xx_l4_core__mcspi4, - &omap3xxx_l4_wkup__counter_32k, &omap3xxx_l3_main__gpmc, NULL, }; -/* GP-only hwmod links */ -static struct omap_hwmod_ocp_if *omap34xx_gp_hwmod_ocp_ifs[] __initdata = { - &omap3xxx_l4_sec__timer12, - NULL, -}; - -static struct omap_hwmod_ocp_if *omap36xx_gp_hwmod_ocp_ifs[] __initdata = { - &omap3xxx_l4_sec__timer12, - NULL, -}; - -static struct omap_hwmod_ocp_if *am35xx_gp_hwmod_ocp_ifs[] __initdata = { - &omap3xxx_l4_sec__timer12, - NULL, -}; - /* crypto hwmod links */ static struct omap_hwmod_ocp_if *omap34xx_sham_hwmod_ocp_ifs[] __initdata = { &omap3xxx_l4_core__sham, @@ -2774,7 +2640,7 @@ static bool __init omap3xxx_hwmod_is_hs_ip_block_usable(struct device_node *bus, int __init omap3xxx_hwmod_init(void) { int r; - struct omap_hwmod_ocp_if **h = NULL, **h_gp = NULL, **h_sham = NULL; + struct omap_hwmod_ocp_if **h = NULL, **h_sham = NULL; struct omap_hwmod_ocp_if **h_aes = NULL; struct device_node *bus; unsigned int rev; @@ -2797,18 +2663,15 @@ int __init omap3xxx_hwmod_init(void) rev == OMAP3430_REV_ES2_1 || rev == OMAP3430_REV_ES3_0 || rev == OMAP3430_REV_ES3_1 || rev == OMAP3430_REV_ES3_1_2) { h = omap34xx_hwmod_ocp_ifs; - h_gp = omap34xx_gp_hwmod_ocp_ifs; h_sham = omap34xx_sham_hwmod_ocp_ifs; h_aes = omap34xx_aes_hwmod_ocp_ifs; } else if (rev == AM35XX_REV_ES1_0 || rev == AM35XX_REV_ES1_1) { h = am35xx_hwmod_ocp_ifs; - h_gp = am35xx_gp_hwmod_ocp_ifs; h_sham = am35xx_sham_hwmod_ocp_ifs; h_aes = am35xx_aes_hwmod_ocp_ifs; } else if (rev == OMAP3630_REV_ES1_0 || rev == OMAP3630_REV_ES1_1 || rev == OMAP3630_REV_ES1_2) { h = omap36xx_hwmod_ocp_ifs; - h_gp = omap36xx_gp_hwmod_ocp_ifs; h_sham = omap36xx_sham_hwmod_ocp_ifs; h_aes = omap36xx_aes_hwmod_ocp_ifs; } else { @@ -2820,13 +2683,6 @@ int __init omap3xxx_hwmod_init(void) if (r < 0) return r; - /* Register GP-only hwmod links. */ - if (h_gp && omap_type() == OMAP2_DEVICE_TYPE_GP) { - r = omap_hwmod_register_links(h_gp); - if (r < 0) - return r; - } - /* * Register crypto hwmod links only if they are not disabled in DT. * If DT information is missing, enable them only for GP devices. -- cgit v1.2.3 From 83bd18b46600a37d977e811dca1334e09a6e03eb Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Thu, 7 May 2020 09:59:31 -0700 Subject: ARM: dts: Configure system timers for ti81xx We can now init system timers using the dmtimer and 32k counter based on only devicetree data and drivers/clocksource timers. Let's configure the clocksource and clockevent, and drop the old unused platform data. As we're just dropping platform data, and the early platform data init is based on the custom ti,hwmods property, we want to drop both the platform data and ti,hwmods property in a single patch. Since the dmtimer can use both 32k clock and system clock as the source, let's also configure the SoC specific default values. The board specific dts files can reconfigure these with assigned-clocks and assigned-clock-parents as needed. Note that for ti81xx, also timer1 is of type 2 unlike on am335x where timer1 is type1 while the rest of the timers are type 2. Cc: devicetree@vger.kernel.org Cc: Brian Hutchinson Cc: Graeme Smecher Cc: Grygorii Strashko Cc: Keerthy Cc: Lokesh Vutla Cc: Rob Herring Cc: Tero Kristo Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/dm814x.dtsi | 74 +++++++++++++++++++++++----- arch/arm/boot/dts/dm816x.dtsi | 78 +++++++++++++++++++++++++----- arch/arm/mach-omap2/board-generic.c | 4 +- arch/arm/mach-omap2/omap_hwmod_81xx_data.c | 74 ---------------------------- 4 files changed, 130 insertions(+), 100 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/dm814x.dtsi b/arch/arm/boot/dts/dm814x.dtsi index 44ed5a798164..a172cf5cf29c 100644 --- a/arch/arm/boot/dts/dm814x.dtsi +++ b/arch/arm/boot/dts/dm814x.dtsi @@ -308,14 +308,30 @@ ti,hwmods = "mcspi4"; }; - timer1: timer@2e000 { - compatible = "ti,dm814-timer"; - reg = <0x2e000 0x2000>; - interrupts = <67>; - ti,hwmods = "timer1"; - ti,timer-alwon; + timer1_target: target-module@2e000 { + compatible = "ti,sysc-omap4-timer", "ti,sysc"; + reg = <0x2e000 0x4>, + <0x2e010 0x4>; + reg-names = "rev", "sysc"; + ti,sysc-mask = ; + ti,sysc-sidle = , + , + , + ; clocks = <&timer1_fck>; clock-names = "fck"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x2e000 0x1000>; + + timer1: timer@0 { + compatible = "ti,am335x-timer-1ms"; + reg = <0x0 0x400>; + interrupts = <67>; + ti,timer-alwon; + clocks = <&timer1_fck>; + clock-names = "fck"; + }; }; uart1: uart@20000 { @@ -348,13 +364,29 @@ dma-names = "tx", "rx"; }; - timer2: timer@40000 { - compatible = "ti,dm814-timer"; - reg = <0x40000 0x2000>; - interrupts = <68>; - ti,hwmods = "timer2"; + timer2_target: target-module@40000 { + compatible = "ti,sysc-omap4-timer", "ti,sysc"; + reg = <0x40000 0x4>, + <0x40010 0x4>; + reg-names = "rev", "sysc"; + ti,sysc-mask = ; + ti,sysc-sidle = , + , + , + ; clocks = <&timer2_fck>; clock-names = "fck"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x40000 0x1000>; + + timer2: timer@0 { + compatible = "ti,dm814-timer"; + reg = <0 0x1000>; + interrupts = <68>; + clocks = <&timer2_fck>; + clock-names = "fck"; + }; }; timer3: timer@42000 { @@ -735,3 +767,23 @@ }; #include "dm814x-clocks.dtsi" + +/* Preferred always-on timer for clocksource */ +&timer1_target { + ti,no-reset-on-init; + ti,no-idle; + timer@0 { + assigned-clocks = <&timer1_fck>; + assigned-clock-parents = <&devosc_ck>; + }; +}; + +/* Preferred timer for clockevent */ +&timer2_target { + ti,no-reset-on-init; + ti,no-idle; + timer@0 { + assigned-clocks = <&timer2_fck>; + assigned-clock-parents = <&devosc_ck>; + }; +}; diff --git a/arch/arm/boot/dts/dm816x.dtsi b/arch/arm/boot/dts/dm816x.dtsi index 2a4934b60ded..3551a64963f8 100644 --- a/arch/arm/boot/dts/dm816x.dtsi +++ b/arch/arm/boot/dts/dm816x.dtsi @@ -440,23 +440,55 @@ dma-names = "tx", "rx"; }; - timer1: timer@4802e000 { - compatible = "ti,dm816-timer"; - reg = <0x4802e000 0x2000>; - interrupts = <67>; - ti,hwmods = "timer1"; - ti,timer-alwon; - clocks = <&timer1_fck>; + timer1_target: target-module@4802e000 { + compatible = "ti,sysc-omap4-timer", "ti,sysc"; + reg = <0x4802e000 0x4>, + <0x4802e010 0x4>; + reg-names = "rev", "sysc"; + ti,sysc-mask = ; + ti,sysc-sidle = , + , + , + ; + clocks = <&alwon_clkctrl DM816_TIMER1_CLKCTRL 0>; clock-names = "fck"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x4802e000 0x1000>; + + timer1: timer@0 { + compatible = "ti,dm816-timer"; + reg = <0 0x1000>; + interrupts = <67>; + ti,timer-alwon; + clocks = <&alwon_clkctrl DM816_TIMER1_CLKCTRL 0>; + clock-names = "fck"; + }; }; - timer2: timer@48040000 { - compatible = "ti,dm816-timer"; - reg = <0x48040000 0x2000>; - interrupts = <68>; - ti,hwmods = "timer2"; - clocks = <&timer2_fck>; + timer2_target: target-module@48040000 { + compatible = "ti,sysc-omap4-timer", "ti,sysc"; + reg = <0x48040000 0x4>, + <0x48040010 0x4>; + reg-names = "rev", "sysc"; + ti,sysc-mask = ; + ti,sysc-sidle = , + , + , + ; + clocks = <&alwon_clkctrl DM816_TIMER2_CLKCTRL 0>; clock-names = "fck"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x48040000 0x1000>; + + timer2: timer@0 { + compatible = "ti,dm816-timer"; + reg = <0 0x1000>; + interrupts = <68>; + clocks = <&alwon_clkctrl DM816_TIMER2_CLKCTRL 0>; + clock-names = "fck"; + }; }; timer3: timer@48042000 { @@ -642,3 +674,23 @@ }; #include "dm816x-clocks.dtsi" + +/* Preferred always-on timer for clocksource */ +&timer1_target { + ti,no-reset-on-init; + ti,no-idle; + timer@0 { + assigned-clocks = <&timer1_fck>; + assigned-clock-parents = <&sys_clkin_ck>; + }; +}; + +/* Preferred timer for clockevent */ +&timer2_target { + ti,no-reset-on-init; + ti,no-idle; + timer@0 { + assigned-clocks = <&timer2_fck>; + assigned-clock-parents = <&sys_clkin_ck>; + }; +}; diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c index a10a74e95385..eeb3f97af520 100644 --- a/arch/arm/mach-omap2/board-generic.c +++ b/arch/arm/mach-omap2/board-generic.c @@ -201,7 +201,7 @@ DT_MACHINE_START(TI814X_DT, "Generic ti814x (Flattened Device Tree)") .init_early = ti814x_init_early, .init_machine = omap_generic_init, .init_late = ti81xx_init_late, - .init_time = omap3_gptimer_timer_init, + .init_time = omap_init_time_of, .dt_compat = ti814x_boards_compat, .restart = ti81xx_restart, MACHINE_END @@ -218,7 +218,7 @@ DT_MACHINE_START(TI816X_DT, "Generic ti816x (Flattened Device Tree)") .init_early = ti816x_init_early, .init_machine = omap_generic_init, .init_late = ti81xx_init_late, - .init_time = omap3_gptimer_timer_init, + .init_time = omap_init_time_of, .dt_compat = ti816x_boards_compat, .restart = ti81xx_restart, MACHINE_END diff --git a/arch/arm/mach-omap2/omap_hwmod_81xx_data.c b/arch/arm/mach-omap2/omap_hwmod_81xx_data.c index 6a9f1ad9d413..50fb699b163f 100644 --- a/arch/arm/mach-omap2/omap_hwmod_81xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_81xx_data.c @@ -690,76 +690,6 @@ static struct omap_hwmod_class dm816x_timer_hwmod_class = { .sysc = &dm816x_timer_sysc, }; -static struct omap_hwmod dm814x_timer1_hwmod = { - .name = "timer1", - .clkdm_name = "alwon_l3s_clkdm", - .main_clk = "timer1_fck", - .class = &dm816x_timer_hwmod_class, - .flags = HWMOD_NO_IDLEST, -}; - -static struct omap_hwmod_ocp_if dm814x_l4_ls__timer1 = { - .master = &dm81xx_l4_ls_hwmod, - .slave = &dm814x_timer1_hwmod, - .clk = "sysclk6_ck", - .user = OCP_USER_MPU, -}; - -static struct omap_hwmod dm816x_timer1_hwmod = { - .name = "timer1", - .clkdm_name = "alwon_l3s_clkdm", - .main_clk = "timer1_fck", - .prcm = { - .omap4 = { - .clkctrl_offs = DM816X_CM_ALWON_TIMER_1_CLKCTRL, - .modulemode = MODULEMODE_SWCTRL, - }, - }, - .class = &dm816x_timer_hwmod_class, -}; - -static struct omap_hwmod_ocp_if dm816x_l4_ls__timer1 = { - .master = &dm81xx_l4_ls_hwmod, - .slave = &dm816x_timer1_hwmod, - .clk = "sysclk6_ck", - .user = OCP_USER_MPU, -}; - -static struct omap_hwmod dm814x_timer2_hwmod = { - .name = "timer2", - .clkdm_name = "alwon_l3s_clkdm", - .main_clk = "timer2_fck", - .class = &dm816x_timer_hwmod_class, - .flags = HWMOD_NO_IDLEST, -}; - -static struct omap_hwmod_ocp_if dm814x_l4_ls__timer2 = { - .master = &dm81xx_l4_ls_hwmod, - .slave = &dm814x_timer2_hwmod, - .clk = "sysclk6_ck", - .user = OCP_USER_MPU, -}; - -static struct omap_hwmod dm816x_timer2_hwmod = { - .name = "timer2", - .clkdm_name = "alwon_l3s_clkdm", - .main_clk = "timer2_fck", - .prcm = { - .omap4 = { - .clkctrl_offs = DM816X_CM_ALWON_TIMER_2_CLKCTRL, - .modulemode = MODULEMODE_SWCTRL, - }, - }, - .class = &dm816x_timer_hwmod_class, -}; - -static struct omap_hwmod_ocp_if dm816x_l4_ls__timer2 = { - .master = &dm81xx_l4_ls_hwmod, - .slave = &dm816x_timer2_hwmod, - .clk = "sysclk6_ck", - .user = OCP_USER_MPU, -}; - static struct omap_hwmod dm816x_timer3_hwmod = { .name = "timer3", .clkdm_name = "alwon_l3s_clkdm", @@ -1288,8 +1218,6 @@ static struct omap_hwmod_ocp_if *dm814x_hwmod_ocp_ifs[] __initdata = { &dm814x_l4_ls__mmc1, &dm814x_l4_ls__mmc2, &ti81xx_l4_ls__rtc, - &dm814x_l4_ls__timer1, - &dm814x_l4_ls__timer2, &dm81xx_alwon_l3_slow__gpmc, &dm814x_default_l3_slow__usbss, &dm814x_alwon_l3_med__mmc3, @@ -1318,8 +1246,6 @@ static struct omap_hwmod_ocp_if *dm816x_hwmod_ocp_ifs[] __initdata = { &dm81xx_l4_ls__elm, &ti81xx_l4_ls__rtc, &dm816x_l4_ls__mmc1, - &dm816x_l4_ls__timer1, - &dm816x_l4_ls__timer2, &dm816x_l4_ls__timer3, &dm816x_l4_ls__timer4, &dm816x_l4_ls__timer5, -- cgit v1.2.3 From 64dbc3d55d60fd115e058e9f1689542daa37356c Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Thu, 7 May 2020 09:59:31 -0700 Subject: ARM: dts: Configure system timers for omap2 We can now init system timers using the dmtimer and 32k counter based on only devicetree data and drivers/clocksource timers. Let's configure the clocksource and clockevent, and drop the old unused platform data. As we're just dropping platform data, and the early platform data init is based on the custom ti,hwmods property, we want to drop both the platform data and ti,hwmods property in a single patch. Since the dmtimer can use both 32k clock and system clock as the source, let's also configure the SoC specific default values. The board specific dts files can reconfigure these with assigned-clocks and assigned-clock-parents as needed. Let's also update the dts file to use #include while at it. Cc: devicetree@vger.kernel.org Cc: Aaro Koskinen Cc: Grygorii Strashko Cc: Keerthy Cc: Lokesh Vutla Cc: Rob Herring Cc: Tero Kristo Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/omap2.dtsi | 31 ++++++++-- arch/arm/boot/dts/omap2420.dtsi | 68 ++++++++++++++++++---- arch/arm/boot/dts/omap2430.dtsi | 68 ++++++++++++++++++---- arch/arm/mach-omap2/board-generic.c | 4 +- arch/arm/mach-omap2/omap_hwmod_2420_data.c | 20 ------- arch/arm/mach-omap2/omap_hwmod_2430_data.c | 19 ------ .../mach-omap2/omap_hwmod_2xxx_interconnect_data.c | 8 --- arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c | 47 --------------- arch/arm/mach-omap2/omap_hwmod_common_data.h | 3 - 9 files changed, 140 insertions(+), 128 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/omap2.dtsi b/arch/arm/boot/dts/omap2.dtsi index 0e453fec2e3a..8a5cb44bfe2f 100644 --- a/arch/arm/boot/dts/omap2.dtsi +++ b/arch/arm/boot/dts/omap2.dtsi @@ -201,11 +201,32 @@ clock-frequency = <48000000>; }; - timer2: timer@4802a000 { - compatible = "ti,omap2420-timer"; - reg = <0x4802a000 0x400>; - interrupts = <38>; - ti,hwmods = "timer2"; + timer2_target: target-module@4802a000 { + compatible = "ti,sysc-omap2-timer", "ti,sysc"; + reg = <0x4802a000 0x4>, + <0x4802a010 0x4>, + <0x4802a014 0x4>; + reg-names = "rev", "sysc", "syss"; + ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | + SYSC_OMAP2_EMUFREE | + SYSC_OMAP2_ENAWAKEUP | + SYSC_OMAP2_SOFTRESET | + SYSC_OMAP2_AUTOIDLE)>; + ti,sysc-sidle = , + , + ; + ti,syss-mask = <1>; + clocks = <&gpt2_fck>, <&gpt2_ick>; + clock-names = "fck", "ick"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x4802a000 0x1000>; + + timer2: timer@0 { + compatible = "ti,omap2420-timer"; + reg = <0 0x400>; + interrupts = <38>; + }; }; timer3: timer@48078000 { diff --git a/arch/arm/boot/dts/omap2420.dtsi b/arch/arm/boot/dts/omap2420.dtsi index aba542d63d6d..6c5c7c0e8b94 100644 --- a/arch/arm/boot/dts/omap2420.dtsi +++ b/arch/arm/boot/dts/omap2420.dtsi @@ -68,10 +68,23 @@ }; }; - counter32k: counter@4000 { - compatible = "ti,omap-counter32k"; - reg = <0x4000 0x20>; - ti,hwmods = "counter_32k"; + target-module@4000 { + compatible = "ti,sysc-omap2", "ti,sysc"; + reg = <0x4000 0x4>, + <0x4004 0x4>; + reg-names = "rev", "sysc"; + ti,sysc-sidle = , + ; + clocks = <&func_32k_ck>; + clock-names = "fck"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x4000 0x1000>; + + counter32k: counter@0 { + compatible = "ti,omap-counter32k"; + reg = <0 0x20>; + }; }; }; @@ -194,12 +207,33 @@ }; }; - timer1: timer@48028000 { - compatible = "ti,omap2420-timer"; - reg = <0x48028000 0x400>; - interrupts = <37>; - ti,hwmods = "timer1"; - ti,timer-alwon; + timer1_target: target-module@48028000 { + compatible = "ti,sysc-omap2-timer", "ti,sysc"; + reg = <0x48028000 0x4>, + <0x48028010 0x4>, + <0x48028014 0x4>; + reg-names = "rev", "sysc", "syss"; + ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | + SYSC_OMAP2_EMUFREE | + SYSC_OMAP2_ENAWAKEUP | + SYSC_OMAP2_SOFTRESET | + SYSC_OMAP2_AUTOIDLE)>; + ti,sysc-sidle = , + , + ; + ti,syss-mask = <1>; + clocks = <&gpt1_fck>, <&gpt1_ick>; + clock-names = "fck", "ick"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x48028000 0x1000>; + + timer1: timer@0 { + compatible = "ti,omap2420-timer"; + reg = <0 0x400>; + interrupts = <37>; + ti,timer-alwon; + }; }; wd_timer2: wdt@48022000 { @@ -218,5 +252,15 @@ compatible = "ti,omap2420-i2c"; }; -/include/ "omap24xx-clocks.dtsi" -/include/ "omap2420-clocks.dtsi" +#include "omap24xx-clocks.dtsi" +#include "omap2420-clocks.dtsi" + +/* Preferred always-on timer for clockevent */ +&timer1_target { + ti,no-reset-on-init; + ti,no-idle; + timer@0 { + assigned-clocks = <&gpt1_fck>; + assigned-clock-parents = <&func_32k_ck>; + }; +}; diff --git a/arch/arm/boot/dts/omap2430.dtsi b/arch/arm/boot/dts/omap2430.dtsi index 15ef7593be12..6a1f5bb3c06a 100644 --- a/arch/arm/boot/dts/omap2430.dtsi +++ b/arch/arm/boot/dts/omap2430.dtsi @@ -81,10 +81,23 @@ }; }; - counter32k: counter@20000 { - compatible = "ti,omap-counter32k"; - reg = <0x20000 0x20>; - ti,hwmods = "counter_32k"; + target-module@20000 { + compatible = "ti,sysc-omap2", "ti,sysc"; + reg = <0x20000 0x4>, + <0x20004 0x4>; + reg-names = "rev", "sysc"; + ti,sysc-sidle = , + ; + clocks = <&func_32k_ck>; + clock-names = "fck"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x20000 0x1000>; + + counter32k: counter@0 { + compatible = "ti,omap-counter32k"; + reg = <0 0x20>; + }; }; }; @@ -277,12 +290,33 @@ }; }; - timer1: timer@49018000 { - compatible = "ti,omap2420-timer"; - reg = <0x49018000 0x400>; - interrupts = <37>; - ti,hwmods = "timer1"; - ti,timer-alwon; + timer1_target: target-module@49018000 { + compatible = "ti,sysc-omap2-timer", "ti,sysc"; + reg = <0x49018000 0x4>, + <0x49018010 0x4>, + <0x49018014 0x4>; + reg-names = "rev", "sysc", "syss"; + ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | + SYSC_OMAP2_EMUFREE | + SYSC_OMAP2_ENAWAKEUP | + SYSC_OMAP2_SOFTRESET | + SYSC_OMAP2_AUTOIDLE)>; + ti,sysc-sidle = , + , + ; + ti,syss-mask = <1>; + clocks = <&gpt1_fck>, <&gpt1_ick>; + clock-names = "fck", "ick"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x49018000 0x1000>; + + timer1: timer@0 { + compatible = "ti,omap2420-timer"; + reg = <0 0x400>; + interrupts = <37>; + ti,timer-alwon; + }; }; mcspi3: spi@480b8000 { @@ -321,5 +355,15 @@ compatible = "ti,omap2430-i2c"; }; -/include/ "omap24xx-clocks.dtsi" -/include/ "omap2430-clocks.dtsi" +#include "omap24xx-clocks.dtsi" +#include "omap2430-clocks.dtsi" + +/* Preferred always-on timer for clockevent */ +&timer1_target { + ti,no-reset-on-init; + ti,no-idle; + timer@0 { + assigned-clocks = <&gpt1_fck>; + assigned-clock-parents = <&func_32k_ck>; + }; +}; diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c index eeb3f97af520..cafeb822bab7 100644 --- a/arch/arm/mach-omap2/board-generic.c +++ b/arch/arm/mach-omap2/board-generic.c @@ -50,7 +50,7 @@ DT_MACHINE_START(OMAP242X_DT, "Generic OMAP2420 (Flattened Device Tree)") .map_io = omap242x_map_io, .init_early = omap2420_init_early, .init_machine = omap_generic_init, - .init_time = omap_init_time, + .init_time = omap_init_time_of, .dt_compat = omap242x_boards_compat, .restart = omap2xxx_restart, MACHINE_END @@ -67,7 +67,7 @@ DT_MACHINE_START(OMAP243X_DT, "Generic OMAP2430 (Flattened Device Tree)") .map_io = omap243x_map_io, .init_early = omap2430_init_early, .init_machine = omap_generic_init, - .init_time = omap_init_time, + .init_time = omap_init_time_of, .dt_compat = omap243x_boards_compat, .restart = omap2xxx_restart, MACHINE_END diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c index b14442cf6179..558fae4375ba 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c @@ -264,14 +264,6 @@ static struct omap_hwmod_ocp_if omap2420_l3__dsp = { .user = OCP_USER_MPU | OCP_USER_SDMA, }; -/* l4_wkup -> timer1 */ -static struct omap_hwmod_ocp_if omap2420_l4_wkup__timer1 = { - .master = &omap2xxx_l4_wkup_hwmod, - .slave = &omap2xxx_timer1_hwmod, - .clk = "gpt1_ick", - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - /* l4_wkup -> wd_timer2 */ static struct omap_hwmod_ocp_if omap2420_l4_wkup__wd_timer2 = { .master = &omap2xxx_l4_wkup_hwmod, @@ -352,15 +344,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__hdq1w = { .flags = OMAP_FIREWALL_L4 | OCPIF_SWSUP_IDLE, }; - -/* l4_wkup -> 32ksync_counter */ -static struct omap_hwmod_ocp_if omap2420_l4_wkup__counter_32k = { - .master = &omap2xxx_l4_wkup_hwmod, - .slave = &omap2xxx_counter_32k_hwmod, - .clk = "sync_32k_ick", - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - static struct omap_hwmod_ocp_if omap2420_l3__gpmc = { .master = &omap2xxx_l3_main_hwmod, .slave = &omap2xxx_gpmc_hwmod, @@ -382,8 +365,6 @@ static struct omap_hwmod_ocp_if *omap2420_hwmod_ocp_ifs[] __initdata = { &omap2420_l4_core__i2c2, &omap2420_l3__iva, &omap2420_l3__dsp, - &omap2420_l4_wkup__timer1, - &omap2xxx_l4_core__timer2, &omap2xxx_l4_core__timer3, &omap2xxx_l4_core__timer4, &omap2xxx_l4_core__timer5, @@ -411,7 +392,6 @@ static struct omap_hwmod_ocp_if *omap2420_hwmod_ocp_ifs[] __initdata = { &omap2xxx_l4_core__sham, &omap2xxx_l4_core__aes, &omap2420_l4_core__hdq1w, - &omap2420_l4_wkup__counter_32k, &omap2420_l3__gpmc, NULL, }; diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c index 41a37c74f9a6..c93200801b34 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c @@ -436,14 +436,6 @@ static struct omap_hwmod_ocp_if omap2430_l3__iva = { .user = OCP_USER_MPU | OCP_USER_SDMA, }; -/* l4_wkup -> timer1 */ -static struct omap_hwmod_ocp_if omap2430_l4_wkup__timer1 = { - .master = &omap2xxx_l4_wkup_hwmod, - .slave = &omap2xxx_timer1_hwmod, - .clk = "gpt1_ick", - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - /* l4_wkup -> wd_timer2 */ static struct omap_hwmod_ocp_if omap2430_l4_wkup__wd_timer2 = { .master = &omap2xxx_l4_wkup_hwmod, @@ -548,14 +540,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__hdq1w = { .flags = OMAP_FIREWALL_L4 | OCPIF_SWSUP_IDLE, }; -/* l4_wkup -> 32ksync_counter */ -static struct omap_hwmod_ocp_if omap2430_l4_wkup__counter_32k = { - .master = &omap2xxx_l4_wkup_hwmod, - .slave = &omap2xxx_counter_32k_hwmod, - .clk = "sync_32k_ick", - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - static struct omap_hwmod_ocp_if omap2430_l3__gpmc = { .master = &omap2xxx_l3_main_hwmod, .slave = &omap2xxx_gpmc_hwmod, @@ -581,8 +565,6 @@ static struct omap_hwmod_ocp_if *omap2430_hwmod_ocp_ifs[] __initdata = { &omap2xxx_l4_core__mcspi2, &omap2430_l4_core__mcspi3, &omap2430_l3__iva, - &omap2430_l4_wkup__timer1, - &omap2xxx_l4_core__timer2, &omap2xxx_l4_core__timer3, &omap2xxx_l4_core__timer4, &omap2xxx_l4_core__timer5, @@ -613,7 +595,6 @@ static struct omap_hwmod_ocp_if *omap2430_hwmod_ocp_ifs[] __initdata = { &omap2xxx_l4_core__rng, &omap2xxx_l4_core__sham, &omap2xxx_l4_core__aes, - &omap2430_l4_wkup__counter_32k, &omap2430_l3__gpmc, NULL, }; diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c index eef96adea411..518e877bb2a1 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c @@ -95,14 +95,6 @@ struct omap_hwmod_ocp_if omap2xxx_l4_core__mcspi2 = { .user = OCP_USER_MPU | OCP_USER_SDMA, }; -/* l4_core -> timer2 */ -struct omap_hwmod_ocp_if omap2xxx_l4_core__timer2 = { - .master = &omap2xxx_l4_core_hwmod, - .slave = &omap2xxx_timer2_hwmod, - .clk = "gpt2_ick", - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - /* l4_core -> timer3 */ struct omap_hwmod_ocp_if omap2xxx_l4_core__timer3 = { .master = &omap2xxx_l4_core_hwmod, diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c index a445704d43d9..9156f2bfbc8d 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c @@ -195,36 +195,6 @@ struct omap_hwmod omap2xxx_iva_hwmod = { .class = &iva_hwmod_class, }; -/* timer1 */ -struct omap_hwmod omap2xxx_timer1_hwmod = { - .name = "timer1", - .main_clk = "gpt1_fck", - .prcm = { - .omap2 = { - .module_offs = WKUP_MOD, - .idlest_reg_id = 1, - .idlest_idle_bit = OMAP24XX_ST_GPT1_SHIFT, - }, - }, - .class = &omap2xxx_timer_hwmod_class, - .flags = HWMOD_SET_DEFAULT_CLOCKACT, -}; - -/* timer2 */ -struct omap_hwmod omap2xxx_timer2_hwmod = { - .name = "timer2", - .main_clk = "gpt2_fck", - .prcm = { - .omap2 = { - .module_offs = CORE_MOD, - .idlest_reg_id = 1, - .idlest_idle_bit = OMAP24XX_ST_GPT2_SHIFT, - }, - }, - .class = &omap2xxx_timer_hwmod_class, - .flags = HWMOD_SET_DEFAULT_CLOCKACT, -}; - /* timer3 */ struct omap_hwmod omap2xxx_timer3_hwmod = { .name = "timer3", @@ -595,23 +565,6 @@ struct omap_hwmod omap2xxx_mcspi2_hwmod = { .class = &omap2xxx_mcspi_class, }; -static struct omap_hwmod_class omap2xxx_counter_hwmod_class = { - .name = "counter", -}; - -struct omap_hwmod omap2xxx_counter_32k_hwmod = { - .name = "counter_32k", - .main_clk = "func_32k_ck", - .prcm = { - .omap2 = { - .module_offs = WKUP_MOD, - .idlest_reg_id = 1, - .idlest_idle_bit = OMAP24XX_ST_32KSYNC_SHIFT, - }, - }, - .class = &omap2xxx_counter_hwmod_class, -}; - /* gpmc */ struct omap_hwmod omap2xxx_gpmc_hwmod = { .name = "gpmc", diff --git a/arch/arm/mach-omap2/omap_hwmod_common_data.h b/arch/arm/mach-omap2/omap_hwmod_common_data.h index c85cb8b5831c..0045e6680a63 100644 --- a/arch/arm/mach-omap2/omap_hwmod_common_data.h +++ b/arch/arm/mach-omap2/omap_hwmod_common_data.h @@ -21,8 +21,6 @@ extern struct omap_hwmod omap2xxx_l4_core_hwmod; extern struct omap_hwmod omap2xxx_l4_wkup_hwmod; extern struct omap_hwmod omap2xxx_mpu_hwmod; extern struct omap_hwmod omap2xxx_iva_hwmod; -extern struct omap_hwmod omap2xxx_timer1_hwmod; -extern struct omap_hwmod omap2xxx_timer2_hwmod; extern struct omap_hwmod omap2xxx_timer3_hwmod; extern struct omap_hwmod omap2xxx_timer4_hwmod; extern struct omap_hwmod omap2xxx_timer5_hwmod; @@ -47,7 +45,6 @@ extern struct omap_hwmod omap2xxx_gpio3_hwmod; extern struct omap_hwmod omap2xxx_gpio4_hwmod; extern struct omap_hwmod omap2xxx_mcspi1_hwmod; extern struct omap_hwmod omap2xxx_mcspi2_hwmod; -extern struct omap_hwmod omap2xxx_counter_32k_hwmod; extern struct omap_hwmod omap2xxx_gpmc_hwmod; extern struct omap_hwmod omap2xxx_rng_hwmod; extern struct omap_hwmod omap2xxx_sham_hwmod; -- cgit v1.2.3 From 2ee04b88547ab4c46aa2a258efd0f91fc705b6d6 Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Thu, 7 May 2020 09:59:31 -0700 Subject: ARM: OMAP2+: Drop old timer code for dmtimer and 32k counter With dmtimer and 32k counter being initialized based on devicetree data, we can just drop the old timer code. This still leaves the omap5 and dra7 realtime_counter_init() that depend on the smc calls and control module platform code for the dra7 quirk init. Cc: Grygorii Strashko Cc: Keerthy Cc: Lokesh Vutla Cc: Rob Herring Cc: Tero Kristo Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/Makefile | 4 +- arch/arm/mach-omap2/common.h | 7 + arch/arm/mach-omap2/timer.c | 551 ------------------------------------------- 3 files changed, 10 insertions(+), 552 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile index 5017a3be0ff0..07616d346557 100644 --- a/arch/arm/mach-omap2/Makefile +++ b/arch/arm/mach-omap2/Makefile @@ -7,7 +7,7 @@ ccflags-y := -I$(srctree)/$(src)/include \ -I$(srctree)/arch/arm/plat-omap/include # Common support -obj-y := id.o io.o control.o devices.o fb.o timer.o pm.o \ +obj-y := id.o io.o control.o devices.o fb.o pm.o \ common.o dma.o wd_timer.o display.o i2c.o hdq1w.o omap_hwmod.o \ omap_device.o omap-headsmp.o sram.o @@ -16,6 +16,8 @@ hwmod-common = omap_hwmod.o omap_hwmod_reset.o \ clock-common = clock.o secure-common = omap-smc.o omap-secure.o +obj-$(CONFIG_SOC_HAS_REALTIME_COUNTER) += timer.o + obj-$(CONFIG_ARCH_OMAP2) += $(omap-2-3-common) $(hwmod-common) obj-$(CONFIG_ARCH_OMAP3) += $(omap-2-3-common) $(hwmod-common) $(secure-common) obj-$(CONFIG_ARCH_OMAP4) += $(hwmod-common) $(secure-common) diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h index 75d729943958..49926eced5f1 100644 --- a/arch/arm/mach-omap2/common.h +++ b/arch/arm/mach-omap2/common.h @@ -111,7 +111,14 @@ static inline int omap_l2_cache_init(void) #define OMAP_L2C_AUX_CTRL 0 #define omap4_l2c310_write_sec NULL #endif + +#ifdef CONFIG_SOC_HAS_REALTIME_COUNTER extern void omap5_realtime_timer_init(void); +#else +static inline void omap5_realtime_timer_init(void) +{ +} +#endif void omap2420_init_early(void); void omap2430_init_early(void); diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c index 662a31004b91..2d4ea386fc38 100644 --- a/arch/arm/mach-omap2/timer.c +++ b/arch/arm/mach-omap2/timer.c @@ -26,34 +26,12 @@ * License. See the file "COPYING" in the main directory of this archive * for more details. */ -#include -#include -#include -#include #include -#include -#include #include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#include "omap_hwmod.h" -#include "omap_device.h" -#include -#include #include "soc.h" #include "common.h" #include "control.h" -#include "powerdomain.h" #include "omap-secure.h" #define REALTIME_COUNTER_BASE 0x48243200 @@ -61,294 +39,12 @@ #define INCREMENTER_DENUMERATOR_RELOAD_OFFSET 0x14 #define NUMERATOR_DENUMERATOR_MASK 0xfffff000 -/* Clockevent code */ - -static struct omap_dm_timer clkev; -static struct clock_event_device clockevent_gpt; - -/* Clockevent hwmod for am335x and am437x suspend */ -static struct omap_hwmod *clockevent_gpt_hwmod; - -/* Clockesource hwmod for am437x suspend */ -static struct omap_hwmod *clocksource_gpt_hwmod; - -#ifdef CONFIG_SOC_HAS_REALTIME_COUNTER static unsigned long arch_timer_freq; void set_cntfreq(void) { omap_smc1(OMAP5_DRA7_MON_SET_CNTFRQ_INDEX, arch_timer_freq); } -#endif - -static irqreturn_t omap2_gp_timer_interrupt(int irq, void *dev_id) -{ - struct clock_event_device *evt = &clockevent_gpt; - - __omap_dm_timer_write_status(&clkev, OMAP_TIMER_INT_OVERFLOW); - - evt->event_handler(evt); - return IRQ_HANDLED; -} - -static int omap2_gp_timer_set_next_event(unsigned long cycles, - struct clock_event_device *evt) -{ - __omap_dm_timer_load_start(&clkev, OMAP_TIMER_CTRL_ST, - 0xffffffff - cycles, OMAP_TIMER_POSTED); - - return 0; -} - -static int omap2_gp_timer_shutdown(struct clock_event_device *evt) -{ - __omap_dm_timer_stop(&clkev, OMAP_TIMER_POSTED, clkev.rate); - return 0; -} - -static int omap2_gp_timer_set_periodic(struct clock_event_device *evt) -{ - u32 period; - - __omap_dm_timer_stop(&clkev, OMAP_TIMER_POSTED, clkev.rate); - - period = clkev.rate / HZ; - period -= 1; - /* Looks like we need to first set the load value separately */ - __omap_dm_timer_write(&clkev, OMAP_TIMER_LOAD_REG, 0xffffffff - period, - OMAP_TIMER_POSTED); - __omap_dm_timer_load_start(&clkev, - OMAP_TIMER_CTRL_AR | OMAP_TIMER_CTRL_ST, - 0xffffffff - period, OMAP_TIMER_POSTED); - return 0; -} - -static void omap_clkevt_idle(struct clock_event_device *unused) -{ - if (!clockevent_gpt_hwmod) - return; - - omap_hwmod_idle(clockevent_gpt_hwmod); -} - -static void omap_clkevt_unidle(struct clock_event_device *unused) -{ - if (!clockevent_gpt_hwmod) - return; - - omap_hwmod_enable(clockevent_gpt_hwmod); - __omap_dm_timer_int_enable(&clkev, OMAP_TIMER_INT_OVERFLOW); -} - -static struct clock_event_device clockevent_gpt = { - .features = CLOCK_EVT_FEAT_PERIODIC | - CLOCK_EVT_FEAT_ONESHOT, - .rating = 300, - .set_next_event = omap2_gp_timer_set_next_event, - .set_state_shutdown = omap2_gp_timer_shutdown, - .set_state_periodic = omap2_gp_timer_set_periodic, - .set_state_oneshot = omap2_gp_timer_shutdown, - .tick_resume = omap2_gp_timer_shutdown, -}; - -static const struct of_device_id omap_timer_match[] __initconst = { - { .compatible = "ti,omap2420-timer", }, - { .compatible = "ti,omap3430-timer", }, - { .compatible = "ti,omap4430-timer", }, - { .compatible = "ti,omap5430-timer", }, - { .compatible = "ti,dm814-timer", }, - { .compatible = "ti,dm816-timer", }, - { .compatible = "ti,am335x-timer", }, - { .compatible = "ti,am335x-timer-1ms", }, - { } -}; - -static int omap_timer_add_disabled_property(struct device_node *np) -{ - struct property *prop; - - prop = kzalloc(sizeof(*prop), GFP_KERNEL); - if (!prop) - return -ENOMEM; - - prop->name = "status"; - prop->value = "disabled"; - prop->length = strlen(prop->value); - - return of_add_property(np, prop); -} - -static int omap_timer_update_dt(struct device_node *np) -{ - int error = 0; - - if (!of_device_is_compatible(np, "ti,omap-counter32k")) { - error = omap_timer_add_disabled_property(np); - if (error) - return error; - } - - /* No parent interconnect target module configured? */ - if (of_get_property(np, "ti,hwmods", NULL)) - return error; - - /* Tag parent interconnect target module disabled */ - error = omap_timer_add_disabled_property(np->parent); - if (error) - return error; - - return 0; -} - -/** - * omap_get_timer_dt - get a timer using device-tree - * @match - device-tree match structure for matching a device type - * @property - optional timer property to match - * - * Helper function to get a timer during early boot using device-tree for use - * as kernel system timer. Optionally, the property argument can be used to - * select a timer with a specific property. Once a timer is found then mark - * the timer node in device-tree as disabled, to prevent the kernel from - * registering this timer as a platform device and so no one else can use it. - */ -static struct device_node * __init omap_get_timer_dt(const struct of_device_id *match, - const char *property) -{ - struct device_node *np; - int error; - - for_each_matching_node(np, match) { - if (!of_device_is_available(np)) - continue; - - if (property && !of_get_property(np, property, NULL)) - continue; - - if (!property && (of_get_property(np, "ti,timer-alwon", NULL) || - of_get_property(np, "ti,timer-dsp", NULL) || - of_get_property(np, "ti,timer-pwm", NULL) || - of_get_property(np, "ti,timer-secure", NULL))) - continue; - - error = omap_timer_update_dt(np); - WARN(error, "%s: Could not update dt: %i\n", __func__, error); - - return np; - } - - return NULL; -} - -/** - * omap_dmtimer_init - initialisation function when device tree is used - * - * For secure OMAP3/DRA7xx devices, timers with device type "timer-secure" - * cannot be used by the kernel as they are reserved. Therefore, to prevent the - * kernel registering these devices remove them dynamically from the device - * tree on boot. - */ -static void __init omap_dmtimer_init(void) -{ - struct device_node *np; - - if (!cpu_is_omap34xx() && !soc_is_dra7xx()) - return; - - /* If we are a secure device, remove any secure timer nodes */ - if ((omap_type() != OMAP2_DEVICE_TYPE_GP)) { - np = omap_get_timer_dt(omap_timer_match, "ti,timer-secure"); - of_node_put(np); - } -} - -/** - * omap_dm_timer_get_errata - get errata flags for a timer - * - * Get the timer errata flags that are specific to the OMAP device being used. - */ -static u32 __init omap_dm_timer_get_errata(void) -{ - if (cpu_is_omap24xx()) - return 0; - - return OMAP_TIMER_ERRATA_I103_I767; -} - -static int __init omap_dm_timer_init_one(struct omap_dm_timer *timer, - const char *fck_source, - const char *property, - const char **timer_name, - int posted) -{ - const char *oh_name = NULL; - struct device_node *np; - struct omap_hwmod *oh; - struct clk *src; - int r = 0; - - np = omap_get_timer_dt(omap_timer_match, property); - if (!np) - return -ENODEV; - - of_property_read_string_index(np, "ti,hwmods", 0, &oh_name); - if (!oh_name) { - of_property_read_string_index(np->parent, "ti,hwmods", 0, - &oh_name); - if (!oh_name) - return -ENODEV; - } - - timer->irq = irq_of_parse_and_map(np, 0); - if (!timer->irq) - return -ENXIO; - - timer->io_base = of_iomap(np, 0); - - timer->fclk = of_clk_get_by_name(np, "fck"); - - of_node_put(np); - - oh = omap_hwmod_lookup(oh_name); - if (!oh) - return -ENODEV; - - *timer_name = oh->name; - - if (!timer->io_base) - return -ENXIO; - - omap_hwmod_setup_one(oh_name); - - /* After the dmtimer is using hwmod these clocks won't be needed */ - if (IS_ERR_OR_NULL(timer->fclk)) - timer->fclk = clk_get(NULL, omap_hwmod_get_main_clk(oh)); - if (IS_ERR(timer->fclk)) - return PTR_ERR(timer->fclk); - - src = clk_get(NULL, fck_source); - if (IS_ERR(src)) - return PTR_ERR(src); - - WARN(clk_set_parent(timer->fclk, src) < 0, - "Cannot set timer parent clock, no PLL clock driver?"); - - clk_put(src); - - omap_hwmod_enable(oh); - __omap_dm_timer_init_regs(timer); - - if (posted) - __omap_dm_timer_enable_posted(timer); - - /* Check that the intended posted configuration matches the actual */ - if (posted != timer->posted) - return -EINVAL; - - timer->rate = clk_get_rate(timer->fclk); - timer->reserved = 1; - - return r; -} #if !defined(CONFIG_SMP) && defined(CONFIG_GENERIC_CLOCKEVENTS_BROADCAST) void tick_broadcast(const struct cpumask *mask) @@ -356,226 +52,6 @@ void tick_broadcast(const struct cpumask *mask) } #endif -static void __init omap2_gp_clockevent_init(int gptimer_id, - const char *fck_source, - const char *property) -{ - int res; - - clkev.id = gptimer_id; - clkev.errata = omap_dm_timer_get_errata(); - - /* - * For clock-event timers we never read the timer counter and - * so we are not impacted by errata i103 and i767. Therefore, - * we can safely ignore this errata for clock-event timers. - */ - __omap_dm_timer_override_errata(&clkev, OMAP_TIMER_ERRATA_I103_I767); - - res = omap_dm_timer_init_one(&clkev, fck_source, property, - &clockevent_gpt.name, OMAP_TIMER_POSTED); - BUG_ON(res); - - if (request_irq(clkev.irq, omap2_gp_timer_interrupt, - IRQF_TIMER | IRQF_IRQPOLL, "gp_timer", &clkev)) - pr_err("Failed to request irq %d (gp_timer)\n", clkev.irq); - - __omap_dm_timer_int_enable(&clkev, OMAP_TIMER_INT_OVERFLOW); - - clockevent_gpt.cpumask = cpu_possible_mask; - clockevent_gpt.irq = omap_dm_timer_get_irq(&clkev); - clockevents_config_and_register(&clockevent_gpt, clkev.rate, - 3, /* Timer internal resynch latency */ - 0xffffffff); - - if (soc_is_am33xx() || soc_is_am43xx()) { - clockevent_gpt.suspend = omap_clkevt_idle; - clockevent_gpt.resume = omap_clkevt_unidle; - - clockevent_gpt_hwmod = - omap_hwmod_lookup(clockevent_gpt.name); - } - - pr_info("OMAP clockevent source: %s at %lu Hz\n", clockevent_gpt.name, - clkev.rate); -} - -/* Clocksource code */ -static struct omap_dm_timer clksrc; -static bool use_gptimer_clksrc __initdata; - -/* - * clocksource - */ -static u64 clocksource_read_cycles(struct clocksource *cs) -{ - return (u64)__omap_dm_timer_read_counter(&clksrc, - OMAP_TIMER_NONPOSTED); -} - -static struct clocksource clocksource_gpt = { - .rating = 300, - .read = clocksource_read_cycles, - .mask = CLOCKSOURCE_MASK(32), - .flags = CLOCK_SOURCE_IS_CONTINUOUS, -}; - -static u64 notrace dmtimer_read_sched_clock(void) -{ - if (clksrc.reserved) - return __omap_dm_timer_read_counter(&clksrc, - OMAP_TIMER_NONPOSTED); - - return 0; -} - -static const struct of_device_id omap_counter_match[] __initconst = { - { .compatible = "ti,omap-counter32k", }, - { } -}; - -/* Setup free-running counter for clocksource */ -static int __init __maybe_unused omap2_sync32k_clocksource_init(void) -{ - int ret; - struct device_node *np = NULL; - struct omap_hwmod *oh; - const char *oh_name = "counter_32k"; - - /* - * See if the 32kHz counter is supported. - */ - np = omap_get_timer_dt(omap_counter_match, NULL); - if (!np) - return -ENODEV; - - of_property_read_string_index(np->parent, "ti,hwmods", 0, &oh_name); - if (!oh_name) { - of_property_read_string_index(np, "ti,hwmods", 0, &oh_name); - if (!oh_name) - return -ENODEV; - } - - /* - * First check hwmod data is available for sync32k counter - */ - oh = omap_hwmod_lookup(oh_name); - if (!oh || oh->slaves_cnt == 0) - return -ENODEV; - - omap_hwmod_setup_one(oh_name); - - ret = omap_hwmod_enable(oh); - if (ret) { - pr_warn("%s: failed to enable counter_32k module (%d)\n", - __func__, ret); - return ret; - } - - return ret; -} - -static unsigned int omap2_gptimer_clksrc_load; - -static void omap2_gptimer_clksrc_suspend(struct clocksource *unused) -{ - omap2_gptimer_clksrc_load = - __omap_dm_timer_read_counter(&clksrc, OMAP_TIMER_NONPOSTED); - - omap_hwmod_idle(clocksource_gpt_hwmod); -} - -static void omap2_gptimer_clksrc_resume(struct clocksource *unused) -{ - omap_hwmod_enable(clocksource_gpt_hwmod); - - __omap_dm_timer_load_start(&clksrc, - OMAP_TIMER_CTRL_ST | OMAP_TIMER_CTRL_AR, - omap2_gptimer_clksrc_load, - OMAP_TIMER_NONPOSTED); -} - -static void __init omap2_gptimer_clocksource_init(int gptimer_id, - const char *fck_source, - const char *property) -{ - int res; - - clksrc.id = gptimer_id; - clksrc.errata = omap_dm_timer_get_errata(); - - res = omap_dm_timer_init_one(&clksrc, fck_source, property, - &clocksource_gpt.name, - OMAP_TIMER_NONPOSTED); - - if (soc_is_am43xx()) { - clocksource_gpt.suspend = omap2_gptimer_clksrc_suspend; - clocksource_gpt.resume = omap2_gptimer_clksrc_resume; - - clocksource_gpt_hwmod = - omap_hwmod_lookup(clocksource_gpt.name); - } - - BUG_ON(res); - - __omap_dm_timer_load_start(&clksrc, - OMAP_TIMER_CTRL_ST | OMAP_TIMER_CTRL_AR, 0, - OMAP_TIMER_NONPOSTED); - sched_clock_register(dmtimer_read_sched_clock, 32, clksrc.rate); - - if (clocksource_register_hz(&clocksource_gpt, clksrc.rate)) - pr_err("Could not register clocksource %s\n", - clocksource_gpt.name); - else - pr_info("OMAP clocksource: %s at %lu Hz\n", - clocksource_gpt.name, clksrc.rate); -} - -static void __init __omap_sync32k_timer_init(int clkev_nr, const char *clkev_src, - const char *clkev_prop, int clksrc_nr, const char *clksrc_src, - const char *clksrc_prop, bool gptimer) -{ - omap_clk_init(); - omap_dmtimer_init(); - omap2_gp_clockevent_init(clkev_nr, clkev_src, clkev_prop); - - /* Enable the use of clocksource="gp_timer" kernel parameter */ - if (clksrc_nr && (use_gptimer_clksrc || gptimer)) - omap2_gptimer_clocksource_init(clksrc_nr, clksrc_src, - clksrc_prop); - else - omap2_sync32k_clocksource_init(); -} - -void __init omap_init_time(void) -{ - __omap_sync32k_timer_init(1, "timer_32k_ck", "ti,timer-alwon", - 2, "timer_sys_ck", NULL, false); - - timer_probe(); -} - -#if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_SOC_AM43XX) -void __init omap3_secure_sync32k_timer_init(void) -{ - __omap_sync32k_timer_init(12, "secure_32k_fck", "ti,timer-secure", - 2, "timer_sys_ck", NULL, false); - - timer_probe(); -} -#endif /* CONFIG_ARCH_OMAP3 */ - -#if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_SOC_AM33XX) || \ - defined(CONFIG_SOC_AM43XX) -void __init omap3_gptimer_timer_init(void) -{ - __omap_sync32k_timer_init(2, "timer_sys_ck", NULL, - 1, "timer_sys_ck", "ti,timer-alwon", true); - if (of_have_populated_dt()) - timer_probe(); -} -#endif - #if defined(CONFIG_SOC_OMAP5) || defined(CONFIG_SOC_DRA7XX) /* @@ -589,7 +65,6 @@ void __init omap3_gptimer_timer_init(void) */ static void __init realtime_counter_init(void) { -#ifdef CONFIG_SOC_HAS_REALTIME_COUNTER void __iomem *base; static struct clk *sys_clk; unsigned long rate; @@ -688,7 +163,6 @@ sysclk1_based: set_cntfreq(); iounmap(base); -#endif } void __init omap5_realtime_timer_init(void) @@ -699,28 +173,3 @@ void __init omap5_realtime_timer_init(void) timer_probe(); } #endif /* CONFIG_SOC_OMAP5 || CONFIG_SOC_DRA7XX */ - -/** - * omap2_override_clocksource - clocksource override with user configuration - * - * Allows user to override default clocksource, using kernel parameter - * clocksource="gp_timer" (For all OMAP2PLUS architectures) - * - * Note that, here we are using same standard kernel parameter "clocksource=", - * and not introducing any OMAP specific interface. - */ -static int __init omap2_override_clocksource(char *str) -{ - if (!str) - return 0; - /* - * For OMAP architecture, we only have two options - * - sync_32k (default) - * - gp_timer (sys_clk based) - */ - if (!strcmp(str, "gp_timer")) - use_gptimer_clksrc = true; - - return 0; -} -early_param("clocksource", omap2_override_clocksource); -- cgit v1.2.3 From 64d7bf58e72be362ce2f2682e1250dcf2e61a1e6 Mon Sep 17 00:00:00 2001 From: Ma Feng Date: Mon, 11 May 2020 20:36:04 +0800 Subject: ARM: imx: pcm037: make pcm970_sja1000_platform_data static Fix sparse warning: arch/arm/mach-imx/mach-pcm037.c:407:30: warning: symbol 'pcm970_sja1000_platform_data' was not declared. Should it be static? Reported-by: Hulk Robot Signed-off-by: Ma Feng Signed-off-by: Shawn Guo --- arch/arm/mach-imx/mach-pcm037.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-imx/mach-pcm037.c b/arch/arm/mach-imx/mach-pcm037.c index bd9443fa6edc..c7d23e9d4f8b 100644 --- a/arch/arm/mach-imx/mach-pcm037.c +++ b/arch/arm/mach-imx/mach-pcm037.c @@ -404,7 +404,7 @@ static struct resource pcm970_sja1000_resources[] = { }, }; -struct sja1000_platform_data pcm970_sja1000_platform_data = { +static struct sja1000_platform_data pcm970_sja1000_platform_data = { .osc_freq = 16000000, .ocr = OCR_TX1_PULLDOWN | OCR_TX0_PUSHPULL, .cdr = CDR_CBP, -- cgit v1.2.3 From d2199b34871b859d33cd08398af5f1530241cb4e Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Wed, 20 May 2020 13:51:27 +0800 Subject: ARM: imx: use device_initcall for imx_soc_device_init This is preparation to move imx_soc_device_init to drivers/soc/imx/ There is no reason to must put dt devices under /sys/devices/soc0, they could also be under /sys/devices/platform, so we could pass NULL as parent when calling of_platform_default_populate. Following soc-imx8.c soc-imx-scu.c using device_initcall, need to change return type to int type for imx_soc_device_init. Signed-off-by: Peng Fan Signed-off-by: Shawn Guo --- arch/arm/mach-imx/common.h | 1 - arch/arm/mach-imx/cpu.c | 21 ++++++++++++++------- arch/arm/mach-imx/mach-imx6q.c | 8 +------- arch/arm/mach-imx/mach-imx6sl.c | 8 +------- arch/arm/mach-imx/mach-imx6sx.c | 8 +------- arch/arm/mach-imx/mach-imx6ul.c | 8 +------- arch/arm/mach-imx/mach-imx7d.c | 6 ------ arch/arm/mach-imx/mach-imx7ulp.c | 2 +- arch/arm/mach-imx/mach-vf610.c | 8 +------- 9 files changed, 20 insertions(+), 50 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-imx/common.h b/arch/arm/mach-imx/common.h index 5aa5796cff0e..72c3fcc32910 100644 --- a/arch/arm/mach-imx/common.h +++ b/arch/arm/mach-imx/common.h @@ -49,7 +49,6 @@ void imx_aips_allow_unprivileged_access(const char *compat); int mxc_device_init(void); void imx_set_soc_revision(unsigned int rev); void imx_init_revision_from_anatop(void); -struct device *imx_soc_device_init(void); void imx6_enable_rbc(bool enable); void imx_gpc_check_dt(void); void imx_gpc_set_arm_power_in_lpm(bool power_off); diff --git a/arch/arm/mach-imx/cpu.c b/arch/arm/mach-imx/cpu.c index e3d12b21d6f6..75ffcba9f878 100644 --- a/arch/arm/mach-imx/cpu.c +++ b/arch/arm/mach-imx/cpu.c @@ -83,7 +83,7 @@ void __init imx_aips_allow_unprivileged_access( } } -struct device * __init imx_soc_device_init(void) +static int __init imx_soc_device_init(void) { struct soc_device_attribute *soc_dev_attr; const char *ocotp_compat = NULL; @@ -97,7 +97,7 @@ struct device * __init imx_soc_device_init(void) soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL); if (!soc_dev_attr) - return NULL; + return -ENOMEM; soc_dev_attr->family = "Freescale i.MX"; @@ -224,18 +224,24 @@ struct device * __init imx_soc_device_init(void) soc_dev_attr->revision = kasprintf(GFP_KERNEL, "%d.%d", (imx_soc_revision >> 4) & 0xf, imx_soc_revision & 0xf); - if (!soc_dev_attr->revision) + if (!soc_dev_attr->revision) { + ret = -ENOMEM; goto free_soc; + } soc_dev_attr->serial_number = kasprintf(GFP_KERNEL, "%016llX", soc_uid); - if (!soc_dev_attr->serial_number) + if (!soc_dev_attr->serial_number) { + ret = -ENOMEM; goto free_rev; + } soc_dev = soc_device_register(soc_dev_attr); - if (IS_ERR(soc_dev)) + if (IS_ERR(soc_dev)) { + ret = PTR_ERR(soc_dev); goto free_serial_number; + } - return soc_device_to_device(soc_dev); + return 0; free_serial_number: kfree(soc_dev_attr->serial_number); @@ -243,5 +249,6 @@ free_rev: kfree(soc_dev_attr->revision); free_soc: kfree(soc_dev_attr); - return NULL; + return ret; } +device_initcall(imx_soc_device_init); diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c index 284bce1112d2..85c084a716ab 100644 --- a/arch/arm/mach-imx/mach-imx6q.c +++ b/arch/arm/mach-imx/mach-imx6q.c @@ -245,21 +245,15 @@ static void __init imx6q_axi_init(void) static void __init imx6q_init_machine(void) { - struct device *parent; - if (cpu_is_imx6q() && imx_get_soc_revision() == IMX_CHIP_REVISION_2_0) imx_print_silicon_rev("i.MX6QP", IMX_CHIP_REVISION_1_0); else imx_print_silicon_rev(cpu_is_imx6dl() ? "i.MX6DL" : "i.MX6Q", imx_get_soc_revision()); - parent = imx_soc_device_init(); - if (parent == NULL) - pr_warn("failed to initialize soc device\n"); - imx6q_enet_phy_init(); - of_platform_default_populate(NULL, NULL, parent); + of_platform_default_populate(NULL, NULL, NULL); imx_anatop_init(); cpu_is_imx6q() ? imx6q_pm_init() : imx6dl_pm_init(); diff --git a/arch/arm/mach-imx/mach-imx6sl.c b/arch/arm/mach-imx/mach-imx6sl.c index e27a6889cc56..f6e87363d605 100644 --- a/arch/arm/mach-imx/mach-imx6sl.c +++ b/arch/arm/mach-imx/mach-imx6sl.c @@ -45,13 +45,7 @@ static void __init imx6sl_init_late(void) static void __init imx6sl_init_machine(void) { - struct device *parent; - - parent = imx_soc_device_init(); - if (parent == NULL) - pr_warn("failed to initialize soc device\n"); - - of_platform_default_populate(NULL, NULL, parent); + of_platform_default_populate(NULL, NULL, NULL); if (cpu_is_imx6sl()) imx6sl_fec_init(); diff --git a/arch/arm/mach-imx/mach-imx6sx.c b/arch/arm/mach-imx/mach-imx6sx.c index d5310bf307ff..781e2a94fdd7 100644 --- a/arch/arm/mach-imx/mach-imx6sx.c +++ b/arch/arm/mach-imx/mach-imx6sx.c @@ -63,13 +63,7 @@ static inline void imx6sx_enet_init(void) static void __init imx6sx_init_machine(void) { - struct device *parent; - - parent = imx_soc_device_init(); - if (parent == NULL) - pr_warn("failed to initialize soc device\n"); - - of_platform_default_populate(NULL, NULL, parent); + of_platform_default_populate(NULL, NULL, NULL); imx6sx_enet_init(); imx_anatop_init(); diff --git a/arch/arm/mach-imx/mach-imx6ul.c b/arch/arm/mach-imx/mach-imx6ul.c index 3b0e16ccd59d..e018e716735f 100644 --- a/arch/arm/mach-imx/mach-imx6ul.c +++ b/arch/arm/mach-imx/mach-imx6ul.c @@ -55,13 +55,7 @@ static inline void imx6ul_enet_init(void) static void __init imx6ul_init_machine(void) { - struct device *parent; - - parent = imx_soc_device_init(); - if (parent == NULL) - pr_warn("failed to initialize soc device\n"); - - of_platform_default_populate(NULL, NULL, parent); + of_platform_default_populate(NULL, NULL, NULL); imx6ul_enet_init(); imx_anatop_init(); imx6ul_pm_init(); diff --git a/arch/arm/mach-imx/mach-imx7d.c b/arch/arm/mach-imx/mach-imx7d.c index ebb27592a9f7..879c35929a13 100644 --- a/arch/arm/mach-imx/mach-imx7d.c +++ b/arch/arm/mach-imx/mach-imx7d.c @@ -78,12 +78,6 @@ static inline void imx7d_enet_init(void) static void __init imx7d_init_machine(void) { - struct device *parent; - - parent = imx_soc_device_init(); - if (parent == NULL) - pr_warn("failed to initialize soc device\n"); - imx_anatop_init(); imx7d_enet_init(); } diff --git a/arch/arm/mach-imx/mach-imx7ulp.c b/arch/arm/mach-imx/mach-imx7ulp.c index 11ac71aaf965..128cf4c92aab 100644 --- a/arch/arm/mach-imx/mach-imx7ulp.c +++ b/arch/arm/mach-imx/mach-imx7ulp.c @@ -57,7 +57,7 @@ static void __init imx7ulp_init_machine(void) mxc_set_cpu_type(MXC_CPU_IMX7ULP); imx7ulp_set_revision(); - of_platform_default_populate(NULL, NULL, imx_soc_device_init()); + of_platform_default_populate(NULL, NULL, NULL); } static const char *const imx7ulp_dt_compat[] __initconst = { diff --git a/arch/arm/mach-imx/mach-vf610.c b/arch/arm/mach-imx/mach-vf610.c index 565dc08412a2..208ff640698d 100644 --- a/arch/arm/mach-imx/mach-vf610.c +++ b/arch/arm/mach-imx/mach-vf610.c @@ -49,15 +49,9 @@ static void __init vf610_detect_cpu(void) static void __init vf610_init_machine(void) { - struct device *parent; - vf610_detect_cpu(); - parent = imx_soc_device_init(); - if (parent == NULL) - pr_warn("failed to initialize soc device\n"); - - of_platform_default_populate(NULL, NULL, parent); + of_platform_default_populate(NULL, NULL, NULL); } static const char * const vf610_dt_compat[] __initconst = { -- cgit v1.2.3 From f72130c6b62e45df18ca7568d13f5402c2f58115 Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Wed, 20 May 2020 13:51:28 +0800 Subject: ARM: imx: move cpu definitions into a header The soc device register code will be moved to drivers/soc/imx/, the code needs the cpu type definitions. So let's move the cpu type definitions to a header. Signed-off-by: Peng Fan Signed-off-by: Shawn Guo --- arch/arm/mach-imx/mxc.h | 28 +--------------------------- include/soc/imx/cpu.h | 36 ++++++++++++++++++++++++++++++++++++ 2 files changed, 37 insertions(+), 27 deletions(-) create mode 100644 include/soc/imx/cpu.h (limited to 'arch/arm') diff --git a/arch/arm/mach-imx/mxc.h b/arch/arm/mach-imx/mxc.h index 48e6d781f15b..fe2d0f5abfcc 100644 --- a/arch/arm/mach-imx/mxc.h +++ b/arch/arm/mach-imx/mxc.h @@ -8,41 +8,15 @@ #define __ASM_ARCH_MXC_H__ #include +#include #ifndef __ASM_ARCH_MXC_HARDWARE_H__ #error "Do not include directly." #endif -#define MXC_CPU_MX1 1 -#define MXC_CPU_MX21 21 -#define MXC_CPU_MX25 25 -#define MXC_CPU_MX27 27 -#define MXC_CPU_MX31 31 -#define MXC_CPU_MX35 35 -#define MXC_CPU_MX51 51 -#define MXC_CPU_MX53 53 -#define MXC_CPU_IMX6SL 0x60 -#define MXC_CPU_IMX6DL 0x61 -#define MXC_CPU_IMX6SX 0x62 -#define MXC_CPU_IMX6Q 0x63 -#define MXC_CPU_IMX6UL 0x64 -#define MXC_CPU_IMX6ULL 0x65 -/* virtual cpu id for i.mx6ulz */ -#define MXC_CPU_IMX6ULZ 0x6b -#define MXC_CPU_IMX6SLL 0x67 -#define MXC_CPU_IMX7D 0x72 -#define MXC_CPU_IMX7ULP 0xff - -#define MXC_CPU_VFx10 0x010 -#define MXC_CPU_VF500 0x500 -#define MXC_CPU_VF510 (MXC_CPU_VF500 | MXC_CPU_VFx10) -#define MXC_CPU_VF600 0x600 -#define MXC_CPU_VF610 (MXC_CPU_VF600 | MXC_CPU_VFx10) - #define IMX_DDR_TYPE_LPDDR2 1 #ifndef __ASSEMBLY__ -extern unsigned int __mxc_cpu_type; #ifdef CONFIG_SOC_IMX6SL static inline bool cpu_is_imx6sl(void) diff --git a/include/soc/imx/cpu.h b/include/soc/imx/cpu.h new file mode 100644 index 000000000000..42d6aeb951fa --- /dev/null +++ b/include/soc/imx/cpu.h @@ -0,0 +1,36 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#ifndef __IMX_CPU_H__ +#define __IMX_CPU_H__ + +#define MXC_CPU_MX1 1 +#define MXC_CPU_MX21 21 +#define MXC_CPU_MX25 25 +#define MXC_CPU_MX27 27 +#define MXC_CPU_MX31 31 +#define MXC_CPU_MX35 35 +#define MXC_CPU_MX51 51 +#define MXC_CPU_MX53 53 +#define MXC_CPU_IMX6SL 0x60 +#define MXC_CPU_IMX6DL 0x61 +#define MXC_CPU_IMX6SX 0x62 +#define MXC_CPU_IMX6Q 0x63 +#define MXC_CPU_IMX6UL 0x64 +#define MXC_CPU_IMX6ULL 0x65 +/* virtual cpu id for i.mx6ulz */ +#define MXC_CPU_IMX6ULZ 0x6b +#define MXC_CPU_IMX6SLL 0x67 +#define MXC_CPU_IMX7D 0x72 +#define MXC_CPU_IMX7ULP 0xff + +#define MXC_CPU_VFx10 0x010 +#define MXC_CPU_VF500 0x500 +#define MXC_CPU_VF510 (MXC_CPU_VF500 | MXC_CPU_VFx10) +#define MXC_CPU_VF600 0x600 +#define MXC_CPU_VF610 (MXC_CPU_VF600 | MXC_CPU_VFx10) + +#ifndef __ASSEMBLY__ +extern unsigned int __mxc_cpu_type; +#endif + +#endif -- cgit v1.2.3 From 52102a3ba6a617449f4b057880d73be93310a7c7 Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Wed, 20 May 2020 13:51:29 +0800 Subject: soc: imx: move cpu code to drivers/soc/imx Move the soc device register code to drivers/soc/imx to align with i.MX8. Signed-off-by: Peng Fan Signed-off-by: Shawn Guo --- arch/arm/mach-imx/cpu.c | 182 ------------------------------------------- drivers/soc/imx/Makefile | 3 + drivers/soc/imx/soc-imx.c | 192 ++++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 195 insertions(+), 182 deletions(-) create mode 100644 drivers/soc/imx/soc-imx.c (limited to 'arch/arm') diff --git a/arch/arm/mach-imx/cpu.c b/arch/arm/mach-imx/cpu.c index 75ffcba9f878..65c7224f5250 100644 --- a/arch/arm/mach-imx/cpu.c +++ b/arch/arm/mach-imx/cpu.c @@ -1,25 +1,13 @@ // SPDX-License-Identifier: GPL-2.0 #include -#include #include #include #include #include -#include -#include -#include #include "hardware.h" #include "common.h" -#define OCOTP_UID_H 0x420 -#define OCOTP_UID_L 0x410 - -#define OCOTP_ULP_UID_1 0x4b0 -#define OCOTP_ULP_UID_2 0x4c0 -#define OCOTP_ULP_UID_3 0x4d0 -#define OCOTP_ULP_UID_4 0x4e0 - unsigned int __mxc_cpu_type; static unsigned int imx_soc_revision; @@ -82,173 +70,3 @@ void __init imx_aips_allow_unprivileged_access( imx_set_aips(aips_base_addr); } } - -static int __init imx_soc_device_init(void) -{ - struct soc_device_attribute *soc_dev_attr; - const char *ocotp_compat = NULL; - struct soc_device *soc_dev; - struct device_node *root; - struct regmap *ocotp = NULL; - const char *soc_id; - u64 soc_uid = 0; - u32 val; - int ret; - - soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL); - if (!soc_dev_attr) - return -ENOMEM; - - soc_dev_attr->family = "Freescale i.MX"; - - root = of_find_node_by_path("/"); - ret = of_property_read_string(root, "model", &soc_dev_attr->machine); - of_node_put(root); - if (ret) - goto free_soc; - - switch (__mxc_cpu_type) { - case MXC_CPU_MX1: - soc_id = "i.MX1"; - break; - case MXC_CPU_MX21: - soc_id = "i.MX21"; - break; - case MXC_CPU_MX25: - soc_id = "i.MX25"; - break; - case MXC_CPU_MX27: - soc_id = "i.MX27"; - break; - case MXC_CPU_MX31: - soc_id = "i.MX31"; - break; - case MXC_CPU_MX35: - soc_id = "i.MX35"; - break; - case MXC_CPU_MX51: - soc_id = "i.MX51"; - break; - case MXC_CPU_MX53: - soc_id = "i.MX53"; - break; - case MXC_CPU_IMX6SL: - ocotp_compat = "fsl,imx6sl-ocotp"; - soc_id = "i.MX6SL"; - break; - case MXC_CPU_IMX6DL: - ocotp_compat = "fsl,imx6q-ocotp"; - soc_id = "i.MX6DL"; - break; - case MXC_CPU_IMX6SX: - ocotp_compat = "fsl,imx6sx-ocotp"; - soc_id = "i.MX6SX"; - break; - case MXC_CPU_IMX6Q: - ocotp_compat = "fsl,imx6q-ocotp"; - soc_id = "i.MX6Q"; - break; - case MXC_CPU_IMX6UL: - ocotp_compat = "fsl,imx6ul-ocotp"; - soc_id = "i.MX6UL"; - break; - case MXC_CPU_IMX6ULL: - ocotp_compat = "fsl,imx6ull-ocotp"; - soc_id = "i.MX6ULL"; - break; - case MXC_CPU_IMX6ULZ: - ocotp_compat = "fsl,imx6ull-ocotp"; - soc_id = "i.MX6ULZ"; - break; - case MXC_CPU_IMX6SLL: - ocotp_compat = "fsl,imx6sll-ocotp"; - soc_id = "i.MX6SLL"; - break; - case MXC_CPU_IMX7D: - ocotp_compat = "fsl,imx7d-ocotp"; - soc_id = "i.MX7D"; - break; - case MXC_CPU_IMX7ULP: - ocotp_compat = "fsl,imx7ulp-ocotp"; - soc_id = "i.MX7ULP"; - break; - case MXC_CPU_VF500: - ocotp_compat = "fsl,vf610-ocotp"; - soc_id = "VF500"; - break; - case MXC_CPU_VF510: - ocotp_compat = "fsl,vf610-ocotp"; - soc_id = "VF510"; - break; - case MXC_CPU_VF600: - ocotp_compat = "fsl,vf610-ocotp"; - soc_id = "VF600"; - break; - case MXC_CPU_VF610: - ocotp_compat = "fsl,vf610-ocotp"; - soc_id = "VF610"; - break; - default: - soc_id = "Unknown"; - } - soc_dev_attr->soc_id = soc_id; - - if (ocotp_compat) { - ocotp = syscon_regmap_lookup_by_compatible(ocotp_compat); - if (IS_ERR(ocotp)) - pr_err("%s: failed to find %s regmap!\n", __func__, ocotp_compat); - } - - if (!IS_ERR_OR_NULL(ocotp)) { - if (__mxc_cpu_type == MXC_CPU_IMX7ULP) { - regmap_read(ocotp, OCOTP_ULP_UID_4, &val); - soc_uid = val & 0xffff; - regmap_read(ocotp, OCOTP_ULP_UID_3, &val); - soc_uid <<= 16; - soc_uid |= val & 0xffff; - regmap_read(ocotp, OCOTP_ULP_UID_2, &val); - soc_uid <<= 16; - soc_uid |= val & 0xffff; - regmap_read(ocotp, OCOTP_ULP_UID_1, &val); - soc_uid <<= 16; - soc_uid |= val & 0xffff; - } else { - regmap_read(ocotp, OCOTP_UID_H, &val); - soc_uid = val; - regmap_read(ocotp, OCOTP_UID_L, &val); - soc_uid <<= 32; - soc_uid |= val; - } - } - - soc_dev_attr->revision = kasprintf(GFP_KERNEL, "%d.%d", - (imx_soc_revision >> 4) & 0xf, - imx_soc_revision & 0xf); - if (!soc_dev_attr->revision) { - ret = -ENOMEM; - goto free_soc; - } - - soc_dev_attr->serial_number = kasprintf(GFP_KERNEL, "%016llX", soc_uid); - if (!soc_dev_attr->serial_number) { - ret = -ENOMEM; - goto free_rev; - } - - soc_dev = soc_device_register(soc_dev_attr); - if (IS_ERR(soc_dev)) { - ret = PTR_ERR(soc_dev); - goto free_serial_number; - } - - return 0; - -free_serial_number: - kfree(soc_dev_attr->serial_number); -free_rev: - kfree(soc_dev_attr->revision); -free_soc: - kfree(soc_dev_attr); - return ret; -} -device_initcall(imx_soc_device_init); diff --git a/drivers/soc/imx/Makefile b/drivers/soc/imx/Makefile index 103e2c93c342..446143241fe7 100644 --- a/drivers/soc/imx/Makefile +++ b/drivers/soc/imx/Makefile @@ -1,4 +1,7 @@ # SPDX-License-Identifier: GPL-2.0-only +ifeq ($(CONFIG_ARM),y) +obj-$(CONFIG_ARCH_MXC) += soc-imx.o +endif obj-$(CONFIG_HAVE_IMX_GPC) += gpc.o obj-$(CONFIG_IMX_GPCV2_PM_DOMAINS) += gpcv2.o obj-$(CONFIG_SOC_IMX8M) += soc-imx8m.o diff --git a/drivers/soc/imx/soc-imx.c b/drivers/soc/imx/soc-imx.c new file mode 100644 index 000000000000..fec3d672b606 --- /dev/null +++ b/drivers/soc/imx/soc-imx.c @@ -0,0 +1,192 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright 2020 NXP + */ + +#include +#include +#include +#include +#include +#include + +#include +#include + +#define OCOTP_UID_H 0x420 +#define OCOTP_UID_L 0x410 + +#define OCOTP_ULP_UID_1 0x4b0 +#define OCOTP_ULP_UID_2 0x4c0 +#define OCOTP_ULP_UID_3 0x4d0 +#define OCOTP_ULP_UID_4 0x4e0 + +static int __init imx_soc_device_init(void) +{ + struct soc_device_attribute *soc_dev_attr; + const char *ocotp_compat = NULL; + struct soc_device *soc_dev; + struct device_node *root; + struct regmap *ocotp = NULL; + const char *soc_id; + u64 soc_uid = 0; + u32 val; + int ret; + + soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL); + if (!soc_dev_attr) + return -ENOMEM; + + soc_dev_attr->family = "Freescale i.MX"; + + root = of_find_node_by_path("/"); + ret = of_property_read_string(root, "model", &soc_dev_attr->machine); + of_node_put(root); + if (ret) + goto free_soc; + + switch (__mxc_cpu_type) { + case MXC_CPU_MX1: + soc_id = "i.MX1"; + break; + case MXC_CPU_MX21: + soc_id = "i.MX21"; + break; + case MXC_CPU_MX25: + soc_id = "i.MX25"; + break; + case MXC_CPU_MX27: + soc_id = "i.MX27"; + break; + case MXC_CPU_MX31: + soc_id = "i.MX31"; + break; + case MXC_CPU_MX35: + soc_id = "i.MX35"; + break; + case MXC_CPU_MX51: + soc_id = "i.MX51"; + break; + case MXC_CPU_MX53: + soc_id = "i.MX53"; + break; + case MXC_CPU_IMX6SL: + ocotp_compat = "fsl,imx6sl-ocotp"; + soc_id = "i.MX6SL"; + break; + case MXC_CPU_IMX6DL: + ocotp_compat = "fsl,imx6q-ocotp"; + soc_id = "i.MX6DL"; + break; + case MXC_CPU_IMX6SX: + ocotp_compat = "fsl,imx6sx-ocotp"; + soc_id = "i.MX6SX"; + break; + case MXC_CPU_IMX6Q: + ocotp_compat = "fsl,imx6q-ocotp"; + soc_id = "i.MX6Q"; + break; + case MXC_CPU_IMX6UL: + ocotp_compat = "fsl,imx6ul-ocotp"; + soc_id = "i.MX6UL"; + break; + case MXC_CPU_IMX6ULL: + ocotp_compat = "fsl,imx6ull-ocotp"; + soc_id = "i.MX6ULL"; + break; + case MXC_CPU_IMX6ULZ: + ocotp_compat = "fsl,imx6ull-ocotp"; + soc_id = "i.MX6ULZ"; + break; + case MXC_CPU_IMX6SLL: + ocotp_compat = "fsl,imx6sll-ocotp"; + soc_id = "i.MX6SLL"; + break; + case MXC_CPU_IMX7D: + ocotp_compat = "fsl,imx7d-ocotp"; + soc_id = "i.MX7D"; + break; + case MXC_CPU_IMX7ULP: + ocotp_compat = "fsl,imx7ulp-ocotp"; + soc_id = "i.MX7ULP"; + break; + case MXC_CPU_VF500: + ocotp_compat = "fsl,vf610-ocotp"; + soc_id = "VF500"; + break; + case MXC_CPU_VF510: + ocotp_compat = "fsl,vf610-ocotp"; + soc_id = "VF510"; + break; + case MXC_CPU_VF600: + ocotp_compat = "fsl,vf610-ocotp"; + soc_id = "VF600"; + break; + case MXC_CPU_VF610: + ocotp_compat = "fsl,vf610-ocotp"; + soc_id = "VF610"; + break; + default: + soc_id = "Unknown"; + } + soc_dev_attr->soc_id = soc_id; + + if (ocotp_compat) { + ocotp = syscon_regmap_lookup_by_compatible(ocotp_compat); + if (IS_ERR(ocotp)) + pr_err("%s: failed to find %s regmap!\n", __func__, ocotp_compat); + } + + if (!IS_ERR_OR_NULL(ocotp)) { + if (__mxc_cpu_type == MXC_CPU_IMX7ULP) { + regmap_read(ocotp, OCOTP_ULP_UID_4, &val); + soc_uid = val & 0xffff; + regmap_read(ocotp, OCOTP_ULP_UID_3, &val); + soc_uid <<= 16; + soc_uid |= val & 0xffff; + regmap_read(ocotp, OCOTP_ULP_UID_2, &val); + soc_uid <<= 16; + soc_uid |= val & 0xffff; + regmap_read(ocotp, OCOTP_ULP_UID_1, &val); + soc_uid <<= 16; + soc_uid |= val & 0xffff; + } else { + regmap_read(ocotp, OCOTP_UID_H, &val); + soc_uid = val; + regmap_read(ocotp, OCOTP_UID_L, &val); + soc_uid <<= 32; + soc_uid |= val; + } + } + + soc_dev_attr->revision = kasprintf(GFP_KERNEL, "%d.%d", + (imx_get_soc_revision() >> 4) & 0xf, + imx_get_soc_revision() & 0xf); + if (!soc_dev_attr->revision) { + ret = -ENOMEM; + goto free_soc; + } + + soc_dev_attr->serial_number = kasprintf(GFP_KERNEL, "%016llX", soc_uid); + if (!soc_dev_attr->serial_number) { + ret = -ENOMEM; + goto free_rev; + } + + soc_dev = soc_device_register(soc_dev_attr); + if (IS_ERR(soc_dev)) { + ret = PTR_ERR(soc_dev); + goto free_serial_number; + } + + return 0; + +free_serial_number: + kfree(soc_dev_attr->serial_number); +free_rev: + kfree(soc_dev_attr->revision); +free_soc: + kfree(soc_dev_attr); + return ret; +} +device_initcall(imx_soc_device_init); -- cgit v1.2.3 From 9d3239147d6d44dd6fd3c13338dcc3ce36c442ef Mon Sep 17 00:00:00 2001 From: Robert Jarzmik Date: Thu, 21 May 2020 20:51:37 +0200 Subject: ARM: pxa: remove Compulab pxa2xx boards As these boards have no more users nor testers, and patching them has become a burden, be that because of the PCI part or the MTD NAND support, let's remove them. The cm-x300 will for now remain and represent Compulab boards at its best in the PXA department. Link: https://lore.kernel.org/r/20200521185140.27276-1-robert.jarzmik@free.fr Signed-off-by: Robert Jarzmik Acked-by: Mike Rapoport Acked-by: Arnd Bergmann Signed-off-by: Arnd Bergmann --- arch/arm/configs/cm_x2xx_defconfig | 173 ----- arch/arm/configs/em_x270_defconfig | 178 ----- arch/arm/configs/pxa_defconfig | 2 - arch/arm/mach-pxa/Kconfig | 17 - arch/arm/mach-pxa/Makefile | 5 - arch/arm/mach-pxa/cm-x255.c | 240 ------- arch/arm/mach-pxa/cm-x270.c | 419 ------------ arch/arm/mach-pxa/cm-x2xx-pci.c | 196 ------ arch/arm/mach-pxa/cm-x2xx-pci.h | 14 - arch/arm/mach-pxa/cm-x2xx.c | 538 --------------- arch/arm/mach-pxa/em-x270.c | 1286 ----------------------------------- arch/arm/mach-pxa/include/mach/io.h | 18 - 12 files changed, 3086 deletions(-) delete mode 100644 arch/arm/configs/cm_x2xx_defconfig delete mode 100644 arch/arm/configs/em_x270_defconfig delete mode 100644 arch/arm/mach-pxa/cm-x255.c delete mode 100644 arch/arm/mach-pxa/cm-x270.c delete mode 100644 arch/arm/mach-pxa/cm-x2xx-pci.c delete mode 100644 arch/arm/mach-pxa/cm-x2xx-pci.h delete mode 100644 arch/arm/mach-pxa/cm-x2xx.c delete mode 100644 arch/arm/mach-pxa/em-x270.c delete mode 100644 arch/arm/mach-pxa/include/mach/io.h (limited to 'arch/arm') diff --git a/arch/arm/configs/cm_x2xx_defconfig b/arch/arm/configs/cm_x2xx_defconfig deleted file mode 100644 index fa997ae2673e..000000000000 --- a/arch/arm/configs/cm_x2xx_defconfig +++ /dev/null @@ -1,173 +0,0 @@ -# CONFIG_LOCALVERSION_AUTO is not set -CONFIG_SYSVIPC=y -CONFIG_IKCONFIG=y -CONFIG_IKCONFIG_PROC=y -CONFIG_LOG_BUF_SHIFT=14 -CONFIG_SYSFS_DEPRECATED_V2=y -CONFIG_BLK_DEV_INITRD=y -CONFIG_EXPERT=y -# CONFIG_VM_EVENT_COUNTERS is not set -# CONFIG_SLUB_DEBUG is not set -# CONFIG_COMPAT_BRK is not set -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -# CONFIG_BLK_DEV_BSG is not set -CONFIG_ARCH_PXA=y -CONFIG_MACH_ARMCORE=y -CONFIG_PCI=y -CONFIG_PCCARD=m -CONFIG_YENTA=m -# CONFIG_YENTA_O2 is not set -# CONFIG_YENTA_RICOH is not set -# CONFIG_YENTA_ENE_TUNE is not set -# CONFIG_YENTA_TOSHIBA is not set -CONFIG_PCMCIA_PXA2XX=m -CONFIG_NO_HZ=y -CONFIG_AEABI=y -CONFIG_ZBOOT_ROM_TEXT=0x0 -CONFIG_ZBOOT_ROM_BSS=0x0 -CONFIG_CMDLINE="root=1f03 mem=32M" -CONFIG_FPE_NWFPE=y -CONFIG_PM=y -CONFIG_APM_EMULATION=m -CONFIG_NET=y -CONFIG_PACKET=y -CONFIG_UNIX=y -CONFIG_INET=y -CONFIG_IP_MULTICAST=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -CONFIG_IP_PNP_BOOTP=y -# CONFIG_INET_DIAG is not set -# CONFIG_IPV6 is not set -CONFIG_BT=m -CONFIG_BT_RFCOMM=m -CONFIG_BT_BNEP=m -CONFIG_BT_HIDP=m -CONFIG_LIB80211=m -CONFIG_FW_LOADER=m -CONFIG_MTD=y -CONFIG_MTD_CMDLINE_PARTS=y -CONFIG_MTD_BLOCK=y -CONFIG_MTD_CFI=y -CONFIG_MTD_JEDECPROBE=y -CONFIG_MTD_CFI_ADV_OPTIONS=y -CONFIG_MTD_CFI_INTELEXT=y -CONFIG_MTD_CFI_AMDSTD=y -CONFIG_MTD_CFI_STAA=y -CONFIG_MTD_PHYSMAP=y -CONFIG_MTD_PXA2XX=y -CONFIG_MTD_RAW_NAND=y -CONFIG_MTD_NAND_GPIO=m -CONFIG_MTD_NAND_CM_X270=y -CONFIG_MTD_NAND_PLATFORM=y -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_RAM=y -CONFIG_SCSI=y -CONFIG_BLK_DEV_SD=y -CONFIG_ATA=m -# CONFIG_SATA_PMP is not set -CONFIG_PATA_PCMCIA=m -CONFIG_NETDEVICES=y -CONFIG_NET_ETHERNET=y -CONFIG_DM9000=y -CONFIG_DM9000_DEBUGLEVEL=1 -CONFIG_NET_PCI=y -CONFIG_8139TOO=m -# CONFIG_8139TOO_PIO is not set -CONFIG_PPP=m -CONFIG_PPP_MULTILINK=y -CONFIG_PPP_FILTER=y -CONFIG_PPP_ASYNC=m -CONFIG_PPP_DEFLATE=m -CONFIG_PPP_BSDCOMP=m -CONFIG_INPUT_EVDEV=y -CONFIG_KEYBOARD_PXA27x=m -# CONFIG_INPUT_MOUSE is not set -CONFIG_INPUT_TOUCHSCREEN=y -CONFIG_TOUCHSCREEN_UCB1400=m -# CONFIG_SERIO_SERPORT is not set -CONFIG_SERIAL_PXA=y -CONFIG_SERIAL_PXA_CONSOLE=y -CONFIG_LEGACY_PTY_COUNT=16 -# CONFIG_HW_RANDOM is not set -CONFIG_I2C=y -CONFIG_I2C_CHARDEV=m -CONFIG_I2C_PXA=y -CONFIG_SPI=y -CONFIG_SPI_PXA2XX=m -# CONFIG_HWMON is not set -CONFIG_UCB1400_CORE=m -CONFIG_FB=y -CONFIG_FB_PXA=y -CONFIG_FB_PXA_PARAMETERS=y -CONFIG_FB_MBX=m -# CONFIG_LCD_CLASS_DEVICE is not set -# CONFIG_BACKLIGHT_CLASS_DEVICE is not set -# CONFIG_VGA_CONSOLE is not set -CONFIG_FRAMEBUFFER_CONSOLE=y -CONFIG_LOGO=y -CONFIG_SOUND=m -CONFIG_SND=m -CONFIG_SND_MIXER_OSS=m -CONFIG_SND_PCM_OSS=m -# CONFIG_SND_DRIVERS is not set -# CONFIG_SND_PCI is not set -CONFIG_SND_PXA2XX_AC97=m -# CONFIG_SND_SPI is not set -# CONFIG_SND_USB is not set -# CONFIG_SND_PCMCIA is not set -CONFIG_HID_A4TECH=y -CONFIG_HID_APPLE=y -CONFIG_HID_BELKIN=y -CONFIG_HID_CHERRY=y -CONFIG_HID_CHICONY=y -CONFIG_HID_CYPRESS=y -CONFIG_HID_EZKEY=y -CONFIG_HID_GYRATION=y -CONFIG_HID_LOGITECH=y -CONFIG_HID_MICROSOFT=y -CONFIG_HID_MONTEREY=y -CONFIG_HID_PANTHERLORD=y -CONFIG_HID_PETALYNX=y -CONFIG_HID_SAMSUNG=y -CONFIG_HID_SONY=y -CONFIG_HID_SUNPLUS=y -CONFIG_USB=y -CONFIG_USB_MON=y -CONFIG_USB_OHCI_HCD=y -CONFIG_USB_STORAGE=y -CONFIG_MMC=m -CONFIG_MMC_PXA=m -CONFIG_NEW_LEDS=y -CONFIG_LEDS_CLASS=y -CONFIG_LEDS_GPIO=m -CONFIG_LEDS_TRIGGERS=y -CONFIG_LEDS_TRIGGER_HEARTBEAT=y -CONFIG_RTC_CLASS=y -CONFIG_RTC_DRV_V3020=y -CONFIG_RTC_DRV_PXA=y -CONFIG_EXT2_FS=y -CONFIG_EXT3_FS=y -CONFIG_VFAT_FS=m -# CONFIG_PROC_PAGE_MONITOR is not set -CONFIG_TMPFS=y -CONFIG_JFFS2_FS=y -CONFIG_JFFS2_SUMMARY=y -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -CONFIG_ROOT_NFS=y -CONFIG_CIFS=m -CONFIG_PARTITION_ADVANCED=y -CONFIG_NLS_CODEPAGE_437=m -CONFIG_NLS_ISO8859_1=m -CONFIG_NLS_UTF8=m -CONFIG_FRAME_WARN=0 -CONFIG_DEBUG_KERNEL=y -# CONFIG_DETECT_SOFTLOCKUP is not set -# CONFIG_SCHED_DEBUG is not set -# CONFIG_DEBUG_BUGVERBOSE is not set -CONFIG_DEBUG_USER=y -CONFIG_DEBUG_LL=y -# CONFIG_CRYPTO_ANSI_CPRNG is not set -# CONFIG_CRYPTO_HW is not set diff --git a/arch/arm/configs/em_x270_defconfig b/arch/arm/configs/em_x270_defconfig deleted file mode 100644 index d08f02014755..000000000000 --- a/arch/arm/configs/em_x270_defconfig +++ /dev/null @@ -1,178 +0,0 @@ -# CONFIG_LOCALVERSION_AUTO is not set -CONFIG_SYSVIPC=y -CONFIG_IKCONFIG=y -CONFIG_IKCONFIG_PROC=y -CONFIG_LOG_BUF_SHIFT=14 -CONFIG_SYSFS_DEPRECATED_V2=y -CONFIG_BLK_DEV_INITRD=y -CONFIG_EXPERT=y -# CONFIG_VM_EVENT_COUNTERS is not set -# CONFIG_SLUB_DEBUG is not set -# CONFIG_COMPAT_BRK is not set -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -# CONFIG_BLK_DEV_BSG is not set -CONFIG_ARCH_PXA=y -CONFIG_MACH_EM_X270=y -CONFIG_MACH_EXEDA=y -CONFIG_NO_HZ=y -CONFIG_AEABI=y -CONFIG_ZBOOT_ROM_TEXT=0x0 -CONFIG_ZBOOT_ROM_BSS=0x0 -CONFIG_CMDLINE="root=1f03 mem=32M" -CONFIG_CPU_FREQ=y -CONFIG_CPU_FREQ_GOV_USERSPACE=m -CONFIG_FPE_NWFPE=y -CONFIG_PM=y -CONFIG_APM_EMULATION=y -CONFIG_NET=y -CONFIG_PACKET=y -CONFIG_UNIX=y -CONFIG_INET=y -CONFIG_IP_MULTICAST=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -CONFIG_IP_PNP_BOOTP=y -# CONFIG_INET_DIAG is not set -# CONFIG_IPV6 is not set -CONFIG_BT=m -CONFIG_BT_RFCOMM=m -CONFIG_BT_BNEP=m -CONFIG_BT_HIDP=m -CONFIG_BT_HCIBTUSB=m -CONFIG_LIB80211=m -CONFIG_FW_LOADER=m -CONFIG_MTD=y -CONFIG_MTD_CMDLINE_PARTS=y -CONFIG_MTD_BLOCK=y -CONFIG_MTD_CFI=y -CONFIG_MTD_JEDECPROBE=y -CONFIG_MTD_CFI_ADV_OPTIONS=y -CONFIG_MTD_CFI_INTELEXT=y -CONFIG_MTD_CFI_AMDSTD=y -CONFIG_MTD_CFI_STAA=y -CONFIG_MTD_PHYSMAP=y -CONFIG_MTD_PXA2XX=y -CONFIG_MTD_RAW_NAND=y -CONFIG_MTD_NAND_PLATFORM=y -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_RAM=y -CONFIG_SCSI=y -CONFIG_BLK_DEV_SD=y -# CONFIG_SCSI_LOWLEVEL is not set -CONFIG_NETDEVICES=y -CONFIG_NET_ETHERNET=y -CONFIG_DM9000=y -CONFIG_DM9000_DEBUGLEVEL=1 -CONFIG_PPP=m -CONFIG_PPP_MULTILINK=y -CONFIG_PPP_FILTER=y -CONFIG_PPP_ASYNC=m -CONFIG_PPP_DEFLATE=m -CONFIG_PPP_BSDCOMP=m -CONFIG_INPUT_EVDEV=y -CONFIG_INPUT_APMPOWER=y -CONFIG_KEYBOARD_GPIO=y -CONFIG_KEYBOARD_PXA27x=y -# CONFIG_INPUT_MOUSE is not set -CONFIG_INPUT_TOUCHSCREEN=y -# CONFIG_TOUCHSCREEN_DA9034 is not set -CONFIG_TOUCHSCREEN_WM97XX=m -# CONFIG_TOUCHSCREEN_WM9705 is not set -# CONFIG_TOUCHSCREEN_WM9713 is not set -# CONFIG_SERIO_SERPORT is not set -CONFIG_SERIAL_PXA=y -CONFIG_SERIAL_PXA_CONSOLE=y -CONFIG_LEGACY_PTY_COUNT=16 -# CONFIG_HW_RANDOM is not set -CONFIG_I2C=y -CONFIG_I2C_CHARDEV=m -CONFIG_I2C_PXA=y -CONFIG_SPI=y -CONFIG_SPI_PXA2XX=y -CONFIG_POWER_SUPPLY=y -CONFIG_BATTERY_DA9030=y -# CONFIG_HWMON is not set -CONFIG_PMIC_DA903X=y -CONFIG_REGULATOR=y -CONFIG_REGULATOR_DA903X=y -CONFIG_FB=y -CONFIG_FB_PXA=y -CONFIG_FB_PXA_PARAMETERS=y -CONFIG_FB_MBX=m -CONFIG_LCD_CLASS_DEVICE=y -CONFIG_LCD_TDO24M=y -# CONFIG_BACKLIGHT_GENERIC is not set -CONFIG_BACKLIGHT_DA903X=m -# CONFIG_VGA_CONSOLE is not set -CONFIG_FRAMEBUFFER_CONSOLE=y -CONFIG_LOGO=y -CONFIG_SOUND=m -CONFIG_SND=m -CONFIG_SND_MIXER_OSS=m -CONFIG_SND_PCM_OSS=m -# CONFIG_SND_DRIVERS is not set -# CONFIG_SND_SPI is not set -# CONFIG_SND_USB is not set -CONFIG_SND_SOC=m -CONFIG_SND_PXA2XX_SOC=m -CONFIG_SND_PXA2XX_SOC_EM_X270=m -CONFIG_HID_A4TECH=y -CONFIG_HID_APPLE=y -CONFIG_HID_BELKIN=y -CONFIG_HID_CHERRY=y -CONFIG_HID_CHICONY=y -CONFIG_HID_CYPRESS=y -CONFIG_HID_EZKEY=y -CONFIG_HID_GYRATION=y -CONFIG_HID_LOGITECH=y -CONFIG_HID_MICROSOFT=y -CONFIG_HID_MONTEREY=y -CONFIG_HID_PANTHERLORD=y -CONFIG_HID_PETALYNX=y -CONFIG_HID_SAMSUNG=y -CONFIG_HID_SONY=y -CONFIG_HID_SUNPLUS=y -CONFIG_USB=y -CONFIG_USB_MON=y -CONFIG_USB_OHCI_HCD=y -CONFIG_USB_STORAGE=y -CONFIG_MMC=m -CONFIG_MMC_PXA=m -CONFIG_NEW_LEDS=y -CONFIG_LEDS_CLASS=y -CONFIG_LEDS_DA903X=y -CONFIG_LEDS_TRIGGERS=y -CONFIG_LEDS_TRIGGER_HEARTBEAT=y -CONFIG_RTC_CLASS=y -CONFIG_RTC_DRV_V3020=y -CONFIG_RTC_DRV_PXA=y -CONFIG_EXT2_FS=y -CONFIG_EXT3_FS=y -CONFIG_VFAT_FS=m -# CONFIG_PROC_PAGE_MONITOR is not set -CONFIG_TMPFS=y -CONFIG_JFFS2_FS=y -CONFIG_JFFS2_SUMMARY=y -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -CONFIG_ROOT_NFS=y -CONFIG_CIFS=m -CONFIG_PARTITION_ADVANCED=y -CONFIG_NLS_CODEPAGE_437=m -CONFIG_NLS_ISO8859_1=m -CONFIG_NLS_UTF8=m -CONFIG_FRAME_WARN=0 -CONFIG_DEBUG_FS=y -CONFIG_DEBUG_KERNEL=y -# CONFIG_DETECT_SOFTLOCKUP is not set -# CONFIG_SCHED_DEBUG is not set -# CONFIG_DEBUG_BUGVERBOSE is not set -CONFIG_DEBUG_USER=y -CONFIG_DEBUG_LL=y -CONFIG_CRYPTO_ECB=m -CONFIG_CRYPTO_MICHAEL_MIC=m -CONFIG_CRYPTO_AES=m -CONFIG_CRYPTO_ARC4=m -# CONFIG_CRYPTO_ANSI_CPRNG is not set -# CONFIG_CRYPTO_HW is not set diff --git a/arch/arm/configs/pxa_defconfig b/arch/arm/configs/pxa_defconfig index b817c57f05f1..e6559e3350e6 100644 --- a/arch/arm/configs/pxa_defconfig +++ b/arch/arm/configs/pxa_defconfig @@ -38,8 +38,6 @@ CONFIG_MACH_ARCOM_ZEUS=y CONFIG_MACH_BALLOON3=y CONFIG_MACH_CSB726=y CONFIG_CSB726_CSB701=y -CONFIG_MACH_ARMCORE=y -CONFIG_MACH_EM_X270=y CONFIG_MACH_EXEDA=y CONFIG_MACH_CM_X300=y CONFIG_MACH_CAPC7117=y diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig index f60bc29aef68..f7520a6cc7d4 100644 --- a/arch/arm/mach-pxa/Kconfig +++ b/arch/arm/mach-pxa/Kconfig @@ -123,23 +123,6 @@ config CSB726_CSB701 bool "Enable support for CSB701 baseboard" depends on MACH_CSB726 -config MACH_ARMCORE - bool "CompuLab CM-X255/CM-X270 modules" - select ARCH_HAS_DMA_SET_COHERENT_MASK if PCI - select IWMMXT - select HAVE_PCI - select NEED_MACH_IO_H if PCI - select PXA25x - select PXA27x - -config MACH_EM_X270 - bool "CompuLab EM-x270 platform" - select PXA27x - -config MACH_EXEDA - bool "CompuLab eXeda platform" - select PXA27x - config MACH_CM_X300 bool "CompuLab CM-X300 modules" select CPU_PXA300 diff --git a/arch/arm/mach-pxa/Makefile b/arch/arm/mach-pxa/Makefile index f70728930c4f..177abe584dd5 100644 --- a/arch/arm/mach-pxa/Makefile +++ b/arch/arm/mach-pxa/Makefile @@ -40,11 +40,6 @@ obj-$(CONFIG_MACH_ARCOM_ZEUS) += zeus.o obj-$(CONFIG_MACH_BALLOON3) += balloon3.o obj-$(CONFIG_MACH_CSB726) += csb726.o obj-$(CONFIG_CSB726_CSB701) += csb701.o -obj-$(CONFIG_MACH_ARMCORE) += cm-x2xx.o cm-x255.o cm-x270.o -ifeq ($(CONFIG_PCI),y) -obj-$(CONFIG_MACH_ARMCORE) += cm-x2xx-pci.o -endif -obj-$(CONFIG_MACH_EM_X270) += em-x270.o obj-$(CONFIG_MACH_CM_X300) += cm-x300.o obj-$(CONFIG_MACH_CAPC7117) += capc7117.o mxm8x10.o obj-$(CONFIG_ARCH_GUMSTIX) += gumstix.o diff --git a/arch/arm/mach-pxa/cm-x255.c b/arch/arm/mach-pxa/cm-x255.c deleted file mode 100644 index ea1e85775759..000000000000 --- a/arch/arm/mach-pxa/cm-x255.c +++ /dev/null @@ -1,240 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/arch/arm/mach-pxa/cm-x255.c - * - * Copyright (C) 2007, 2008 CompuLab, Ltd. - * Mike Rapoport - */ - -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#include "pxa25x.h" - -#include "generic.h" - -#define GPIO_NAND_CS (5) -#define GPIO_NAND_ALE (4) -#define GPIO_NAND_CLE (3) -#define GPIO_NAND_RB (10) - -static unsigned long cmx255_pin_config[] = { - /* AC'97 */ - GPIO28_AC97_BITCLK, - GPIO29_AC97_SDATA_IN_0, - GPIO30_AC97_SDATA_OUT, - GPIO31_AC97_SYNC, - - /* BTUART */ - GPIO42_BTUART_RXD, - GPIO43_BTUART_TXD, - GPIO44_BTUART_CTS, - GPIO45_BTUART_RTS, - - /* STUART */ - GPIO46_STUART_RXD, - GPIO47_STUART_TXD, - - /* LCD */ - GPIOxx_LCD_TFT_16BPP, - - /* SSP1 */ - GPIO23_SSP1_SCLK, - GPIO24_SSP1_SFRM, - GPIO25_SSP1_TXD, - GPIO26_SSP1_RXD, - - /* SSP2 */ - GPIO81_SSP2_CLK_OUT, - GPIO82_SSP2_FRM_OUT, - GPIO83_SSP2_TXD, - GPIO84_SSP2_RXD, - - /* PC Card */ - GPIO48_nPOE, - GPIO49_nPWE, - GPIO50_nPIOR, - GPIO51_nPIOW, - GPIO52_nPCE_1, - GPIO53_nPCE_2, - GPIO54_nPSKTSEL, - GPIO55_nPREG, - GPIO56_nPWAIT, - GPIO57_nIOIS16, - - /* SDRAM and local bus */ - GPIO15_nCS_1, - GPIO78_nCS_2, - GPIO79_nCS_3, - GPIO80_nCS_4, - GPIO33_nCS_5, - GPIO18_RDY, - - /* GPIO */ - GPIO0_GPIO | WAKEUP_ON_EDGE_BOTH, - GPIO9_GPIO, /* PC card reset */ - - /* NAND controls */ - GPIO5_GPIO | MFP_LPM_DRIVE_HIGH, /* NAND CE# */ - GPIO4_GPIO | MFP_LPM_DRIVE_LOW, /* NAND ALE */ - GPIO3_GPIO | MFP_LPM_DRIVE_LOW, /* NAND CLE */ - GPIO10_GPIO, /* NAND Ready/Busy */ - - /* interrupts */ - GPIO22_GPIO, /* DM9000 interrupt */ -}; - -#if defined(CONFIG_SPI_PXA2XX) -static struct pxa2xx_spi_controller pxa_ssp_master_info = { - .num_chipselect = 1, -}; - -static struct spi_board_info spi_board_info[] __initdata = { - [0] = { - .modalias = "rtc-max6902", - .max_speed_hz = 1000000, - .bus_num = 1, - .chip_select = 0, - }, -}; - -static void __init cmx255_init_rtc(void) -{ - pxa2xx_set_spi_info(1, &pxa_ssp_master_info); - spi_register_board_info(ARRAY_AND_SIZE(spi_board_info)); -} -#else -static inline void cmx255_init_rtc(void) {} -#endif - -#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE) -static struct mtd_partition cmx255_nor_partitions[] = { - { - .name = "ARMmon", - .size = 0x00030000, - .offset = 0, - .mask_flags = MTD_WRITEABLE /* force read-only */ - } , { - .name = "ARMmon setup block", - .size = 0x00010000, - .offset = MTDPART_OFS_APPEND, - .mask_flags = MTD_WRITEABLE /* force read-only */ - } , { - .name = "kernel", - .size = 0x00160000, - .offset = MTDPART_OFS_APPEND, - } , { - .name = "ramdisk", - .size = MTDPART_SIZ_FULL, - .offset = MTDPART_OFS_APPEND - } -}; - -static struct physmap_flash_data cmx255_nor_flash_data[] = { - { - .width = 2, /* bankwidth in bytes */ - .parts = cmx255_nor_partitions, - .nr_parts = ARRAY_SIZE(cmx255_nor_partitions) - } -}; - -static struct resource cmx255_nor_resource = { - .start = PXA_CS0_PHYS, - .end = PXA_CS0_PHYS + SZ_8M - 1, - .flags = IORESOURCE_MEM, -}; - -static struct platform_device cmx255_nor = { - .name = "physmap-flash", - .id = -1, - .dev = { - .platform_data = cmx255_nor_flash_data, - }, - .resource = &cmx255_nor_resource, - .num_resources = 1, -}; - -static void __init cmx255_init_nor(void) -{ - platform_device_register(&cmx255_nor); -} -#else -static inline void cmx255_init_nor(void) {} -#endif - -#if defined(CONFIG_MTD_NAND_GPIO) || defined(CONFIG_MTD_NAND_GPIO_MODULE) - -static struct gpiod_lookup_table cmx255_nand_gpiod_table = { - .dev_id = "gpio-nand", - .table = { - GPIO_LOOKUP("gpio-pxa", GPIO_NAND_CS, "nce", GPIO_ACTIVE_HIGH), - GPIO_LOOKUP("gpio-pxa", GPIO_NAND_CLE, "cle", GPIO_ACTIVE_HIGH), - GPIO_LOOKUP("gpio-pxa", GPIO_NAND_ALE, "ale", GPIO_ACTIVE_HIGH), - GPIO_LOOKUP("gpio-pxa", GPIO_NAND_RB, "rdy", GPIO_ACTIVE_HIGH), - }, -}; - -static struct resource cmx255_nand_resource[] = { - [0] = { - .start = PXA_CS1_PHYS, - .end = PXA_CS1_PHYS + 11, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = PXA_CS5_PHYS, - .end = PXA_CS5_PHYS + 3, - .flags = IORESOURCE_MEM, - }, -}; - -static struct mtd_partition cmx255_nand_parts[] = { - [0] = { - .name = "cmx255-nand", - .size = MTDPART_SIZ_FULL, - .offset = 0, - }, -}; - -static struct gpio_nand_platdata cmx255_nand_platdata = { - .parts = cmx255_nand_parts, - .num_parts = ARRAY_SIZE(cmx255_nand_parts), - .chip_delay = 25, -}; - -static struct platform_device cmx255_nand = { - .name = "gpio-nand", - .num_resources = ARRAY_SIZE(cmx255_nand_resource), - .resource = cmx255_nand_resource, - .id = -1, - .dev = { - .platform_data = &cmx255_nand_platdata, - } -}; - -static void __init cmx255_init_nand(void) -{ - gpiod_add_lookup_table(&cmx255_nand_gpiod_table); - platform_device_register(&cmx255_nand); -} -#else -static inline void cmx255_init_nand(void) {} -#endif - -void __init cmx255_init(void) -{ - pxa2xx_mfp_config(ARRAY_AND_SIZE(cmx255_pin_config)); - - cmx255_init_rtc(); - cmx255_init_nor(); - cmx255_init_nand(); -} diff --git a/arch/arm/mach-pxa/cm-x270.c b/arch/arm/mach-pxa/cm-x270.c deleted file mode 100644 index 9baad11314f2..000000000000 --- a/arch/arm/mach-pxa/cm-x270.c +++ /dev/null @@ -1,419 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/arch/arm/mach-pxa/cm-x270.c - * - * Copyright (C) 2007, 2008 CompuLab, Ltd. - * Mike Rapoport - */ - -#include -#include -#include -#include -#include - -#include -#include