From 45ab8daed512258c07fd14536a3633440dabfe84 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 8 Feb 2024 11:51:45 +0100 Subject: arm64: dts: ti: k3-am62p5-sk: minor whitespace cleanup The DTS code coding style expects exactly one space before '{' character. Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20240208105146.128645-1-krzysztof.kozlowski@linaro.org Signed-off-by: Nishanth Menon --- arch/arm64/boot/dts/ti/k3-am62p5-sk.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm64/boot/dts') diff --git a/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts b/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts index e86f34e835c1..6694087b3665 100644 --- a/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts @@ -493,7 +493,7 @@ pinctrl-0 = <&ospi0_pins_default>; bootph-all; - flash@0{ + flash@0 { compatible = "jedec,spi-nor"; reg = <0x0>; spi-tx-bus-width = <8>; -- cgit v1.2.3 From a15e5320d91abe68ff1123bb72583d629c49100c Mon Sep 17 00:00:00 2001 From: Andrejs Cainikovs Date: Fri, 15 Mar 2024 11:25:00 +0100 Subject: arm64: dts: ti: verdin-am62: dahlia: fix audio clock In current configuration, wm8904 codec on Dahlia carrier board provides distorted audio output. This happens due to reference clock is fixed to 25MHz and no FLL is enabled. During playback following parameters are set: 44100Hz: [ 310.276924] wm8904 1-001a: Target BCLK is 1411200Hz [ 310.276990] wm8904 1-001a: Using 25000000Hz MCLK [ 310.277001] wm8904 1-001a: CLK_SYS is 12500000Hz [ 310.277018] wm8904 1-001a: Selected CLK_SYS_RATIO of 256 [ 310.277026] wm8904 1-001a: Selected SAMPLE_RATE of 44100Hz [ 310.277034] wm8904 1-001a: Selected BCLK_DIV of 80 for 1562500Hz BCLK [ 310.277044] wm8904 1-001a: LRCLK_RATE is 35 Deviation = 1411200 vs 1562500 = 10.721% Also, LRCLK_RATE is 35, should be 32. 48000Hz: [ 302.449970] wm8904 1-001a: Target BCLK is 1536000Hz [ 302.450037] wm8904 1-001a: Using 25000000Hz MCLK [ 302.450049] wm8904 1-001a: CLK_SYS is 12500000Hz [ 302.450065] wm8904 1-001a: Selected CLK_SYS_RATIO of 256 [ 302.450074] wm8904 1-001a: Selected SAMPLE_RATE of 48000Hz [ 302.450083] wm8904 1-001a: Selected BCLK_DIV of 80 for 1562500Hz BCLK [ 302.450092] wm8904 1-001a: LRCLK_RATE is 32 Deviation = 1536000 vs 1562500 = 1.725% Enabling wm8904 FLL via providing mclk-fs property to simple-audio-card configures clocks properly, but also adjusts audio reference clock (mclk), which in case of TI AM62 should be avoided, as it only supports 25MHz output [1][2]. This change enables FLL on wm8904 by providing mclk-fs, and drops audio reference clock out of DAI configuration, which prevents simple-audio-card to adjust it before every playback [3]. 41000Hz: [ 111.820533] wm8904 1-001a: FLL configured for 25000000Hz->11289600Hz [ 111.820597] wm8904 1-001a: Clock source is 0 at 11289600Hz [ 111.820651] wm8904 1-001a: Using 11289600Hz FLL clock [ 111.820703] wm8904 1-001a: CLK_SYS is 11289600Hz [ 111.820798] wm8904 1-001a: Target BCLK is 1411200Hz [ 111.820847] wm8904 1-001a: Using 11289600Hz FLL clock [ 111.820894] wm8904 1-001a: CLK_SYS is 11289600Hz [ 111.820933] wm8904 1-001a: Selected CLK_SYS_RATIO of 256 [ 111.820971] wm8904 1-001a: Selected SAMPLE_RATE of 44100Hz [ 111.821009] wm8904 1-001a: Selected BCLK_DIV of 80 for 1411200Hz BCLK [ 111.821051] wm8904 1-001a: LRCLK_RATE is 32 48000Hz: [ 144.119254] wm8904 1-001a: FLL configured for 25000000Hz->12288000Hz [ 144.119309] wm8904 1-001a: Clock source is 0 at 12288000Hz [ 144.119364] wm8904 1-001a: Using 12288000Hz FLL clock [ 144.119413] wm8904 1-001a: CLK_SYS is 12288000Hz [ 144.119512] wm8904 1-001a: Target BCLK is 1536000Hz [ 144.119561] wm8904 1-001a: Using 12288000Hz FLL clock [ 144.119608] wm8904 1-001a: CLK_SYS is 12288000Hz [ 144.119646] wm8904 1-001a: Selected CLK_SYS_RATIO of 256 [ 144.119685] wm8904 1-001a: Selected SAMPLE_RATE of 48000Hz [ 144.119723] wm8904 1-001a: Selected BCLK_DIV of 80 for 1536000Hz BCLK [ 144.119764] wm8904 1-001a: LRCLK_RATE is 32 [1]: https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1175479/processor-sdk-am62x-output-audio_ext_refclk0-as-mclk-for-codec-and-mcbsp/4444986#4444986 [2]: https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1188051/am625-audio_ext_refclk1-clock-output---dts-support/4476322#4476322 [3]: sound/soc/generic/simple-card-utils.c#L441 Fixes: f5bf894c865b ("arm64: dts: ti: verdin-am62: dahlia: add sound card") Suggested-by: Charles Keepax Signed-off-by: Andrejs Cainikovs Reviewed-by: Charles Keepax Reviewed-by: Francesco Dolcini Link: https://lore.kernel.org/r/20240315102500.18492-1-andrejs.cainikovs@gmail.com Signed-off-by: Nishanth Menon --- arch/arm64/boot/dts/ti/k3-am62-verdin-dahlia.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm64/boot/dts') diff --git a/arch/arm64/boot/dts/ti/k3-am62-verdin-dahlia.dtsi b/arch/arm64/boot/dts/ti/k3-am62-verdin-dahlia.dtsi index 6c4cec8728e4..e42085aa118f 100644 --- a/arch/arm64/boot/dts/ti/k3-am62-verdin-dahlia.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62-verdin-dahlia.dtsi @@ -22,6 +22,7 @@ simple-audio-card,format = "i2s"; simple-audio-card,frame-master = <&codec_dai>; simple-audio-card,name = "verdin-wm8904"; + simple-audio-card,mclk-fs = <256>; simple-audio-card,routing = "Headphone Jack", "HPOUTL", "Headphone Jack", "HPOUTR", @@ -35,7 +36,6 @@ "Line", "Line In Jack"; codec_dai: simple-audio-card,codec { - clocks = <&audio_refclk1>; sound-dai = <&wm8904_1a>; }; -- cgit v1.2.3 From f70a88829723c1b462ea0fec15fa75809a0d670b Mon Sep 17 00:00:00 2001 From: Max Krummenacher Date: Wed, 20 Mar 2024 15:29:37 +0100 Subject: arm64: dts: ti: verdin-am62: Set memory size to 2gb The maximum DDR RAM size stuffed on the Verdin AM62 is 2GB, correct the memory node accordingly. Fixes: 316b80246b16 ("arm64: dts: ti: add verdin am62") Cc: Signed-off-by: Max Krummenacher Reviewed-by: Francesco Dolcini Link: https://lore.kernel.org/r/20240320142937.2028707-1-max.oss.09@gmail.com Signed-off-by: Nishanth Menon --- arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm64/boot/dts') diff --git a/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi b/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi index e8d8857ad51f..8c837467069b 100644 --- a/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi @@ -76,7 +76,7 @@ memory@80000000 { device_type = "memory"; - reg = <0x00000000 0x80000000 0x00000000 0x40000000>; /* 1G RAM */ + reg = <0x00000000 0x80000000 0x00000000 0x80000000>; /* 2G RAM */ }; opp-table { -- cgit v1.2.3 From ef00a95def6f6f5e2bd18ad3cb73834650768288 Mon Sep 17 00:00:00 2001 From: Francesco Dolcini Date: Mon, 25 Mar 2024 09:33:40 +0100 Subject: arm64: dts: ti: verdin-am62: use SD1 CD as GPIO MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit TI SDHCI instance has a hardware debounce timer of 1 second as described in commit 7ca0f166f5b2 ("mmc: sdhci_am654: Add workaround for card detect debounce timer"), because of this the boot time increases of up to 1 second. Workaround the issue the same way that is done on arch/arm64/boot/dts/ti/k3-am625-beagleplay.dts, using the SD1 CD as GPIO. Suggested-by: Nishanth Menon Reported-by: João Paulo Silva Gonçalves Closes: https://lore.kernel.org/all/0e81af80de3d55e72f79af83fa5db87f5c9938f8.camel@toradex.com/ Signed-off-by: Francesco Dolcini Link: https://lore.kernel.org/r/20240325083340.89568-1-francesco@dolcini.it Signed-off-by: Nishanth Menon --- arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) (limited to 'arch/arm64/boot/dts') diff --git a/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi b/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi index 8c837467069b..c5091fa0c240 100644 --- a/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi @@ -457,6 +457,13 @@ >; }; + /* Verdin SD_1_CD# as GPIO */ + pinctrl_sd1_cd_gpio: main-gpio1-48-default-pins { + pinctrl-single,pins = < + AM62X_IOPAD(0x240, PIN_INPUT_PULLUP, 7) /* (D17) MMC1_SDCD.GPIO1_48 */ /* SODIMM 84 */ + >; + }; + /* Verdin DSI_1_INT# (pulled-up as active-low) */ pinctrl_dsi1_int: main-gpio1-49-default-pins { pinctrl-single,pins = < @@ -571,7 +578,6 @@ AM62X_IOPAD(0x22c, PIN_INPUT, 0) /* (B21) MMC1_DAT1 */ /* SODIMM 82 */ AM62X_IOPAD(0x228, PIN_INPUT, 0) /* (C21) MMC1_DAT2 */ /* SODIMM 70 */ AM62X_IOPAD(0x224, PIN_INPUT, 0) /* (D22) MMC1_DAT3 */ /* SODIMM 72 */ - AM62X_IOPAD(0x240, PIN_INPUT_PULLUP, 0) /* (D17) MMC1_SDCD */ /* SODIMM 84 */ >; }; @@ -1441,10 +1447,12 @@ /* Verdin SD_1 */ &sdhci1 { pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_sdhci1>; + pinctrl-0 = <&pinctrl_sdhci1>, <&pinctrl_sd1_cd_gpio>; + cd-gpios = <&main_gpio1 48 GPIO_ACTIVE_LOW>; disable-wp; vmmc-supply = <®_sdhc1_vmmc>; vqmmc-supply = <®_sdhc1_vqmmc>; + ti,fails-without-test-cd; status = "disabled"; }; -- cgit v1.2.3 From a2a6bbd108da8dcbf378bc452ce0cf0e5b143f99 Mon Sep 17 00:00:00 2001 From: Sukrut Bellary Date: Mon, 25 Mar 2024 09:35:10 -0500 Subject: arm64: dts: ti: k3-am625-beagleplay: Use mmc-pwrseq for wl18xx enable BeaglePlay SBC[1] has Texas Instrument's WL18xx WiFi chipset[2]. Currently, WLAN_EN is configured as regulator and regulator-always-on. However, the timing and wlan_en sequencing is not correctly modelled. This causes the sdio access to fail during runtime-pm power operations saving or during system suspend/resume/hibernation/freeze operations. This is because the WLAN_EN line is not deasserted to low '0' to power down the WiFi. So during restore, the WiFi driver tries to load the FW without following correct power sequence. WLAN_EN => '1'/assert (high) to power-up the chipset. Use mmc-pwrseq-simple to drive TI's WiFi (WL18xx) chipset enable 'WLAN_EN'. mmc-pwrseq-simple provides power sequence flexibility with support for post power-on and power-off delays. Typical log signature that indicates this bug is: wl1271_sdio mmc2:0001:2: sdio write failed (-110) Followed by possibly a kernel warning (depending on firmware present): WARNING: CPU: 1 PID: 45 at drivers/net/wireless/ti/wlcore/sdio.c:123 wl12xx_sdio_raw_write+0xe4/0x168 [wlcore_sdio] [1] https://www.beagleboard.org/boards/beagleplay [2] https://www.ti.com/lit/ds/symlink/wl1807mod.pdf Fixes: f5a731f0787f ("arm64: dts: ti: Add k3-am625-beagleplay") Suggested-by: Shengyu Qu Signed-off-by: Sukrut Bellary Tested-by: Robert Nelson Link: https://lore.kernel.org/r/20240325143511.2144768-1-nm@ti.com Signed-off-by: Nishanth Menon --- arch/arm64/boot/dts/ti/k3-am625-beagleplay.dts | 27 ++++++++++++-------------- 1 file changed, 12 insertions(+), 15 deletions(-) (limited to 'arch/arm64/boot/dts') diff --git a/arch/arm64/boot/dts/ti/k3-am625-beagleplay.dts b/arch/arm64/boot/dts/ti/k3-am625-beagleplay.dts index a34e0df2ab86..84977c1cc85d 100644 --- a/arch/arm64/boot/dts/ti/k3-am625-beagleplay.dts +++ b/arch/arm64/boot/dts/ti/k3-am625-beagleplay.dts @@ -82,6 +82,17 @@ }; }; + sdio_pwrseq: sdio-pwrseq { + compatible = "mmc-pwrseq-simple"; + pinctrl-names = "default"; + pinctrl-0 = <&wifi_en_pins_default>; + /* Internal power on time(Figure 8-3) * 2 */ + post-power-on-delay-ms = <10>; + /* Re-enable time(Figure 8-2) + 20uS */ + power-off-delay-us = <80>; + reset-gpios = <&main_gpio0 38 GPIO_ACTIVE_LOW>; + }; + vsys_5v0: regulator-1 { bootph-all; compatible = "regulator-fixed"; @@ -104,20 +115,6 @@ regulator-boot-on; }; - wlan_en: regulator-3 { - /* OUTPUT of SN74AVC2T244DQMR */ - compatible = "regulator-fixed"; - regulator-name = "wlan_en"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - enable-active-high; - regulator-always-on; - vin-supply = <&vdd_3v3>; - gpio = <&main_gpio0 38 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&wifi_en_pins_default>; - }; - vdd_3v3_sd: regulator-4 { /* output of TPS22918DBVR-U21 */ bootph-all; @@ -839,13 +836,13 @@ }; &sdhci2 { - vmmc-supply = <&wlan_en>; pinctrl-names = "default"; pinctrl-0 = <&wifi_pins_default>, <&wifi_32k_clk>; non-removable; ti,fails-without-test-cd; cap-power-off-card; keep-power-in-suspend; + mmc-pwrseq = <&sdio_pwrseq>; assigned-clocks = <&k3_clks 157 158>; assigned-clock-parents = <&k3_clks 157 160>; #address-cells = <1>; -- cgit v1.2.3 From 104996ca7946daf57c2b97f8dde581f042c90118 Mon Sep 17 00:00:00 2001 From: Markus Schneider-Pargmann Date: Mon, 25 Mar 2024 16:20:29 +0100 Subject: arm64: dts: ti: k3-am62-lp-sk: Remove tps65219 power-button On am62-lp-sk the PMIC is not wired up to a power button. Remove this property. This fixes issues observed when entering a very deep sleep state that is not yet available upstream. Fixes: e6a51ffabfc1 ("arm64: ti: dts: Add support for AM62x LP SK") Signed-off-by: Markus Schneider-Pargmann Link: https://lore.kernel.org/r/20240325152029.2933445-1-msp@baylibre.com Signed-off-by: Nishanth Menon --- arch/arm64/boot/dts/ti/k3-am62-lp-sk.dts | 1 - 1 file changed, 1 deletion(-) (limited to 'arch/arm64/boot/dts') diff --git a/arch/arm64/boot/dts/ti/k3-am62-lp-sk.dts b/arch/arm64/boot/dts/ti/k3-am62-lp-sk.dts index c4149059a4c5..9a17bd3e59c9 100644 --- a/arch/arm64/boot/dts/ti/k3-am62-lp-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-am62-lp-sk.dts @@ -166,7 +166,6 @@ interrupt-parent = <&gic500>; interrupts = ; - ti,power-button; regulators { buck1_reg: buck1 { -- cgit v1.2.3 From 2910a4b938d666d85cff44ec443e1a9f720daa5d Mon Sep 17 00:00:00 2001 From: Andrew Davis Date: Tue, 26 Mar 2024 13:54:36 -0500 Subject: arm64: dts: ti: k3-am65: Remove UART baud rate selection As described in the binding document for the "current-speed" property: "This should only be present in case a driver has no chance to know the baud rate of the slave device." This is not the case for the UART used in K3 devices, the current baud-rate can be calculated from the registers. Having this property has the effect of actually skipping the baud-rate setup in some drivers as it assumes it will already be set to this rate, which may not always be the case. It seems this property's purpose was mistaken as selecting the desired baud-rate, which it does not. It would have been wrong to select that here anyway as DT is not the place for configuration, especially when there are already more standard ways to set serial baud-rates. Signed-off-by: Andrew Davis Link: https://lore.kernel.org/r/20240326185441.29656-1-afd@ti.com Signed-off-by: Nishanth Menon --- arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 1 - arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi | 1 - arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi | 1 - 3 files changed, 3 deletions(-) (limited to 'arch/arm64/boot/dts') diff --git a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi index ff857117d719..670557c89f75 100644 --- a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi @@ -89,7 +89,6 @@ reg = <0x00 0x02800000 0x00 0x100>; interrupts = ; clock-frequency = <48000000>; - current-speed = <115200>; power-domains = <&k3_pds 146 TI_SCI_PD_EXCLUSIVE>; status = "disabled"; }; diff --git a/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi b/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi index 6ff3ccc39fb4..4f808e508975 100644 --- a/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi @@ -43,7 +43,6 @@ reg = <0x00 0x40a00000 0x00 0x100>; interrupts = ; clock-frequency = <96000000>; - current-speed = <115200>; power-domains = <&k3_pds 149 TI_SCI_PD_EXCLUSIVE>; status = "disabled"; }; diff --git a/arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi index 37527890ddea..eee072e44a42 100644 --- a/arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi @@ -59,7 +59,6 @@ reg = <0x42300000 0x100>; interrupts = ; clock-frequency = <48000000>; - current-speed = <115200>; power-domains = <&k3_pds 150 TI_SCI_PD_EXCLUSIVE>; status = "disabled"; }; -- cgit v1.2.3 From e95c8826eefcdc5a8cc526ebaa561beb13050e44 Mon Sep 17 00:00:00 2001 From: Andrew Davis Date: Tue, 26 Mar 2024 13:54:37 -0500 Subject: arm64: dts: ti: k3-am64: Remove UART baud rate selection As described in the binding document for the "current-speed" property: "This should only be present in case a driver has no chance to know the baud rate of the slave device." This is not the case for the UART used in K3 devices, the current baud-rate can be calculated from the registers. Having this property has the effect of actually skipping the baud-rate setup in some drivers as it assumes it will already be set to this rate, which may not always be the case. It seems this property's purpose was mistaken as selecting the desired baud-rate, which it does not. It would have been wrong to select that here anyway as DT is not the place for configuration, especially when there are already more standard ways to set serial baud-rates. Signed-off-by: Andrew Davis Link: https://lore.kernel.org/r/20240326185441.29656-2-afd@ti.com Signed-off-by: Nishanth Menon --- arch/arm64/boot/dts/ti/k3-am642-evm.dts | 1 - arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-rdk.dts | 2 -- arch/arm64/boot/dts/ti/k3-am642-sk.dts | 1 - 3 files changed, 4 deletions(-) (limited to 'arch/arm64/boot/dts') diff --git a/arch/arm64/boot/dts/ti/k3-am642-evm.dts b/arch/arm64/boot/dts/ti/k3-am642-evm.dts index 53fe1d065ddb..e20e4ffd0f1f 100644 --- a/arch/arm64/boot/dts/ti/k3-am642-evm.dts +++ b/arch/arm64/boot/dts/ti/k3-am642-evm.dts @@ -473,7 +473,6 @@ status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&main_uart0_pins_default>; - current-speed = <115200>; }; /* main_uart1 is reserved for firmware usage */ diff --git a/arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-rdk.dts b/arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-rdk.dts index 8237b8c815b8..dc774f9c7541 100644 --- a/arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-rdk.dts +++ b/arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-rdk.dts @@ -275,7 +275,6 @@ status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&main_uart0_pins_default>; - current-speed = <115200>; }; &main_uart1 { @@ -283,7 +282,6 @@ pinctrl-names = "default"; pinctrl-0 = <&main_uart1_pins_default>; uart-has-rtscts; - current-speed = <115200>; }; &sdhci1 { diff --git a/arch/arm64/boot/dts/ti/k3-am642-sk.dts b/arch/arm64/boot/dts/ti/k3-am642-sk.dts index 67cd41bf806e..5b028b3a3192 100644 --- a/arch/arm64/boot/dts/ti/k3-am642-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-am642-sk.dts @@ -381,7 +381,6 @@ status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&main_uart0_pins_default>; - current-speed = <115200>; }; &main_uart1 { -- cgit v1.2.3 From 52f02af997faca4389169f4cca5086228daf4b01 Mon Sep 17 00:00:00 2001 From: Andrew Davis Date: Tue, 26 Mar 2024 13:54:38 -0500 Subject: arm64: dts: ti: k3-j7200: Remove UART baud rate selection As described in the binding document for the "current-speed" property: "This should only be present in case a driver has no chance to know the baud rate of the slave device." This is not the case for the UART used in K3 devices, the current baud-rate can be calculated from the registers. Having this property has the effect of actually skipping the baud-rate setup in some drivers as it assumes it will already be set to this rate, which may not always be the case. It seems this property's purpose was mistaken as selecting the desired baud-rate, which it does not. It would have been wrong to select that here anyway as DT is not the place for configuration, especially when there are already more standard ways to set serial baud-rates. Signed-off-by: Andrew Davis Link: https://lore.kernel.org/r/20240326185441.29656-3-afd@ti.com Signed-off-by: Nishanth Menon --- arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 10 ---------- arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi | 2 -- 2 files changed, 12 deletions(-) (limited to 'arch/arm64/boot/dts') diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi index 657f9cc9f4ea..9386bf3ef9f6 100644 --- a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi @@ -440,7 +440,6 @@ reg = <0x00 0x02800000 0x00 0x100>; interrupts = ; clock-frequency = <48000000>; - current-speed = <115200>; power-domains = <&k3_pds 146 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 146 2>; clock-names = "fclk"; @@ -452,7 +451,6 @@ reg = <0x00 0x02810000 0x00 0x100>; interrupts = ; clock-frequency = <48000000>; - current-speed = <115200>; power-domains = <&k3_pds 278 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 278 2>; clock-names = "fclk"; @@ -464,7 +462,6 @@ reg = <0x00 0x02820000 0x00 0x100>; interrupts = ; clock-frequency = <48000000>; - current-speed = <115200>; power-domains = <&k3_pds 279 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 279 2>; clock-names = "fclk"; @@ -476,7 +473,6 @@ reg = <0x00 0x02830000 0x00 0x100>; interrupts = ; clock-frequency = <48000000>; - current-speed = <115200>; power-domains = <&k3_pds 280 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 280 2>; clock-names = "fclk"; @@ -488,7 +484,6 @@ reg = <0x00 0x02840000 0x00 0x100>; interrupts = ; clock-frequency = <48000000>; - current-speed = <115200>; power-domains = <&k3_pds 281 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 281 2>; clock-names = "fclk"; @@ -500,7 +495,6 @@ reg = <0x00 0x02850000 0x00 0x100>; interrupts = ; clock-frequency = <48000000>; - current-speed = <115200>; power-domains = <&k3_pds 282 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 282 2>; clock-names = "fclk"; @@ -512,7 +506,6 @@ reg = <0x00 0x02860000 0x00 0x100>; interrupts = ; clock-frequency = <48000000>; - current-speed = <115200>; power-domains = <&k3_pds 283 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 283 2>; clock-names = "fclk"; @@ -524,7 +517,6 @@ reg = <0x00 0x02870000 0x00 0x100>; interrupts = ; clock-frequency = <48000000>; - current-speed = <115200>; power-domains = <&k3_pds 284 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 284 2>; clock-names = "fclk"; @@ -536,7 +528,6 @@ reg = <0x00 0x02880000 0x00 0x100>; interrupts = ; clock-frequency = <48000000>; - current-speed = <115200>; power-domains = <&k3_pds 285 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 285 2>; clock-names = "fclk"; @@ -548,7 +539,6 @@ reg = <0x00 0x02890000 0x00 0x100>; interrupts = ; clock-frequency = <48000000>; - current-speed = <115200>; power-domains = <&k3_pds 286 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 286 2>; clock-names = "fclk"; diff --git a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi index 7cf21c99956e..c547bc8fb608 100644 --- a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi @@ -259,7 +259,6 @@ reg = <0x00 0x42300000 0x00 0x100>; interrupts = ; clock-frequency = <48000000>; - current-speed = <115200>; power-domains = <&k3_pds 287 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 287 2>; clock-names = "fclk"; @@ -271,7 +270,6 @@ reg = <0x00 0x40a00000 0x00 0x100>; interrupts = ; clock-frequency = <96000000>; - current-speed = <115200>; power-domains = <&k3_pds 149 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 149 2>; clock-names = "fclk"; -- cgit v1.2.3 From cef23c6b15030f056afbbdddc0323b406c392fa2 Mon Sep 17 00:00:00 2001 From: Andrew Davis Date: Tue, 26 Mar 2024 13:54:39 -0500 Subject: arm64: dts: ti: k3-j721e: Remove UART baud rate selection As described in the binding document for the "current-speed" property: "This should only be present in case a driver has no chance to know the baud rate of the slave device." This is not the case for the UART used in K3 devices, the current baud-rate can be calculated from the registers. Having this property has the effect of actually skipping the baud-rate setup in some drivers as it assumes it will already be set to this rate, which may not always be the case. It seems this property's purpose was mistaken as selecting the desired baud-rate, which it does not. It would have been wrong to select that here anyway as DT is not the place for configuration, especially when there are already more standard ways to set serial baud-rates. Signed-off-by: Andrew Davis Link: https://lore.kernel.org/r/20240326185441.29656-4-afd@ti.com Signed-off-by: Nishanth Menon --- arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 10 ---------- arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi | 2 -- 2 files changed, 12 deletions(-) (limited to 'arch/arm64/boot/dts') diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi index c7eafbc862f9..0da785be80ff 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi @@ -1337,7 +1337,6 @@ reg = <0x00 0x02800000 0x00 0x100>; interrupts = ; clock-frequency = <48000000>; - current-speed = <115200>; power-domains = <&k3_pds 146 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 146 0>; clock-names = "fclk"; @@ -1349,7 +1348,6 @@ reg = <0x00 0x02810000 0x00 0x100>; interrupts = ; clock-frequency = <48000000>; - current-speed = <115200>; power-domains = <&k3_pds 278 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 278 0>; clock-names = "fclk"; @@ -1361,7 +1359,6 @@ reg = <0x00 0x02820000 0x00 0x100>; interrupts = ; clock-frequency = <48000000>; - current-speed = <115200>; power-domains = <&k3_pds 279 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 279 0>; clock-names = "fclk"; @@ -1373,7 +1370,6 @@ reg = <0x00 0x02830000 0x00 0x100>; interrupts = ; clock-frequency = <48000000>; - current-speed = <115200>; power-domains = <&k3_pds 280 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 280 0>; clock-names = "fclk"; @@ -1385,7 +1381,6 @@ reg = <0x00 0x02840000 0x00 0x100>; interrupts = ; clock-frequency = <48000000>; - current-speed = <115200>; power-domains = <&k3_pds 281 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 281 0>; clock-names = "fclk"; @@ -1397,7 +1392,6 @@ reg = <0x00 0x02850000 0x00 0x100>; interrupts = ; clock-frequency = <48000000>; - current-speed = <115200>; power-domains = <&k3_pds 282 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 282 0>; clock-names = "fclk"; @@ -1409,7 +1403,6 @@ reg = <0x00 0x02860000 0x00 0x100>; interrupts = ; clock-frequency = <48000000>; - current-speed = <115200>; power-domains = <&k3_pds 283 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 283 0>; clock-names = "fclk"; @@ -1421,7 +1414,6 @@ reg = <0x00 0x02870000 0x00 0x100>; interrupts = ; clock-frequency = <48000000>; - current-speed = <115200>; power-domains = <&k3_pds 284 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 284 0>; clock-names = "fclk"; @@ -1433,7 +1425,6 @@ reg = <0x00 0x02880000 0x00 0x100>; interrupts = ; clock-frequency = <48000000>; - current-speed = <115200>; power-domains = <&k3_pds 285 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 285 0>; clock-names = "fclk"; @@ -1445,7 +1436,6 @@ reg = <0x00 0x02890000 0x00 0x100>; interrupts = ; clock-frequency = <48000000>; - current-speed = <115200>; power-domains = <&k3_pds 286 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 286 0>; clock-names = "fclk"; diff --git a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi index 4618b697fbc4..8fc768d84b75 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi @@ -243,7 +243,6 @@ reg = <0x00 0x42300000 0x00 0x100>; interrupts = ; clock-frequency = <48000000>; - current-speed = <115200>; power-domains = <&k3_pds 287 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 287 0>; clock-names = "fclk"; @@ -255,7 +254,6 @@ reg = <0x00 0x40a00000 0x00 0x100>; interrupts = ; clock-frequency = <96000000>; - current-speed = <115200>; power-domains = <&k3_pds 149 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 149 0>; clock-names = "fclk"; -- cgit v1.2.3 From 2586d87cdaa98443c289a9c65df744021a84267f Mon Sep 17 00:00:00 2001 From: Andrew Davis Date: Tue, 26 Mar 2024 13:54:40 -0500 Subject: arm64: dts: ti: k3-j721s2: Remove UART baud rate selection As described in the binding document for the "current-speed" property: "This should only be present in case a driver has no chance to know the baud rate of the slave device." This is not the case for the UART used in K3 devices, the current baud-rate can be calculated from the registers. Having this property has the effect of actually skipping the baud-rate setup in some drivers as it assumes it will already be set to this rate, which may not always be the case. It seems this property's purpose was mistaken as selecting the desired baud-rate, which it does not. It would have been wrong to select that here anyway as DT is not the place for configuration, especially when there are already more standard ways to set serial baud-rates. Signed-off-by: Andrew Davis Link: https://lore.kernel.org/r/20240326185441.29656-5-afd@ti.com Signed-off-by: Nishanth Menon --- arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 10 ---------- arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi | 2 -- 2 files changed, 12 deletions(-) (limited to 'arch/arm64/boot/dts') diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi index b70c8615e3c1..3cb06a7e4117 100644 --- a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi @@ -459,7 +459,6 @@ compatible = "ti,j721e-uart", "ti,am654-uart"; reg = <0x00 0x02800000 0x00 0x200>; interrupts = ; - current-speed = <115200>; clocks = <&k3_clks 146 3>; clock-names = "fclk"; power-domains = <&k3_pds 146 TI_SCI_PD_EXCLUSIVE>; @@ -470,7 +469,6 @@ compatible = "ti,j721e-uart", "ti,am654-uart"; reg = <0x00 0x02810000 0x00 0x200>; interrupts = ; - current-speed = <115200>; clocks = <&k3_clks 350 3>; clock-names = "fclk"; power-domains = <&k3_pds 350 TI_SCI_PD_EXCLUSIVE>; @@ -481,7 +479,6 @@ compatible = "ti,j721e-uart", "ti,am654-uart"; reg = <0x00 0x02820000 0x00 0x200>; interrupts = ; - current-speed = <115200>; clocks = <&k3_clks 351 3>; clock-names = "fclk"; power-domains = <&k3_pds 351 TI_SCI_PD_EXCLUSIVE>; @@ -492,7 +489,6 @@ compatible = "ti,j721e-uart", "ti,am654-uart"; reg = <0x00 0x02830000 0x00 0x200>; interrupts = ; - current-speed = <115200>; clocks = <&k3_clks 352 3>; clock-names = "fclk"; power-domains = <&k3_pds 352 TI_SCI_PD_EXCLUSIVE>; @@ -503,7 +499,6 @@ compatible = "ti,j721e-uart", "ti,am654-uart"; reg = <0x00 0x02840000 0x00 0x200>; interrupts = ; - current-speed = <115200>; clocks = <&k3_clks 353 3>; clock-names = "fclk"; power-domains = <&k3_pds 353 TI_SCI_PD_EXCLUSIVE>; @@ -514,7 +509,6 @@ compatible = "ti,j721e-uart", "ti,am654-uart"; reg = <0x00 0x02850000 0x00 0x200>; interrupts = ; - current-speed = <115200>; clocks = <&k3_clks 354 3>; clock-names = "fclk"; power-domains = <&k3_pds 354 TI_SCI_PD_EXCLUSIVE>; @@ -525,7 +519,6 @@ compatible = "ti,j721e-uart", "ti,am654-uart"; reg = <0x00 0x02860000 0x00 0x200>; interrupts = ; - current-speed = <115200>; clocks = <&k3_clks 355 3>; clock-names = "fclk"; power-domains = <&k3_pds 355 TI_SCI_PD_EXCLUSIVE>; @@ -536,7 +529,6 @@ compatible = "ti,j721e-uart", "ti,am654-uart"; reg = <0x00 0x02870000 0x00 0x200>; interrupts = ; - current-speed = <115200>; clocks = <&k3_clks 356 3>; clock-names = "fclk"; power-domains = <&k3_pds 356 TI_SCI_PD_EXCLUSIVE>; @@ -547,7 +539,6 @@ compatible = "ti,j721e-uart", "ti,am654-uart"; reg = <0x00 0x02880000 0x00 0x200>; interrupts = ; - current-speed = <115200>; clocks = <&k3_clks 357 3>; clock-names = "fclk"; power-domains = <&k3_pds 357 TI_SCI_PD_EXCLUSIVE>; @@ -558,7 +549,6 @@ compatible = "ti,j721e-uart", "ti,am654-uart"; reg = <0x00 0x02890000 0x00 0x200>; interrupts = ; - current-speed = <115200>; clocks = <&k3_clks 358 3>; clock-names = "fclk"; power-domains = <&k3_pds 358 TI_SCI_PD_EXCLUSIVE>; diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi index eaf7f709440e..5ccb04c7c462 100644 --- a/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi @@ -298,7 +298,6 @@ compatible = "ti,j721e-uart", "ti,am654-uart"; reg = <0x00 0x42300000 0x00 0x200>; interrupts = ; - current-speed = <115200>; clocks = <&k3_clks 359 3>; clock-names = "fclk"; power-domains = <&k3_pds 359 TI_SCI_PD_EXCLUSIVE>; @@ -309,7 +308,6 @@ compatible = "ti,j721e-uart", "ti,am654-uart"; reg = <0x00 0x40a00000 0x00 0x200>; interrupts = ; - current-speed = <115200>; clocks = <&k3_clks 149 3>; clock-names = "fclk"; power-domains = <&k3_pds 149 TI_SCI_PD_EXCLUSIVE>; -- cgit v1.2.3 From 7d049a551467556dc7699ba7e71356c03f4fbd6f Mon Sep 17 00:00:00 2001 From: Andrew Davis Date: Tue, 26 Mar 2024 13:54:41 -0500 Subject: arm64: dts: ti: k3-j784s4: Remove UART baud rate selection As described in the binding document for the "current-speed" property: "This should only be present in case a driver has no chance to know the baud rate of the slave device." This is not the case for the UART used in K3 devices, the current baud-rate can be calculated from the registers. Having this property has the effect of actually skipping the baud-rate setup in some drivers as it assumes it will already be set to this rate, which may not always be the case. It seems this property's purpose was mistaken as selecting the desired baud-rate, which it does not. It would have been wrong to select that here anyway as DT is not the place for configuration, especially when there are already more standard ways to set serial baud-rates. Signed-off-by: Andrew Davis Link: https://lore.kernel.org/r/20240326185441.29656-6-afd@ti.com Signed-off-by: Nishanth Menon --- arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 10 ---------- arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi | 2 -- 2 files changed, 12 deletions(-) (limited to 'arch/arm64/boot/dts') diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi index b67c37460a73..d42f25cacf23 100644 --- a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi @@ -404,7 +404,6 @@ compatible = "ti,j721e-uart", "ti,am654-uart"; reg = <0x00 0x02800000 0x00 0x200>; interrupts = ; - current-speed = <115200>; clocks = <&k3_clks 146 0>; clock-names = "fclk"; power-domains = <&k3_pds 146 TI_SCI_PD_EXCLUSIVE>; @@ -415,7 +414,6 @@ compatible = "ti,j721e-uart", "ti,am654-uart"; reg = <0x00 0x02810000 0x00 0x200>; interrupts = ; - current-speed = <115200>; clocks = <&k3_clks 388 0>; clock-names = "fclk"; power-domains = <&k3_pds 388 TI_SCI_PD_EXCLUSIVE>; @@ -426,7 +424,6 @@ compatible = "ti,j721e-uart", "ti,am654-uart"; reg = <0x00 0x02820000 0x00 0x200>; interrupts = ; - current-speed = <115200>; clocks = <&k3_clks 389 0>; clock-names = "fclk"; power-domains = <&k3_pds 389 TI_SCI_PD_EXCLUSIVE>; @@ -437,7 +434,6 @@ compatible = "ti,j721e-uart", "ti,am654-uart"; reg = <0x00 0x02830000 0x00 0x200>; interrupts = ; - current-speed = <115200>; clocks = <&k3_clks 390 0>; clock-names = "fclk"; power-domains = <&k3_pds 390 TI_SCI_PD_EXCLUSIVE>; @@ -448,7 +444,6 @@ compatible = "ti,j721e-uart", "ti,am654-uart"; reg = <0x00 0x02840000 0x00 0x200>; interrupts = ; - current-speed = <115200>; clocks = <&k3_clks 391 0>; clock-names = "fclk"; power-domains = <&k3_pds 391 TI_SCI_PD_EXCLUSIVE>; @@ -459,7 +454,6 @@ compatible = "ti,j721e-uart", "ti,am654-uart"; reg = <0x00 0x02850000 0x00 0x200>; interrupts = ; - current-speed = <115200>; clocks = <&k3_clks 392 0>; clock-names = "fclk"; power-domains = <&k3_pds 392 TI_SCI_PD_EXCLUSIVE>; @@ -470,7 +464,6 @@ compatible = "ti,j721e-uart", "ti,am654-uart"; reg = <0x00 0x02860000 0x00 0x200>; interrupts = ; - current-speed = <115200>; clocks = <&k3_clks 393 0>; clock-names = "fclk"; power-domains = <&k3_pds 393 TI_SCI_PD_EXCLUSIVE>; @@ -481,7 +474,6 @@ compatible = "ti,j721e-uart", "ti,am654-uart"; reg = <0x00 0x02870000 0x00 0x200>; interrupts = ; - current-speed = <115200>; clocks = <&k3_clks 394 0>; clock-names = "fclk"; power-domains = <&k3_pds 394 TI_SCI_PD_EXCLUSIVE>; @@ -492,7 +484,6 @@ compatible = "ti,j721e-uart", "ti,am654-uart"; reg = <0x00 0x02880000 0x00 0x200>; interrupts = ; - current-speed = <115200>; clocks = <&k3_clks 395 0>; clock-names = "fclk"; power-domains = <&k3_pds 395 TI_SCI_PD_EXCLUSIVE>; @@ -503,7 +494,6 @@ compatible = "ti,j721e-uart", "ti,am654-uart"; reg = <0x00 0x02890000 0x00 0x200>; interrupts = ; - current-speed = <115200>; clocks = <&k3_clks 396 0>; clock-names = "fclk"; power-domains = <&k3_pds 396 TI_SCI_PD_EXCLUSIVE>; diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi index 77a8d99139ec..b47338e0f481 100644 --- a/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi @@ -304,7 +304,6 @@ compatible = "ti,j721e-uart", "ti,am654-uart"; reg = <0x00 0x42300000 0x00 0x200>; interrupts = ; - current-speed = <115200>; clocks = <&k3_clks 397 0>; clock-names = "fclk"; power-domains = <&k3_pds 397 TI_SCI_PD_EXCLUSIVE>; @@ -315,7 +314,6 @@ compatible = "ti,j721e-uart", "ti,am654-uart"; reg = <0x00 0x40a00000 0x00 0x200>; interrupts = ; - current-speed = <115200>; clocks = <&k3_clks 149 0>; clock-names = "fclk"; power-domains = <&k3_pds 149 TI_SCI_PD_EXCLUSIVE>; -- cgit v1.2.3 From 3358aedf89944dbbded7609a363ae28bbc0a03eb Mon Sep 17 00:00:00 2001 From: Francesco Dolcini Date: Wed, 27 Mar 2024 19:28:00 +0100 Subject: arm64: dts: ti: verdin-am62: mallow: fix GPIOs pinctrl Generic GPIOs pinctrl nodes are not correct, gpio[1-4] are into the MCU domain and should be into &mcu_gpio0, gpio[5-8] were missing and are added in this commit. Fixes: 7698622fbcf4 ("arm64: dts: ti: Add verdin am62 mallow board") Signed-off-by: Francesco Dolcini Link: https://lore.kernel.org/r/20240327182801.5997-2-francesco@dolcini.it Signed-off-by: Nishanth Menon --- arch/arm64/boot/dts/ti/k3-am62-verdin-mallow.dtsi | 16 ++++++++++++---- 1 file changed, 12 insertions(+), 4 deletions(-) (limited to 'arch/arm64/boot/dts') diff --git a/arch/arm64/boot/dts/ti/k3-am62-verdin-mallow.dtsi b/arch/arm64/boot/dts/ti/k3-am62-verdin-mallow.dtsi index 77b1beb638ad..cd81a606c435 100644 --- a/arch/arm64/boot/dts/ti/k3-am62-verdin-mallow.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62-verdin-mallow.dtsi @@ -81,10 +81,10 @@ &main_gpio0 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ctrl_sleep_moci>, - <&pinctrl_gpio_1>, - <&pinctrl_gpio_2>, - <&pinctrl_gpio_3>, - <&pinctrl_gpio_4>; + <&pinctrl_gpio_5>, + <&pinctrl_gpio_6>, + <&pinctrl_gpio_7>, + <&pinctrl_gpio_8>; }; /* Verdin I2C_1 */ @@ -149,6 +149,14 @@ status = "okay"; }; +&mcu_gpio0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio_1>, + <&pinctrl_gpio_2>, + <&pinctrl_gpio_3>, + <&pinctrl_gpio_4>; +}; + /* Verdin I2C_3_HDMI */ &mcu_i2c0 { status = "okay"; -- cgit v1.2.3 From 69ef7d9c2905f11475fa2724e3621c95638ce55b Mon Sep 17 00:00:00 2001 From: Francesco Dolcini Date: Wed, 27 Mar 2024 19:28:01 +0100 Subject: arm64: dts: ti: k3-am625-verdin: add PCIe reset gpio hog Add a GPIO hog to release PCIe reset on the carrier board, this is required to use M.2 or mPCIe cards. Verdin AM62 does not have any PCIe interface, however the Verdin family has PCIe and normally an M.2 or mPCIe slot is available in the carrier board that can be used with cards that use only the USB interface toward the host CPU, for example cellular network modem. Signed-off-by: Francesco Dolcini Link: https://lore.kernel.org/r/20240327182801.5997-3-francesco@dolcini.it Signed-off-by: Nishanth Menon --- arch/arm64/boot/dts/ti/k3-am62-verdin-dahlia.dtsi | 8 +++++++- arch/arm64/boot/dts/ti/k3-am62-verdin-dev.dtsi | 8 +++++++- arch/arm64/boot/dts/ti/k3-am62-verdin-mallow.dtsi | 8 +++++++- arch/arm64/boot/dts/ti/k3-am62-verdin-yavia.dtsi | 8 +++++++- arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi | 9 +++++++++ 5 files changed, 37 insertions(+), 4 deletions(-) (limited to 'arch/arm64/boot/dts') diff --git a/arch/arm64/boot/dts/ti/k3-am62-verdin-dahlia.dtsi b/arch/arm64/boot/dts/ti/k3-am62-verdin-dahlia.dtsi index e42085aa118f..9202181fbd65 100644 --- a/arch/arm64/boot/dts/ti/k3-am62-verdin-dahlia.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62-verdin-dahlia.dtsi @@ -160,7 +160,8 @@ pinctrl-0 = <&pinctrl_gpio_1>, <&pinctrl_gpio_2>, <&pinctrl_gpio_3>, - <&pinctrl_gpio_4>; + <&pinctrl_gpio_4>, + <&pinctrl_pcie_1_reset>; }; /* Verdin I2C_3_HDMI */ @@ -211,6 +212,11 @@ status = "okay"; }; +/* Verdin PCIE_1_RESET# */ +&verdin_pcie_1_reset_hog { + status = "okay"; +}; + /* Verdin UART_2 */ &wkup_uart0 { status = "okay"; diff --git a/arch/arm64/boot/dts/ti/k3-am62-verdin-dev.dtsi b/arch/arm64/boot/dts/ti/k3-am62-verdin-dev.dtsi index be62648e7818..74eec1a1abca 100644 --- a/arch/arm64/boot/dts/ti/k3-am62-verdin-dev.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62-verdin-dev.dtsi @@ -181,7 +181,8 @@ pinctrl-0 = <&pinctrl_gpio_1>, <&pinctrl_gpio_2>, <&pinctrl_gpio_3>, - <&pinctrl_gpio_4>; + <&pinctrl_gpio_4>, + <&pinctrl_pcie_1_reset>; }; /* Verdin I2C_3_HDMI */ @@ -232,6 +233,11 @@ status = "okay"; }; +/* Verdin PCIE_1_RESET# */ +&verdin_pcie_1_reset_hog { + status = "okay"; +}; + /* Verdin UART_2 */ &wkup_uart0 { status = "okay"; diff --git a/arch/arm64/boot/dts/ti/k3-am62-verdin-mallow.dtsi b/arch/arm64/boot/dts/ti/k3-am62-verdin-mallow.dtsi index cd81a606c435..754216d8ac14 100644 --- a/arch/arm64/boot/dts/ti/k3-am62-verdin-mallow.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62-verdin-mallow.dtsi @@ -154,7 +154,8 @@ pinctrl-0 = <&pinctrl_gpio_1>, <&pinctrl_gpio_2>, <&pinctrl_gpio_3>, - <&pinctrl_gpio_4>; + <&pinctrl_gpio_4>, + <&pinctrl_pcie_1_reset>; }; /* Verdin I2C_3_HDMI */ @@ -200,6 +201,11 @@ status = "okay"; }; +/* Verdin PCIE_1_RESET# */ +&verdin_pcie_1_reset_hog { + status = "okay"; +}; + /* Verdin UART_2 */ &wkup_uart0 { status = "okay"; diff --git a/arch/arm64/boot/dts/ti/k3-am62-verdin-yavia.dtsi b/arch/arm64/boot/dts/ti/k3-am62-verdin-yavia.dtsi index 997dfafd27eb..7372d392ec8a 100644 --- a/arch/arm64/boot/dts/ti/k3-am62-verdin-yavia.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62-verdin-yavia.dtsi @@ -159,7 +159,8 @@ pinctrl-0 = <&pinctrl_gpio_1>, <&pinctrl_gpio_2>, <&pinctrl_gpio_3>, - <&pinctrl_gpio_4>; + <&pinctrl_gpio_4>, + <&pinctrl_pcie_1_reset>; }; /* Verdin I2C_3_HDMI */ @@ -205,6 +206,11 @@ status = "okay"; }; +/* Verdin PCIE_1_RESET# */ +&verdin_pcie_1_reset_hog { + status = "okay"; +}; + /* Verdin UART_2 */ &wkup_uart0 { status = "okay"; diff --git a/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi b/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi index c5091fa0c240..ff7cab0ff76c 100644 --- a/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi @@ -1413,6 +1413,15 @@ "", "", ""; + + verdin_pcie_1_reset_hog: pcie-1-reset-hog { + gpio-hog; + /* Verdin PCIE_1_RESET# (SODIMM 244) */ + gpios = <0 GPIO_ACTIVE_LOW>; + line-name = "PCIE_1_RESET#"; + output-low; + status = "disabled"; + }; }; /* Verdin CAN_2 */ -- cgit v1.2.3 From 41f6bb20fa4a0415dda75be55d8ec2a0ba7d161e Mon Sep 17 00:00:00 2001 From: Nathan Morrisson Date: Tue, 2 Apr 2024 09:08:24 -0700 Subject: arm64: dts: ti: k3-am625-phyboard-lyra-rdk: Increase CAN max bitrate The phyBOARD-Lyra has one TCAN1044VDD CAN transceiver which supports CAN FD at 8 Mbps. Increase the maximum bitrate to 8 Mbps. Signed-off-by: Nathan Morrisson Reviewed-by: Wadim Egorov Link: https://lore.kernel.org/r/20240402160825.1516036-2-nmorrisson@phytec.com Signed-off-by: Nishanth Menon --- arch/arm64/boot/dts/ti/k3-am625-phyboard-lyra-rdk.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm64/boot/dts') diff --git a/arch/arm64/boot/dts/ti/k3-am625-phyboard-lyra-rdk.dts b/arch/arm64/boot/dts/ti/k3-am625-phyboard-lyra-rdk.dts index a83a90497857..e225d76d02c8 100644 --- a/arch/arm64/boot/dts/ti/k3-am625-phyboard-lyra-rdk.dts +++ b/arch/arm64/boot/dts/ti/k3-am625-phyboard-lyra-rdk.dts @@ -31,7 +31,7 @@ can_tc1: can-phy0 { compatible = "ti,tcan1042"; #phy-cells = <0>; - max-bitrate = <5000000>; + max-bitrate = <8000000>; standby-gpios = <&gpio_exp 1 GPIO_ACTIVE_HIGH>; }; -- cgit v1.2.3 From 853d39f96c8828ae03d654decc9f162233c0daa8 Mon Sep 17 00:00:00 2001 From: Nathan Morrisson Date: Tue, 2 Apr 2024 09:08:25 -0700 Subject: arm64: dts: ti: k3-am642-phyboard-electra-rdk: Increase CAN max bitrate The phyBOARD-Electra has two TCAN1044VDD CAN transceivers which support CAN FD at 8 Mbps. Increase the maximum bitrate to 8 Mbps. Signed-off-by: Nathan Morrisson Reviewed-by: Wadim Egorov Link: https://lore.kernel.org/r/20240402160825.1516036-3-nmorrisson@phytec.com Signed-off-by: Nishanth Menon --- arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-rdk.dts | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/arm64/boot/dts') diff --git a/arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-rdk.dts b/arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-rdk.dts index dc774f9c7541..6df331ccb970 100644 --- a/arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-rdk.dts +++ b/arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-rdk.dts @@ -42,7 +42,7 @@ pinctrl-names = "default"; pinctrl-0 = <&can_tc1_pins_default>; #phy-cells = <0>; - max-bitrate = <5000000>; + max-bitrate = <8000000>; standby-gpios = <&main_gpio0 32 GPIO_ACTIVE_HIGH>; }; @@ -51,7 +51,7 @@ pinctrl-names = "default"; pinctrl-0 = <&can_tc2_pins_default>; #phy-cells = <0>; - max-bitrate = <5000000>; + max-bitrate = <8000000>; standby-gpios = <&main_gpio0 35 GPIO_ACTIVE_HIGH>; }; -- cgit v1.2.3 From ff369c9eb61182aeb66aa9e83c994d025e5ddc31 Mon Sep 17 00:00:00 2001 From: Michael Walle Date: Wed, 3 Apr 2024 12:15:45 +0200 Subject: arm64: dts: ti: k3-{am62p,j722s}: Disable ethernet by default Device tree best practice is to disable any external interface in the dtsi and just enable them if needed in the device tree. Thus, disable the ethernet switch and its ports by default and just enable the ones used by the EVMs in their device trees. There is no functional change. Signed-off-by: Michael Walle Acked-by: Andrew Davis Link: https://lore.kernel.org/r/20240403101545.3932437-1-mwalle@kernel.org Signed-off-by: Nishanth Menon --- arch/arm64/boot/dts/ti/k3-am62p-main.dtsi | 3 +++ arch/arm64/boot/dts/ti/k3-am62p5-sk.dts | 3 +++ arch/arm64/boot/dts/ti/k3-j722s-evm.dts | 5 +---- 3 files changed, 7 insertions(+), 4 deletions(-) (limited to 'arch/arm64/boot/dts') diff --git a/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi index 7337a9e13535..88bc64111234 100644 --- a/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi @@ -673,6 +673,7 @@ assigned-clock-parents = <&k3_clks 13 11>; clock-names = "fck"; power-domains = <&k3_pds 13 TI_SCI_PD_EXCLUSIVE>; + status = "disabled"; dmas = <&main_pktdma 0xc600 15>, <&main_pktdma 0xc601 15>, @@ -696,6 +697,7 @@ label = "port1"; phys = <&phy_gmii_sel 1>; mac-address = [00 00 00 00 00 00]; + status = "disabled"; }; cpsw_port2: port@2 { @@ -704,6 +706,7 @@ label = "port2"; phys = <&phy_gmii_sel 2>; mac-address = [00 00 00 00 00 00]; + status = "disabled"; }; }; diff --git a/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts b/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts index 6694087b3665..6a9c99c5fb2a 100644 --- a/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts @@ -431,16 +431,19 @@ pinctrl-names = "default"; pinctrl-0 = <&main_rgmii1_pins_default>, <&main_rgmii2_pins_default>; + status = "okay"; }; &cpsw_port1 { phy-mode = "rgmii-rxid"; phy-handle = <&cpsw3g_phy0>; + status = "okay"; }; &cpsw_port2 { phy-mode = "rgmii-rxid"; phy-handle = <&cpsw3g_phy1>; + status = "okay"; }; &cpsw3g_mdio { diff --git a/arch/arm64/boot/dts/ti/k3-j722s-evm.dts b/arch/arm64/boot/dts/ti/k3-j722s-evm.dts index cee3a8661d5e..4b36db949a52 100644 --- a/arch/arm64/boot/dts/ti/k3-j722s-evm.dts +++ b/arch/arm64/boot/dts/ti/k3-j722s-evm.dts @@ -226,10 +226,7 @@ &cpsw_port1 { phy-mode = "rgmii-rxid"; phy-handle = <&cpsw3g_phy0>; -}; - -&cpsw_port2 { - status = "disabled"; + status = "okay"; }; &main_gpio1 { -- cgit v1.2.3 From 3cf109df43b3c8c743c20c532c448888964fe4d1 Mon Sep 17 00:00:00 2001 From: Michael Walle Date: Wed, 3 Apr 2024 12:23:02 +0200 Subject: arm64: dts: ti: k3-j722s-evm: Enable eMMC support The J722S EVM has an on-board eMMC. Enable the SDHC interface for it. There is no pinmuxing required because the interface has dedicated pins. Signed-off-by: Michael Walle Link: https://lore.kernel.org/r/20240403102302.3934932-1-mwalle@kernel.org Signed-off-by: Nishanth Menon --- arch/arm64/boot/dts/ti/k3-j722s-evm.dts | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'arch/arm64/boot/dts') diff --git a/arch/arm64/boot/dts/ti/k3-j722s-evm.dts b/arch/arm64/boot/dts/ti/k3-j722s-evm.dts index 4b36db949a52..78032caeb5fc 100644 --- a/arch/arm64/boot/dts/ti/k3-j722s-evm.dts +++ b/arch/arm64/boot/dts/ti/k3-j722s-evm.dts @@ -366,6 +366,13 @@ }; +&sdhci0 { + disable-wp; + bootph-all; + ti,driver-strength-ohm = <50>; + status = "okay"; +}; + &sdhci1 { /* SD/MMC */ vmmc-supply = <&vdd_mmc1>; -- cgit v1.2.3 From 956dbce43d14c380545c5b70394ccffa2bd036c2 Mon Sep 17 00:00:00 2001 From: Andrew Davis Date: Tue, 26 Mar 2024 13:56:26 -0500 Subject: arm64: dts: ti: k3-am65: Add full compatible to SerDes control nodes This matches the binding for this register region which fixes a couple DTS check warnings. While here trim the leading 0s from the "reg" definition. Signed-off-by: Andrew Davis Link: https://lore.kernel.org/r/20240326185627.29852-1-afd@ti.com Signed-off-by: Nishanth Menon --- arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'arch/arm64/boot/dts') diff --git a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi index 670557c89f75..5bc3ec080474 100644 --- a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi @@ -482,13 +482,13 @@ ranges = <0x0 0x0 0x00100000 0x1c000>; serdes0_clk: clock@4080 { - compatible = "syscon"; - reg = <0x00004080 0x4>; + compatible = "ti,am654-serdes-ctrl", "syscon"; + reg = <0x4080 0x4>; }; serdes1_clk: clock@4090 { - compatible = "syscon"; - reg = <0x00004090 0x4>; + compatible = "ti,am654-serdes-ctrl", "syscon"; + reg = <0x4090 0x4>; }; serdes_mux: mux-controller { -- cgit v1.2.3 From da795dc4f2a058acceb4f4d47f8353015eb6ba6d Mon Sep 17 00:00:00 2001 From: Andrew Davis Date: Tue, 26 Mar 2024 13:56:27 -0500 Subject: arm64: dts: ti: k3-am65: Move SerDes mux nodes under the control node These SerDes lane select muxes use bits from the same register as the SerDes clock select mux. Make the lane select mux a child of the SerDes control node. This removes one more requirement on scm-conf being a syscon node which will later be converted to fix a couple DTS check warnings. Signed-off-by: Andrew Davis Link: https://lore.kernel.org/r/20240326185627.29852-2-afd@ti.com Signed-off-by: Nishanth Menon --- arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 21 +++++++++++++-------- 1 file changed, 13 insertions(+), 8 deletions(-) (limited to 'arch/arm64/boot/dts') diff --git a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi index 5bc3ec080474..de5b1b20a617 100644 --- a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi @@ -66,7 +66,7 @@ assigned-clock-parents = <&k3_clks 153 8>, <&k3_clks 153 4>; ti,serdes-clk = <&serdes0_clk>; #clock-cells = <1>; - mux-controls = <&serdes_mux 0>; + mux-controls = <&serdes0_mux 0>; }; serdes1: serdes@910000 { @@ -81,7 +81,7 @@ assigned-clock-parents = <&k3_clks 154 9>, <&k3_clks 154 5>; ti,serdes-clk = <&serdes1_clk>; #clock-cells = <1>; - mux-controls = <&serdes_mux 1>; + mux-controls = <&serdes1_mux 0>; }; main_uart0: serial@2800000 { @@ -484,18 +484,23 @@ serdes0_clk: clock@4080 { compatible = "ti,am654-serdes-ctrl", "syscon"; reg = <0x4080 0x4>; + + serdes0_mux: mux-controller { + compatible = "mmio-mux"; + #mux-control-cells = <1>; + mux-reg-masks = <0x0 0x3>; /* lane select */ + }; }; serdes1_clk: clock@4090 { compatible = "ti,am654-serdes-ctrl", "syscon"; reg = <0x4090 0x4>; - }; - serdes_mux: mux-controller { - compatible = "mmio-mux"; - #mux-control-cells = <1>; - mux-reg-masks = <0x4080 0x3>, /* SERDES0 lane select */ - <0x4090 0x3>; /* SERDES1 lane select */ + serdes1_mux: mux-controller { + compatible = "mmio-mux"; + #mux-control-cells = <1>; + mux-reg-masks = <0x0 0x3>; /* lane select */ + }; }; dss_oldi_io_ctrl: dss-oldi-io-ctrl@41e0 { -- cgit v1.2.3 From 8ec19dbe9217edbb564b16a5f68465b8cd42a167 Mon Sep 17 00:00:00 2001 From: Andrew Davis Date: Tue, 26 Mar 2024 15:59:17 -0500 Subject: arm64: dts: ti: k3-am65: Use exact ranges for FSS node The FSS bus contains several register ranges. Using an empty ranges property works but causes a DT warning when we give this node an address. Fix this by explicitly defining the memory ranges in use. Signed-off-by: Andrew Davis Link: https://lore.kernel.org/r/20240326205920.40147-1-afd@ti.com Signed-off-by: Nishanth Menon --- arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) (limited to 'arch/arm64/boot/dts') diff --git a/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi b/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi index 4f808e508975..8feab9317644 100644 --- a/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi @@ -285,7 +285,11 @@ compatible = "simple-bus"; #address-cells = <2>; #size-cells = <2>; - ranges; + ranges = <0x0 0x47000000 0x0 0x47000000 0x0 0x100>, /* FSS Control */ + <0x0 0x47040000 0x0 0x47040000 0x0 0x100>, /* OSPI0 Control */ + <0x0 0x47050000 0x0 0x47050000 0x0 0x100>, /* OSPI1 Control */ + <0x5 0x00000000 0x5 0x00000000 0x1 0x0000000>, /* OSPI0 Memory */ + <0x7 0x00000000 0x7 0x00000000 0x1 0x0000000>; /* OSPI1 Memory */ ospi0: spi@47040000 { compatible = "ti,am654-ospi", "cdns,qspi-nor"; -- cgit v1.2.3 From 98b939a9b3204120bd3a96015d74cbe818a3a2e9 Mon Sep 17 00:00:00 2001 From: Andrew Davis Date: Tue, 26 Mar 2024 15:59:18 -0500 Subject: arm64: dts: ti: k3-j7200: Use exact ranges for FSS node The FSS bus contains several register ranges. Using an empty ranges property works but causes a DT warning when we give this node an address. Fix this by explicitly defining the memory ranges in use. Signed-off-by: Andrew Davis Link: https://lore.kernel.org/r/20240326205920.40147-2-afd@ti.com Signed-off-by: Nishanth Menon --- arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) (limited to 'arch/arm64/boot/dts') diff --git a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi index c547bc8fb608..fccaabfb1348 100644 --- a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi @@ -518,10 +518,12 @@ fss: bus@47000000 { compatible = "simple-bus"; - reg = <0x00 0x47000000 0x00 0x100>; #address-cells = <2>; #size-cells = <2>; - ranges; + ranges = <0x0 0x47000000 0x0 0x47000000 0x0 0x100>, /* FSS Control */ + <0x0 0x47034000 0x0 0x47040000 0x0 0x100>, /* HBMC Control */ + <0x0 0x47040000 0x0 0x47040000 0x0 0x100>, /* OSPI0 Control */ + <0x5 0x00000000 0x5 0x00000000 0x1 0x0000000>; /* HBMC/OSPI0 Memory */ hbmc_mux: mux-controller@47000004 { compatible = "reg-mux"; -- cgit v1.2.3 From 74904fc1f1f1c802eaed10edc3744f0997c154ff Mon Sep 17 00:00:00 2001 From: Andrew Davis Date: Tue, 26 Mar 2024 15:59:19 -0500 Subject: arm64: dts: ti: k3-j721e: Use exact ranges for FSS node The FSS bus contains several register ranges. Using an empty ranges property works but causes a DT warning when we give this node an address. Fix this by explicitly defining the memory ranges in use. Signed-off-by: Andrew Davis Link: https://lore.kernel.org/r/20240326205920.40147-3-afd@ti.com Signed-off-by: Nishanth Menon --- arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) (limited to 'arch/arm64/boot/dts') diff --git a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi index 8fc768d84b75..9349ae07c046 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi @@ -344,10 +344,14 @@ fss: bus@47000000 { compatible = "simple-bus"; - reg = <0x0 0x47000000 0x0 0x100>; #address-cells = <2>; #size-cells = <2>; - ranges; + ranges = <0x0 0x47000000 0x0 0x47000000 0x0 0x100>, /* FSS Control */ + <0x0 0x47034000 0x0 0x47034000 0x0 0x100>, /* HBMC Control */ + <0x0 0x47040000 0x0 0x47040000 0x0 0x100>, /* OSPI0 Control */ + <0x0 0x47050000 0x0 0x47050000 0x0 0x100>, /* OSPI1 Control */ + <0x5 0x00000000 0x5 0x00000000 0x1 0x0000000>, /* HBMC/OSPI0 Memory */ + <0x7 0x00000000 0x7 0x00000000 0x1 0x0000000>; /* OSPI1 Memory */ hbmc_mux: mux-controller@47000004 { compatible = "reg-mux"; -- cgit v1.2.3 From b3f629482cade3a6ada44d2e83dd65f0f1ed1293 Mon Sep 17 00:00:00 2001 From: Andrew Davis Date: Tue, 26 Mar 2024 15:59:20 -0500 Subject: arm64: dts: ti: k3-j784s4: Use exact ranges for FSS node The FSS bus contains several register ranges. Using an empty ranges property works but causes a DT warning when we give this node an address. Fix this by explicitly defining the memory ranges in use. Signed-off-by: Andrew Davis Link: https://lore.kernel.org/r/20240326205920.40147-4-afd@ti.com Signed-off-by: Nishanth Menon --- arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) (limited to 'arch/arm64/boot/dts') diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi index b47338e0f481..2e18d91ae92f 100644 --- a/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi @@ -672,10 +672,13 @@ fss: bus@47000000 { compatible = "simple-bus"; - reg = <0x00 0x47000000 0x00 0x100>; #address-cells = <2>; #size-cells = <2>; - ranges; + ranges = <0x0 0x47000000 0x0 0x47000000 0x0 0x100>, /* FSS Control */ + <0x0 0x47040000 0x0 0x47040000 0x0 0x100>, /* OSPI0 Control */ + <0x0 0x47050000 0x0 0x47050000 0x0 0x100>, /* OSPI1 Control */ + <0x5 0x00000000 0x5 0x00000000 0x1 0x0000000>, /* OSPI0 Memory */ + <0x7 0x00000000 0x7 0x00000000 0x1 0x0000000>; /* OSPI1 Memory */ ospi0: spi@47040000 { compatible = "ti,am654-ospi", "cdns,qspi-nor"; -- cgit v1.2.3 From 28c0cf16b3083566cd96b60d3cedbe69b79a8e5b Mon Sep 17 00:00:00 2001 From: Garrett Giordano Date: Thu, 4 Apr 2024 11:42:50 -0700 Subject: arm64: dts: ti: k3-am625-phyboard-lyra-rdk: Add Audio Codec The Audio Codec runs over the MCASP (Multichannel Audio Serial Port). Add pinmux for the Audio Reference Clock and MCASP2. Add DT nodes for Audio Codec, MCASP2, VCC 1v8 and VCC 3v3 regulators. Additionally, create a sound node that connects our sound card and the MCASP2. Signed-off-by: Garrett Giordano Reviewed-by: Wadim Egorov Link: https://lore.kernel.org/r/20240404184250.3772829-1-ggiordano@phytec.com Signed-off-by: Nishanth Menon --- .../boot/dts/ti/k3-am625-phyboard-lyra-rdk.dts | 99 ++++++++++++++++++++++ 1 file changed, 99 insertions(+) (limited to 'arch/arm64/boot/dts') diff --git a/arch/arm64/boot/dts/ti/k3-am625-phyboard-lyra-rdk.dts b/arch/arm64/boot/dts/ti/k3-am625-phyboard-lyra-rdk.dts index e225d76d02c8..d7b8aa607c8c 100644 --- a/arch/arm64/boot/dts/ti/k3-am625-phyboard-lyra-rdk.dts +++ b/arch/arm64/boot/dts/ti/k3-am625-phyboard-lyra-rdk.dts @@ -66,6 +66,35 @@ }; }; + sound { + compatible = "simple-audio-card"; + simple-audio-card,name = "phyBOARD-Lyra"; + simple-audio-card,widgets = + "Microphone", "Mic Jack", + "Headphone", "Headphone Jack", + "Speaker", "External Speaker"; + simple-audio-card,routing = + "MIC3R", "Mic Jack", + "Mic Jack", "Mic Bias", + "Headphone Jack", "HPLOUT", + "Headphone Jack", "HPROUT", + "External Speaker", "SPOP", + "External Speaker", "SPOM"; + simple-audio-card,format = "dsp_b"; + simple-audio-card,bitclock-master = <&sound_master>; + simple-audio-card,frame-master = <&sound_master>; + simple-audio-card,bitclock-inversion; + + simple-audio-card,cpu { + sound-dai = <&mcasp2>; + }; + + sound_master: simple-audio-card,codec { + sound-dai = <&audio_codec>; + clocks = <&audio_refclk1>; + }; + }; + leds { compatible = "gpio-leds"; pinctrl-names = "default"; @@ -82,6 +111,15 @@ }; }; + vcc_1v8: regulator-vcc-1v8 { + compatible = "regulator-fixed"; + regulator-name = "VCC_1V8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + }; + vcc_3v3_mmc: regulator-vcc-3v3-mmc { compatible = "regulator-fixed"; regulator-name = "VCC_3V3_MMC"; @@ -90,9 +128,24 @@ regulator-always-on; regulator-boot-on; }; + + vcc_3v3_sw: regulator-vcc-3v3-sw { + compatible = "regulator-fixed"; + regulator-name = "VCC_3V3_SW"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + regulator-boot-on; + }; }; &main_pmx0 { + audio_ext_refclk1_pins_default: audio-ext-refclk1-default-pins { + pinctrl-single,pins = < + AM62X_IOPAD(0x0a0, PIN_OUTPUT, 1) /* (K25) GPMC0_WPn.AUDIO_EXT_REFCLK1 */ + >; + }; + gpio_keys_pins_default: gpio-keys-default-pins { pinctrl-single,pins = < AM62X_IOPAD(0x1d4, PIN_INPUT, 7) /* (B15) UART0_RTSn.GPIO1_23 */ @@ -150,6 +203,15 @@ >; }; + main_mcasp2_pins_default: main-mcasp2-default-pins { + pinctrl-single,pins = < + AM62X_IOPAD(0x070, PIN_INPUT, 3) /* (T24) GPMC0_AD13.MCASP2_ACLKX */ + AM62X_IOPAD(0x06c, PIN_INPUT, 3) /* (T22) GPMC0_AD12.MCASP2_AFSX */ + AM62X_IOPAD(0x064, PIN_OUTPUT, 3) /* (T25) GPMC0_AD10.MCASP2_AXR2 */ + AM62X_IOPAD(0x068, PIN_INPUT, 3) /* (R21) GPMC0_AD11.MCASP2_AXR3 */ + >; + }; + main_mmc1_pins_default: main-mmc1-default-pins { pinctrl-single,pins = < AM62X_IOPAD(0x23c, PIN_INPUT_PULLUP, 0) /* (A21) MMC1_CMD */ @@ -254,6 +316,21 @@ clock-frequency = <100000>; status = "okay"; + audio_codec: audio-codec@18 { + pinctrl-names = "default"; + pinctrl-0 = <&audio_ext_refclk1_pins_default>; + + #sound-dai-cells = <0>; + compatible = "ti,tlv320aic3007"; + reg = <0x18>; + ai3x-micbias-vg = <2>; + + AVDD-supply = <&vcc_3v3_sw>; + IOVDD-supply = <&vcc_3v3_sw>; + DRVDD-supply = <&vcc_3v3_sw>; + DVDD-supply = <&vcc_1v8>; + }; + gpio_exp: gpio-expander@21 { pinctrl-names = "default"; pinctrl-0 = <&gpio_exp_int_pins_default>; @@ -329,6 +406,28 @@ status = "okay"; }; +&mcasp2 { + #sound-dai-cells = <0>; + + pinctrl-names = "default"; + pinctrl-0 = <&main_mcasp2_pins_default>; + + /* MCASP_IIS_MODE */ + op-mode = <0>; + tdm-slots = <2>; + + /* 0: INACTIVE, 1: TX, 2: RX */ + serial-dir = < + 0 0 1 2 + 0 0 0 0 + 0 0 0 0 + 0 0 0 0 + >; + tx-num-evt = <32>; + rx-num-evt = <32>; + status = "okay"; +}; + &sdhci1 { vmmc-supply = <&vcc_3v3_mmc>; vqmmc-supply = <&vddshv5_sdio>; -- cgit v1.2.3 From cc91d709f030b931a71e7571b2d9f9850be57a1d Mon Sep 17 00:00:00 2001 From: Jan Kiszka Date: Tue, 9 Apr 2024 17:43:14 +0100 Subject: arm64: dts: ti: iot2050: Add icssg-prueth nodes for PG1 devices Add the required nodes to enable ICSSG SR1.0 based prueth networking. Signed-off-by: Jan Kiszka Signed-off-by: Diogo Ivo Link: https://lore.kernel.org/r/20240409164314.157602-1-diogo.ivo@siemens.com Signed-off-by: Nishanth Menon --- .../boot/dts/ti/k3-am65-iot2050-common-pg1.dtsi | 32 +++++++++++++++++++--- 1 file changed, 28 insertions(+), 4 deletions(-) (limited to 'arch/arm64/boot/dts') diff --git a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common-pg1.dtsi b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common-pg1.dtsi index c50a585dd638..ef7897763ef8 100644 --- a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common-pg1.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common-pg1.dtsi @@ -43,9 +43,33 @@ }; &icssg0_eth { - status = "disabled"; -}; + compatible = "ti,am654-sr1-icssg-prueth"; -&icssg0_mdio { - status = "disabled"; + ti,prus = <&pru0_0>, <&rtu0_0>, <&pru0_1>, <&rtu0_1>; + firmware-name = "ti-pruss/am65x-pru0-prueth-fw.elf", + "ti-pruss/am65x-rtu0-prueth-fw.elf", + "ti-pruss/am65x-pru1-prueth-fw.elf", + "ti-pruss/am65x-rtu1-prueth-fw.elf"; + + ti,pruss-gp-mux-sel = <2>, /* MII mode */ + <2>, + <2>, /* MII mode */ + <2>; + + dmas = <&main_udmap 0xc100>, /* egress slice 0 */ + <&main_udmap 0xc101>, /* egress slice 0 */ + <&main_udmap 0xc102>, /* egress slice 0 */ + <&main_udmap 0xc103>, /* egress slice 0 */ + <&main_udmap 0xc104>, /* egress slice 1 */ + <&main_udmap 0xc105>, /* egress slice 1 */ + <&main_udmap 0xc106>, /* egress slice 1 */ + <&main_udmap 0xc107>, /* egress slice 1 */ + <&main_udmap 0x4100>, /* ingress slice 0 */ + <&main_udmap 0x4101>, /* ingress slice 1 */ + <&main_udmap 0x4102>, /* mgmnt rsp slice 0 */ + <&main_udmap 0x4103>; /* mgmnt rsp slice 1 */ + dma-names = "tx0-0", "tx0-1", "tx0-2", "tx0-3", + "tx1-0", "tx1-1", "tx1-2", "tx1-3", + "rx0", "rx1", + "rxmgm0", "rxmgm1"; }; -- cgit v1.2.3 From 556e0504b05994a0c4265202f4d43e9b034a772d Mon Sep 17 00:00:00 2001 From: Roger Quadros Date: Fri, 12 Apr 2024 14:52:14 +0300 Subject: arm64: dts: ti: k3-am62*: Add PHY2 region to USB wrapper node Add PHY2 register space to USB wrapper node. This is required to deal with Errata i2409. Signed-off-by: Roger Quadros Reviewed-by: Francesco Dolcini Link: https://lore.kernel.org/r/20240412-for-v6-9-am62-usb-errata-dt-v1-1-ef0d79920f75@kernel.org Closes: https://lore.kernel.org/all/20240408095200.GA14655@francesco-nb/ Signed-off-by: Nishanth Menon --- arch/arm64/boot/dts/ti/k3-am62-main.dtsi | 6 ++++-- arch/arm64/boot/dts/ti/k3-am62a-main.dtsi | 6 ++++-- 2 files changed, 8 insertions(+), 4 deletions(-) (limited to 'arch/arm64/boot/dts') diff --git a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi index e9cffca073ef..e0ec28b14a07 100644 --- a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi @@ -619,7 +619,8 @@ usbss0: dwc3-usb@f900000 { compatible = "ti,am62-usb"; - reg = <0x00 0x0f900000 0x00 0x800>; + reg = <0x00 0x0f900000 0x00 0x800>, + <0x00 0x0f908000 0x00 0x400>; clocks = <&k3_clks 161 3>; clock-names = "ref"; ti,syscon-phy-pll-refclk = <&wkup_conf 0x4008>; @@ -644,7 +645,8 @@ usbss1: dwc3-usb@f910000 { compatible = "ti,am62-usb"; - reg = <0x00 0x0f910000 0x00 0x800>; + reg = <0x00 0x0f910000 0x00 0x800>, + <0x00 0x0f918000 0x00 0x400>; clocks = <&k3_clks 162 3>; clock-names = "ref"; ti,syscon-phy-pll-refclk = <&wkup_conf 0x4018>; diff --git a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi index aa1e057082f0..93494e30305b 100644 --- a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi @@ -603,7 +603,8 @@ usbss0: dwc3-usb@f900000 { compatible = "ti,am62-usb"; - reg = <0x00 0x0f900000 0x00 0x800>; + reg = <0x00 0x0f900000 0x00 0x800>, + <0x00 0x0f908000 0x00 0x400>; clocks = <&k3_clks 161 3>; clock-names = "ref"; ti,syscon-phy-pll-refclk = <&wkup_conf 0x4008>; @@ -626,7 +627,8 @@ usbss1: dwc3-usb@f910000 { compatible = "ti,am62-usb"; - reg = <0x00 0x0f910000 0x00 0x800>; + reg = <0x00 0x0f910000 0x00 0x800>, + <0x00 0x0f918000 0x00 0x400>; clocks = <&k3_clks 162 3>; clock-names = "ref"; ti,syscon-phy-pll-refclk = <&wkup_conf 0x4018>; -- cgit v1.2.3 From ef80ebe421afcd184552b7b81eb038a9bb7a3262 Mon Sep 17 00:00:00 2001 From: Roger Quadros Date: Fri, 12 Apr 2024 15:01:58 +0300 Subject: arm64: dts: ti: k3-am62/a: use sub-node for USB_PHY_CTRL registers Exposing the entire CTRL_MMR space to syscon is not a good idea. Add sub-nodes for USB0_PHY_CTRL and USB1_PHY_CTRL and use them in the USB0/USB1 nodes. Signed-off-by: Roger Quadros Reviewed-by: Andrew Davis Link: https://lore.kernel.org/r/20240412-for-v6-10-am62-usb-typec-dt-v7-1-93b827adf97e@kernel.org Signed-off-by: Nishanth Menon --- arch/arm64/boot/dts/ti/k3-am62-main.dtsi | 4 ++-- arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi | 10 ++++++++++ arch/arm64/boot/dts/ti/k3-am62a-main.dtsi | 4 ++-- arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi | 10 ++++++++++ 4 files changed, 24 insertions(+), 4 deletions(-) (limited to 'arch/arm64/boot/dts') diff --git a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi index e0ec28b14a07..448a59dc53a7 100644 --- a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi @@ -623,7 +623,7 @@ <0x00 0x0f908000 0x00 0x400>; clocks = <&k3_clks 161 3>; clock-names = "ref"; - ti,syscon-phy-pll-refclk = <&wkup_conf 0x4008>; + ti,syscon-phy-pll-refclk = <&usb0_phy_ctrl 0x0>; #address-cells = <2>; #size-cells = <2>; power-domains = <&k3_pds 178 TI_SCI_PD_EXCLUSIVE>; @@ -649,7 +649,7 @@ <0x00 0x0f918000 0x00 0x400>; clocks = <&k3_clks 162 3>; clock-names = "ref"; - ti,syscon-phy-pll-refclk = <&wkup_conf 0x4018>; + ti,syscon-phy-pll-refclk = <&usb1_phy_ctrl 0x0>; #address-cells = <2>; #size-cells = <2>; power-domains = <&k3_pds 179 TI_SCI_PD_EXCLUSIVE>; diff --git a/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi index 23ce1bfda8d6..66ddf2dc51af 100644 --- a/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi @@ -21,6 +21,16 @@ compatible = "ti,am654-chipid"; reg = <0x14 0x4>; }; + + usb0_phy_ctrl: syscon@4008 { + compatible = "ti,am62-usb-phy-ctrl", "syscon"; + reg = <0x4008 0x4>; + }; + + usb1_phy_ctrl: syscon@4018 { + compatible = "ti,am62-usb-phy-ctrl", "syscon"; + reg = <0x4018 0x4>; + }; }; target-module@2b300050 { diff --git a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi index 93494e30305b..31fc59b02f21 100644 --- a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi @@ -607,7 +607,7 @@ <0x00 0x0f908000 0x00 0x400>; clocks = <&k3_clks 161 3>; clock-names = "ref"; - ti,syscon-phy-pll-refclk = <&wkup_conf 0x4008>; + ti,syscon-phy-pll-refclk = <&usb0_phy_ctrl 0x0>; #address-cells = <2>; #size-cells = <2>; power-domains = <&k3_pds 178 TI_SCI_PD_EXCLUSIVE>; @@ -631,7 +631,7 @@ <0x00 0x0f918000 0x00 0x400>; clocks = <&k3_clks 162 3>; clock-names = "ref"; - ti,syscon-phy-pll-refclk = <&wkup_conf 0x4018>; + ti,syscon-phy-pll-refclk = <&usb1_phy_ctrl 0x0>; #address-cells = <2>; #size-cells = <2>; power-domains = <&k3_pds 179 TI_SCI_PD_EXCLUSIVE>; diff --git a/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi index f7bec484705a..98043e9aa316 100644 --- a/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi @@ -17,6 +17,16 @@ compatible = "ti,am654-chipid"; reg = <0x14 0x4>; }; + + usb0_phy_ctrl: syscon@4008 { + compatible = "ti,am62-usb-phy-ctrl", "syscon"; + reg = <0x4008 0x4>; + }; + + usb1_phy_ctrl: syscon@4018 { + compatible = "ti,am62-usb-phy-ctrl", "syscon"; + reg = <0x4018 0x4>; + }; }; wkup_uart0: serial@2b300000 { -- cgit v1.2.3 From c1453d3c3e9baf538b5f978c9e7cc24e47cc877e Mon Sep 17 00:00:00 2001 From: Roger Quadros Date: Fri, 12 Apr 2024 15:01:59 +0300 Subject: arm64: dts: ti: k3-am62p: add the USB sub-system There are two USB instances available on the am62p5 starter kit. Include and enable them for use on the board. USB LPM feature is kept disabled as it is not supported. Signed-off-by: Vignesh Raghavendra Signed-off-by: Roger Quadros Reviewed-by: Andrew Davis Link: https://lore.kernel.org/r/20240412-for-v6-10-am62-usb-typec-dt-v7-2-93b827adf97e@kernel.org Signed-off-by: Nishanth Menon --- arch/arm64/boot/dts/ti/k3-am62p-main.dtsi | 52 ++++++++++++++++++++++ arch/arm64/boot/dts/ti/k3-am62p-wakeup.dtsi | 10 +++++ arch/arm64/boot/dts/ti/k3-am62p5-sk.dts | 67 +++++++++++++++++++++++++++++ 3 files changed, 129 insertions(+) (limited to 'arch/arm64/boot/dts') diff --git a/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi index 88bc64111234..900d1f9530a2 100644 --- a/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi @@ -635,6 +635,58 @@ status = "disabled"; }; + usbss0: usb@f900000 { + compatible = "ti,am62-usb"; + reg = <0x00 0x0f900000 0x00 0x800>, + <0x00 0x0f908000 0x00 0x400>; + clocks = <&k3_clks 161 3>; + clock-names = "ref"; + ti,syscon-phy-pll-refclk = <&usb0_phy_ctrl 0x0>; + #address-cells = <2>; + #size-cells = <2>; + power-domains = <&k3_pds 178 TI_SCI_PD_EXCLUSIVE>; + ranges; + status = "disabled"; + + usb0: usb@31000000 { + compatible = "snps,dwc3"; + reg = <0x00 0x31000000 0x00 0x50000>; + interrupts = , /* irq.0 */ + ; /* irq.0 */ + interrupt-names = "host", "peripheral"; + maximum-speed = "high-speed"; + dr_mode = "otg"; + snps,usb2-gadget-lpm-disable; + snps,usb2-lpm-disable; + }; + }; + + usbss1: usb@f910000 { + compatible = "ti,am62-usb"; + reg = <0x00 0x0f910000 0x00 0x800>, + <0x00 0x0f918000 0x00 0x400>; + clocks = <&k3_clks 162 3>; + clock-names = "ref"; + ti,syscon-phy-pll-refclk = <&usb1_phy_ctrl 0x0>; + #address-cells = <2>; + #size-cells = <2>; + power-domains = <&k3_pds 179 TI_SCI_PD_EXCLUSIVE>; + ranges; + status = "disabled"; + + usb1: usb@31100000 { + compatible = "snps,dwc3"; + reg = <0x00 0x31100000 0x00 0x50000>; + interrupts = , /* irq.0 */ + ; /* irq.0 */ + interrupt-names = "host", "peripheral"; + maximum-speed = "high-speed"; + dr_mode = "otg"; + snps,usb2-gadget-lpm-disable; + snps,usb2-lpm-disable; + }; + }; + fss: bus@fc00000 { compatible = "simple-bus"; reg = <0x00 0x0fc00000 0x00 0x70000>; diff --git a/arch/arm64/boot/dts/ti/k3-am62p-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-wakeup.dtsi index a84756c336d0..c71d9624ea27 100644 --- a/arch/arm64/boot/dts/ti/k3-am62p-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62p-wakeup.dtsi @@ -18,6 +18,16 @@ reg = <0x14 0x4>; bootph-all; }; + + usb0_phy_ctrl: syscon@4008 { + compatible = "ti,am62-usb-phy-ctrl", "syscon"; + reg = <0x4008 0x4>; + }; + + usb1_phy_ctrl: syscon@4018 { + compatible = "ti,am62-usb-phy-ctrl", "syscon"; + reg = <0x4018 0x4>; + }; }; wkup_uart0: serial@2b300000 { diff --git a/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts b/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts index 6a9c99c5fb2a..6e7234659111 100644 --- a/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts @@ -27,6 +27,8 @@ spi0 = &ospi0; ethernet0 = &cpsw_port1; ethernet1 = &cpsw_port2; + usb0 = &usb0; + usb1 = &usb1; }; chosen { @@ -297,6 +299,12 @@ bootph-all; }; + main_usb1_pins_default: main-usb1-default-pins { + pinctrl-single,pins = < + AM62PX_IOPAD(0x0258, PIN_INPUT, 0) /* (G21) USB1_DRVVBUS */ + >; + }; + main_wlirq_pins_default: main-wlirq-default-pins { pinctrl-single,pins = < AM62PX_IOPAD(0x0128, PIN_INPUT, 7) /* (K25) MMC2_SDWP.GPIO0_72 */ @@ -340,6 +348,36 @@ }; }; +&main_i2c0 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&main_i2c0_pins_default>; + clock-frequency = <400000>; + + typec_pd0: usb-power-controller@3f { + compatible = "ti,tps6598x"; + reg = <0x3f>; + + connector { + compatible = "usb-c-connector"; + label = "USB-C"; + self-powered; + data-role = "dual"; + power-role = "sink"; + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + usb_con_hs: endpoint { + remote-endpoint = <&usb0_hs_ep>; + }; + }; + }; + }; + }; +}; + &main_i2c1 { status = "okay"; pinctrl-names = "default"; @@ -466,6 +504,35 @@ }; }; +&usbss0 { + status = "okay"; + ti,vbus-divider; +}; + +&usbss1 { + status = "okay"; + ti,vbus-divider; +}; + +&usb0 { + usb-role-switch; + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + usb0_hs_ep: endpoint { + remote-endpoint = <&usb_con_hs>; + }; + }; +}; + +&usb1 { + dr_mode = "host"; + pinctrl-names = "default"; + pinctrl-0 = <&main_usb1_pins_default>; +}; + &mcasp1 { status = "okay"; #sound-dai-cells = <0>; -- cgit v1.2.3 From 35fd7af5f7b394749ad1030f72df345ae880318b Mon Sep 17 00:00:00 2001 From: Roger Quadros Date: Fri, 12 Apr 2024 15:02:00 +0300 Subject: arm64: dts: ti: k3-am62a: Disable USB LPM As per AM62A TRM [1] USB Link Power Management (LPM) feature is not supported. Disable it else it may cause enumeration failure on some devices. > 4.9.2.1 USB2SS Unsupported Features > The following features are not supported on this family of devices: > ... > - USB 2.0 ECN: Link Power Management (LPM) > ... [1] - https://www.ti.com/lit/pdf/spruj16 Signed-off-by: Roger Quadros Reviewed-by: Ravi Gunasekaran Link: https://lore.kernel.org/r/20240412-for-v6-10-am62-usb-typec-dt-v7-3-93b827adf97e@kernel.org Signed-off-by: Nishanth Menon --- arch/arm64/boot/dts/ti/k3-am62a-main.dtsi | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'arch/arm64/boot/dts') diff --git a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi index 31fc59b02f21..3fd59283eafe 100644 --- a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi @@ -622,6 +622,8 @@ interrupt-names = "host", "peripheral"; maximum-speed = "high-speed"; dr_mode = "otg"; + snps,usb2-gadget-lpm-disable; + snps,usb2-lpm-disable; }; }; @@ -646,6 +648,8 @@ interrupt-names = "host", "peripheral"; maximum-speed = "high-speed"; dr_mode = "otg"; + snps,usb2-gadget-lpm-disable; + snps,usb2-lpm-disable; }; }; -- cgit v1.2.3 From 2870e137ac66f03091e57358174acbb7f0df4506 Mon Sep 17 00:00:00 2001 From: Udit Kumar Date: Mon, 15 Apr 2024 15:26:04 +0530 Subject: arm64: dts: ti: k3-j784s4-evm: Fix UART pin type and macro type Along fixing wkup UART TX pin as OUTPUT instead of INPUT, updating J784S4 macro for pin mux instead of J721S2. Fixes: 5dfbd1debc8c ("arm64: dts: ti: k3-j784s4-evm: Enable wakeup_i2c0 and eeprom") Fixes: 6fa5d37a2f34 ("arm64: dts: ti: k3-j784s4-evm: Add mcu and wakeup uarts") Signed-off-by: Udit Kumar Reviewed-by: Francesco Dolcini Link: https://lore.kernel.org/r/20240415095605.3547933-2-u-kumar1@ti.com Signed-off-by: Nishanth Menon --- arch/arm64/boot/dts/ti/k3-j784s4-evm.dts | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'arch/arm64/boot/dts') diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts b/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts index 81fd7afac8c5..d511b25d62e3 100644 --- a/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts +++ b/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts @@ -343,16 +343,16 @@ wkup_uart0_pins_default: wkup-uart0-default-pins { bootph-all; pinctrl-single,pins = < - J721S2_WKUP_IOPAD(0x048, PIN_INPUT, 0) /* (K35) WKUP_UART0_RXD */ - J721S2_WKUP_IOPAD(0x04c, PIN_INPUT, 0) /* (K34) WKUP_UART0_TXD */ + J784S4_WKUP_IOPAD(0x048, PIN_INPUT, 0) /* (K35) WKUP_UART0_RXD */ + J784S4_WKUP_IOPAD(0x04c, PIN_OUTPUT, 0) /* (K34) WKUP_UART0_TXD */ >; }; wkup_i2c0_pins_default: wkup-i2c0-default-pins { bootph-all; pinctrl-single,pins = < - J721S2_WKUP_IOPAD(0x98, PIN_INPUT, 0) /* (N33) WKUP_I2C0_SCL */ - J721S2_WKUP_IOPAD(0x9c, PIN_INPUT, 0) /* (N35) WKUP_I2C0_SDA */ + J784S4_WKUP_IOPAD(0x98, PIN_INPUT, 0) /* (N33) WKUP_I2C0_SCL */ + J784S4_WKUP_IOPAD(0x9c, PIN_INPUT, 0) /* (N35) WKUP_I2C0_SDA */ >; }; -- cgit v1.2.3 From de63748f0919cd3b04cad8556eddbb0c9dfc2c51 Mon Sep 17 00:00:00 2001 From: Udit Kumar Date: Mon, 15 Apr 2024 15:26:05 +0530 Subject: arm64: dts: ti: k3-am69-sk: Fix UART pin type and macro type Along fixing wkup UART RTS and TX pins as OUTPUT instead of INPUT updating J784S4 macro for pin mux instead of J721S2. Fixes: 45299dd1991b ("arm64: dts: ti: k3-am69-sk: Add mcu and wakeup uarts") Fixes: 08ae12b63750 ("arm64: dts: ti: k3-am69-sk: Enable wakeup_i2c0 and eeprom") Signed-off-by: Udit Kumar Reviewed-by: Francesco Dolcini Link: https://lore.kernel.org/r/20240415095605.3547933-3-u-kumar1@ti.com Signed-off-by: Nishanth Menon --- arch/arm64/boot/dts/ti/k3-am69-sk.dts | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) (limited to 'arch/arm64/boot/dts') diff --git a/arch/arm64/boot/dts/ti/k3-am69-sk.dts b/arch/arm64/boot/dts/ti/k3-am69-sk.dts index 50de2a448a3a..d88651c297a2 100644 --- a/arch/arm64/boot/dts/ti/k3-am69-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-am69-sk.dts @@ -517,18 +517,18 @@ wkup_uart0_pins_default: wkup-uart0-default-pins { bootph-all; pinctrl-single,pins = < - J721S2_WKUP_IOPAD(0x070, PIN_INPUT, 0) /* (L37) WKUP_GPIO0_6.WKUP_UART0_CTSn */ - J721S2_WKUP_IOPAD(0x074, PIN_INPUT, 0) /* (L36) WKUP_GPIO0_7.WKUP_UART0_RTSn */ - J721S2_WKUP_IOPAD(0x048, PIN_INPUT, 0) /* (K35) WKUP_UART0_RXD */ - J721S2_WKUP_IOPAD(0x04c, PIN_INPUT, 0) /* (K34) WKUP_UART0_TXD */ + J784S4_WKUP_IOPAD(0x070, PIN_INPUT, 0) /* (L37) WKUP_UART0_CTSn */ + J784S4_WKUP_IOPAD(0x074, PIN_OUTPUT, 0) /* (L36) WKUP_UART0_RTSn */ + J784S4_WKUP_IOPAD(0x048, PIN_INPUT, 0) /* (K35) WKUP_UART0_RXD */ + J784S4_WKUP_IOPAD(0x04c, PIN_OUTPUT, 0) /* (K34) WKUP_UART0_TXD */ >; }; wkup_i2c0_pins_default: wkup-i2c0-default-pins { bootph-all; pinctrl-single,pins = < - J721S2_WKUP_IOPAD(0x98, PIN_INPUT, 0) /* (N33) WKUP_I2C0_SCL */ - J721S2_WKUP_IOPAD(0x9c, PIN_INPUT, 0) /* (N35) WKUP_I2C0_SDA */ + J784S4_WKUP_IOPAD(0x98, PIN_INPUT, 0) /* (N33) WKUP_I2C0_SCL */ + J784S4_WKUP_IOPAD(0x9c, PIN_INPUT, 0) /* (N35) WKUP_I2C0_SDA */ >; }; -- cgit v1.2.3 From 04c6dd3466d7c19315c20b349e543d41c4420817 Mon Sep 17 00:00:00 2001 From: Brandon Brnich Date: Mon, 15 Apr 2024 15:46:59 -0500 Subject: arm64: dts: ti: k3-am62a-main: Add Wave5 Video Encoder/Decoder Node This patch adds support for the Wave521cl on the AM62A-SK. Signed-off-by: Brandon Brnich Reviewed-by: Devarsh Thakkar Link: https://lore.kernel.org/r/20240415204659.798548-1-b-brnich@ti.com Signed-off-by: Nishanth Menon --- arch/arm64/boot/dts/ti/k3-am62a-main.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'arch/arm64/boot/dts') diff --git a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi index 3fd59283eafe..e746a20b9a5d 100644 --- a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi @@ -1057,4 +1057,11 @@ #size-cells = <0>; }; }; + + vpu: video-codec@30210000 { + compatible = "ti,j721s2-wave521c", "cnm,wave521c"; + reg = <0x00 0x30210000 0x00 0x10000>; + clocks = <&k3_clks 204 2>; + power-domains = <&k3_pds 204 TI_SCI_PD_EXCLUSIVE>; + }; }; -- cgit v1.2.3 From 954b585eace0bcb6070444fdbc8ee8c5148e3ee9 Mon Sep 17 00:00:00 2001 From: Nathan Morrisson Date: Fri, 19 Apr 2024 12:31:14 -0700 Subject: arm64: dts: ti: am64-phyboard-electra: Add overlay to enable a GPIO fan The phyBOARD-Electra has a GPIO fan header. This overlay enables the fan header and sets the fan to turn on at 65C. Signed-off-by: Nathan Morrisson Reviewed-by: Wadim Egorov Link: https://lore.kernel.org/r/20240419193114.3090084-1-nmorrisson@phytec.com Signed-off-by: Nishanth Menon --- arch/arm64/boot/dts/ti/Makefile | 4 ++ .../dts/ti/k3-am642-phyboard-electra-gpio-fan.dtso | 50 ++++++++++++++++++++++ 2 files changed, 54 insertions(+) create mode 100644 arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-gpio-fan.dtso (limited to 'arch/arm64/boot/dts') diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile index 9a722c2473fb..fd91cf40af6d 100644 --- a/arch/arm64/boot/dts/ti/Makefile +++ b/arch/arm64/boot/dts/ti/Makefile @@ -48,6 +48,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-am642-hummingboard-t.dtb dtb-$(CONFIG_ARCH_K3) += k3-am642-hummingboard-t-pcie.dtb dtb-$(CONFIG_ARCH_K3) += k3-am642-hummingboard-t-usb3.dtb dtb-$(CONFIG_ARCH_K3) += k3-am642-phyboard-electra-rdk.dtb +dtb-$(CONFIG_ARCH_K3) += k3-am642-phyboard-electra-gpio-fan.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am642-sk.dtb dtb-$(CONFIG_ARCH_K3) += k3-am642-tqma64xxl-mbax4xxl.dtb dtb-$(CONFIG_ARCH_K3) += k3-am64-tqma64xxl-mbax4xxl-sdcard.dtbo @@ -131,6 +132,8 @@ k3-am62p5-sk-csi2-tevi-ov5640-dtbs := k3-am62p5-sk.dtb \ k3-am62x-sk-csi2-tevi-ov5640.dtbo k3-am642-evm-icssg1-dualemac-dtbs := \ k3-am642-evm.dtb k3-am642-evm-icssg1-dualemac.dtbo +k3-am642-phyboard-electra-gpio-fan-dtbs := \ + k3-am642-phyboard-electra-rdk.dtb k3-am642-phyboard-electra-gpio-fan.dtbo k3-am642-tqma64xxl-mbax4xxl-sdcard-dtbs := \ k3-am642-tqma64xxl-mbax4xxl.dtb k3-am64-tqma64xxl-mbax4xxl-sdcard.dtbo k3-am642-tqma64xxl-mbax4xxl-wlan-dtbs := \ @@ -174,6 +177,7 @@ DTC_FLAGS_k3-am62-lp-sk += -@ DTC_FLAGS_k3-am62a7-sk += -@ DTC_FLAGS_k3-am62p5-sk += -@ DTC_FLAGS_k3-am642-evm += -@ +DTC_FLAGS_k3-am642-phyboard-electra-rdk += -@ DTC_FLAGS_k3-am642-tqma64xxl-mbax4xxl += -@ DTC_FLAGS_k3-am6548-iot2050-advanced-m2 += -@ DTC_FLAGS_k3-am68-sk-base-board += -@ diff --git a/arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-gpio-fan.dtso b/arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-gpio-fan.dtso new file mode 100644 index 000000000000..5057658061b4 --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-gpio-fan.dtso @@ -0,0 +1,50 @@ +// SPDX-License-Identifier: GPL-2.0-only OR MIT +/* + * Copyright (C) 2024 PHYTEC America LLC + * Author: Nathan Morrisson + */ + +/dts-v1/; +/plugin/; + +#include +#include +#include "k3-pinctrl.h" + +&{/} { + fan: gpio-fan { + compatible = "gpio-fan"; + gpio-fan,speed-map = <0 0 8600 1>; + gpios = <&main_gpio0 28 GPIO_ACTIVE_LOW>; + #cooling-cells = <2>; + pinctrl-names = "default"; + pinctrl-0 = <&gpio_fan_pins_default>; + }; +}; + +&main_pmx0 { + gpio_fan_pins_default: gpio-fan-default-pins { + pinctrl-single,pins = < + AM64X_IOPAD(0x070, PIN_OUTPUT, 7) /* (V18) GPMC0_AD13.GPIO0_28 */ + >; + }; +}; + +&thermal_zones { + main0_thermal: main0-thermal { + trips { + main0_thermal_trip0: main0-thermal-trip { + temperature = <65000>; /* millicelsius */ + hysteresis = <2000>; /* millicelsius */ + type = "active"; + }; + }; + + cooling-maps { + map0 { + trip = <&main0_thermal_trip0>; + cooling-device = <&fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + }; +}; -- cgit v1.2.3 From 01b4bd7bb36e253384792e842245153293f1404b Mon Sep 17 00:00:00 2001 From: Nathan Morrisson Date: Fri, 19 Apr 2024 12:35:52 -0700 Subject: arm64: dts: ti: Enable overlays for the am625-phyboard-lyra Add symbols when building the am625-phyboard-lyra-rdk DTB so overlays can be applied. Fixes: d8280f30a9cd ("arm64: dts: ti: am62-phyboard-lyra: Add overlay to enable a GPIO fan") Signed-off-by: Nathan Morrisson Reviewed-by: Wadim Egorov Link: https://lore.kernel.org/r/20240419193552.3090343-1-nmorrisson@phytec.com Signed-off-by: Nishanth Menon --- arch/arm64/boot/dts/ti/Makefile | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm64/boot/dts') diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile index fd91cf40af6d..8fa0ae5b138a 100644 --- a/arch/arm64/boot/dts/ti/Makefile +++ b/arch/arm64/boot/dts/ti/Makefile @@ -172,6 +172,7 @@ dtb- += k3-am625-beagleplay-csi2-ov5640.dtb \ # Enable support for device-tree overlays DTC_FLAGS_k3-am625-beagleplay += -@ +DTC_FLAGS_k3-am625-phyboard-lyra-rdk += -@ DTC_FLAGS_k3-am625-sk += -@ DTC_FLAGS_k3-am62-lp-sk += -@ DTC_FLAGS_k3-am62a7-sk += -@ -- cgit v1.2.3 From 8ffe9cb889f2b831a9d5bbb1f7ad42d30e31170f Mon Sep 17 00:00:00 2001 From: Judith Mendez Date: Tue, 23 Apr 2024 10:17:28 -0500 Subject: arm64: dts: ti: k3-am65-main: Fix sdhci node properties Update otap-del-sel properties as per datasheet [0]. Add missing clkbuf-sel and itap-del-sel values also as per datasheet [0]. Move clkbuf-sel and ti,trm-icp above the otap-del-sel properties so the sdhci nodes could be more uniform across platforms. [0] https://www.ti.com/lit/ds/symlink/am6548.pdf Fixes: eac99d38f861 ("arm64: dts: ti: k3-am654-main: Update otap-del-sel values") Fixes: d7600d070fb0 ("arm64: dts: ti: k3-am65-main: Add support for sdhci1") Signed-off-by: Judith Mendez Link: https://lore.kernel.org/r/20240423151732.3541894-2-jm@ti.com Signed-off-by: Nishanth Menon --- arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 17 +++++++++++------ 1 file changed, 11 insertions(+), 6 deletions(-) (limited to 'arch/arm64/boot/dts') diff --git a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi index de5b1b20a617..7f26e5bd72a9 100644 --- a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi @@ -435,6 +435,8 @@ interrupts = ; mmc-ddr-1_8v; mmc-hs200-1_8v; + ti,clkbuf-sel = <0x7>; + ti,trm-icp = <0x8>; ti,otap-del-sel-legacy = <0x0>; ti,otap-del-sel-mmc-hs = <0x0>; ti,otap-del-sel-sd-hs = <0x0>; @@ -445,8 +447,7 @@ ti,otap-del-sel-ddr50 = <0x5>; ti,otap-del-sel-ddr52 = <0x5>; ti,otap-del-sel-hs200 = <0x5>; - ti,otap-del-sel-hs400 = <0x0>; - ti,trm-icp = <0x8>; + ti,itap-del-sel-ddr52 = <0x0>; dma-coherent; status = "disabled"; }; @@ -458,18 +459,22 @@ clocks = <&k3_clks 48 0>, <&k3_clks 48 1>; clock-names = "clk_ahb", "clk_xin"; interrupts = ; + ti,clkbuf-sel = <0x7>; + ti,trm-icp = <0x8>; ti,otap-del-sel-legacy = <0x0>; ti,otap-del-sel-mmc-hs = <0x0>; ti,otap-del-sel-sd-hs = <0x0>; - ti,otap-del-sel-sdr12 = <0x0>; - ti,otap-del-sel-sdr25 = <0x0>; + ti,otap-del-sel-sdr12 = <0xf>; + ti,otap-del-sel-sdr25 = <0xf>; ti,otap-del-sel-sdr50 = <0x8>; ti,otap-del-sel-sdr104 = <0x7>; ti,otap-del-sel-ddr50 = <0x4>; ti,otap-del-sel-ddr52 = <0x4>; ti,otap-del-sel-hs200 = <0x7>; - ti,clkbuf-sel = <0x7>; - ti,trm-icp = <0x8>; + ti,itap-del-sel-legacy = <0xa>; + ti,itap-del-sel-sd-hs = <0x1>; + ti,itap-del-sel-sdr12 = <0xa>; + ti,itap-del-sel-sdr25 = <0x1>; dma-coherent; status = "disabled"; }; -- cgit v1.2.3 From 735ddec7a1ea836cdb69cd46c8334f2654dfc1fb Mon Sep 17 00:00:00 2001 From: Judith Mendez Date: Tue, 23 Apr 2024 10:17:29 -0500 Subject: arm64: dts: ti: k3-am65-main: Remove unused properties in sdhci nodes On AM65x platform, sdhci0 is for eMMC and sdhci1 is for SD. Remove the properties that are not applicable for each device. Fixes: eac99d38f861 ("arm64: dts: ti: k3-am654-main: Update otap-del-sel values") Fixes: d7600d070fb0 ("arm64: dts: ti: k3-am65-main: Add support for sdhci1") Signed-off-by: Judith Mendez Link: https://lore.kernel.org/r/20240423151732.3541894-3-jm@ti.com Signed-off-by: Nishanth Menon --- arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 9 --------- 1 file changed, 9 deletions(-) (limited to 'arch/arm64/boot/dts') diff --git a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi index 7f26e5bd72a9..ed71561c5bd9 100644 --- a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi @@ -439,12 +439,6 @@ ti,trm-icp = <0x8>; ti,otap-del-sel-legacy = <0x0>; ti,otap-del-sel-mmc-hs = <0x0>; - ti,otap-del-sel-sd-hs = <0x0>; - ti,otap-del-sel-sdr12 = <0x0>; - ti,otap-del-sel-sdr25 = <0x0>; - ti,otap-del-sel-sdr50 = <0x8>; - ti,otap-del-sel-sdr104 = <0x7>; - ti,otap-del-sel-ddr50 = <0x5>; ti,otap-del-sel-ddr52 = <0x5>; ti,otap-del-sel-hs200 = <0x5>; ti,itap-del-sel-ddr52 = <0x0>; @@ -462,15 +456,12 @@ ti,clkbuf-sel = <0x7>; ti,trm-icp = <0x8>; ti,otap-del-sel-legacy = <0x0>; - ti,otap-del-sel-mmc-hs = <0x0>; ti,otap-del-sel-sd-hs = <0x0>; ti,otap-del-sel-sdr12 = <0xf>; ti,otap-del-sel-sdr25 = <0xf>; ti,otap-del-sel-sdr50 = <0x8>; ti,otap-del-sel-sdr104 = <0x7>; ti,otap-del-sel-ddr50 = <0x4>; - ti,otap-del-sel-ddr52 = <0x4>; - ti,otap-del-sel-hs200 = <0x7>; ti,itap-del-sel-legacy = <0xa>; ti,itap-del-sel-sd-hs = <0x1>; ti,itap-del-sel-sdr12 = <0xa>; -- cgit v1.2.3 From 8f023012eb4aa9100ecb1457ab96ddcc54c5d373 Mon Sep 17 00:00:00 2001 From: Vignesh Raghavendra Date: Tue, 23 Apr 2024 10:17:30 -0500 Subject: arm64: dts: ti: k3-am62a: Enable UHS mode support for SD cards Hook up required IO voltage regulators and drop no-1-8-v to support UHS modes on SD cards. Fixes: 5fc6b1b62639 ("arm64: dts: ti: Introduce AM62A7 family of SoCs") Signed-off-by: Vignesh Raghavendra Signed-off-by: Judith Mendez Link: https://lore.kernel.org/r/20240423151732.3541894-4-jm@ti.com Signed-off-by: Nishanth Menon --- arch/arm64/boot/dts/ti/k3-am62a-main.dtsi | 2 -- arch/arm64/boot/dts/ti/k3-am62a7-sk.dts | 21 +++++++++++++++++++++ 2 files changed, 21 insertions(+), 2 deletions(-) (limited to 'arch/arm64/boot/dts') diff --git a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi index e746a20b9a5d..bf9c2d9c6439 100644 --- a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi @@ -573,7 +573,6 @@ ti,itap-del-sel-sd-hs = <0x0>; ti,itap-del-sel-sdr12 = <0x0>; ti,itap-del-sel-sdr25 = <0x0>; - no-1-8-v; status = "disabled"; }; @@ -597,7 +596,6 @@ ti,itap-del-sel-sd-hs = <0x0>; ti,itap-del-sel-sdr12 = <0x0>; ti,itap-del-sel-sdr25 = <0x0>; - no-1-8-v; status = "disabled"; }; diff --git a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts b/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts index f241637a5642..fa43cd0b631e 100644 --- a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts @@ -113,6 +113,20 @@ regulator-boot-on; }; + vddshv_sdio: regulator-5 { + compatible = "regulator-gpio"; + regulator-name = "vddshv_sdio"; + pinctrl-names = "default"; + pinctrl-0 = <&vddshv_sdio_pins_default>; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + vin-supply = <&ldo1>; + gpios = <&main_gpio0 31 GPIO_ACTIVE_HIGH>; + states = <1800000 0x0>, + <3300000 0x1>; + }; + leds { compatible = "gpio-leds"; pinctrl-names = "default"; @@ -342,6 +356,12 @@ AM62AX_IOPAD(0x01d4, PIN_INPUT, 7) /* (C15) UART0_RTSn.GPIO1_23 */ >; }; + + vddshv_sdio_pins_default: vddshv-sdio-default-pins { + pinctrl-single,pins = < + AM62AX_IOPAD(0x07c, PIN_OUTPUT, 7) /* (M19) GPMC0_CLK.GPIO0_31 */ + >; + }; }; &mcu_pmx0 { @@ -580,6 +600,7 @@ /* SD/MMC */ status = "okay"; vmmc-supply = <&vdd_mmc1>; + vqmmc-supply = <&vddshv_sdio>; pinctrl-names = "default"; pinctrl-0 = <&main_mmc1_pins_default>; disable-wp; -- cgit v1.2.3 From 31c40d25f5fc7c683b6dacbc86f106690e890b28 Mon Sep 17 00:00:00 2001 From: Bhavya Kapoor Date: Tue, 23 Apr 2024 10:17:31 -0500 Subject: arm64: dts: ti: k3-j721s2-main: Enable support for SDR104 speed mode According to TRM for J721S2, SDR104 speed mode is supported by the SoC but its capabilities were masked in device tree. Remove sdhci-caps-mask to enable support for SDR104 speed mode for SD card in J721S2 SoC. [+] Refer to : section 12.3.6.1.1 MMCSD Features, in J721S2 TRM - https://www.ti.com/lit/zip/spruj28 Fixes: b8545f9d3a54 ("arm64: dts: ti: Add initial support for J721S2 SoC") Signed-off-by: Bhavya Kapoor Signed-off-by: Vignesh Raghavendra Link: https://lore.kernel.org/r/20240423151732.3541894-5-jm@ti.com Signed-off-by: Nishanth Menon --- arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 2 -- 1 file changed, 2 deletions(-) (limited to 'arch/arm64/boot/dts') diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi index 3cb06a7e4117..9ed6949b40e9 100644 --- a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi @@ -768,8 +768,6 @@ ti,clkbuf-sel = <0x7>; ti,trm-icp = <0x8>; dma-coherent; - /* Masking support for SDR104 capability */ - sdhci-caps-mask = <0x00000003 0x00000000>; status = "disabled"; }; -- cgit v1.2.3 From c28d88b2c298d74a2b47aaa10b5a1562992ed6dc Mon Sep 17 00:00:00 2001 From: Dasnavis Sabiya Date: Tue, 23 Apr 2024 10:17:32 -0500 Subject: arm64: dts: ti: k3-j784s4-main: Enable support for UHS mode Remove sdhci-caps-mask to enable support for SDR104 speed mode for SD card and remove no-1-8-v property so that SD card can work in any UHS-1 high speed mode it can support. Fixes: 4664ebd8346a ("arm64: dts: ti: Add initial support for J784S4 SoC") Signed-off-by: Bhavya Kapoor Signed-off-by: Dasnavis Sabiya Signed-off-by: Vignesh Raghavendra Signed-off-by: Judith Mendez Link: https://lore.kernel.org/r/20240423151732.3541894-6-jm@ti.com Signed-off-by: Nishanth Menon --- arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 2 -- 1 file changed, 2 deletions(-) (limited to 'arch/arm64/boot/dts') diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi index d42f25cacf23..6a4554c6c9c1 100644 --- a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi @@ -904,8 +904,6 @@ ti,clkbuf-sel = <0x7>; ti,trm-icp = <0x8>; dma-coherent; - sdhci-caps-mask = <0x00000003 0x00000000>; - no-1-8-v; status = "disabled"; }; -- cgit v1.2.3 From 5ae1471df6b79b2ec26c973639961523147c7b66 Mon Sep 17 00:00:00 2001 From: Bhavya Kapoor Date: Mon, 22 Apr 2024 18:48:40 +0530 Subject: arm64: dts: ti: k3-j722s-evm: Enable UHS support for MMCSD Enable the UHS modes for MMCSD in J722S by removing the no-1-8-v property. Signed-off-by: Bhavya Kapoor Reviewed-by: Judith Mendez Link: https://lore.kernel.org/r/20240422131840.34642-1-b-kapoor@ti.com Signed-off-by: Nishanth Menon --- arch/arm64/boot/dts/ti/k3-j722s-evm.dts | 1 - 1 file changed, 1 deletion(-) (limited to 'arch/arm64/boot/dts') diff --git a/arch/arm64/boot/dts/ti/k3-j722s-evm.dts b/arch/arm64/boot/dts/ti/k3-j722s-evm.dts index 78032caeb5fc..bf3c246d13d1 100644 --- a/arch/arm64/boot/dts/ti/k3-j722s-evm.dts +++ b/arch/arm64/boot/dts/ti/k3-j722s-evm.dts @@ -381,7 +381,6 @@ pinctrl-0 = <&main_mmc1_pins_default>; ti,driver-strength-ohm = <50>; disable-wp; - no-1-8-v; status = "okay"; bootph-all; }; -- cgit v1.2.3 From 566bbb018e415fe5d7f960b8003915bf8d8d1414 Mon Sep 17 00:00:00 2001 From: Stefan Eichenberger Date: Fri, 1 Mar 2024 09:49:00 +0100 Subject: arm64: dts: ti: k3-am62-verdin: replace sleep-moci hog with regulator The Verdin family has a signal called sleep-moci which can be used to turn off peripherals on the carrier board when the SoM goes into suspend. So far we have hogged this signal, which means the peripherals are always on and it is not possible to add peripherals that depend on the sleep-moci to be on. With this change, we replace the hog with a regulator so that peripherals can add their own regulators that use the same gpio. Carrier boards that allow peripherals to be powered off in suspend can disable this regulator and implement their own regulator to control the sleep-moci. Signed-off-by: Stefan Eichenberger Reviewed-by: Francesco Dolcini Link: https://lore.kernel.org/r/20240301084901.16656-2-eichest@gmail.com Signed-off-by: Nishanth Menon --- arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi | 24 ++++++++++++++++-------- 1 file changed, 16 insertions(+), 8 deletions(-) (limited to 'arch/arm64/boot/dts') diff --git a/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi b/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi index ff7cab0ff76c..2038c5e04639 100644 --- a/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi @@ -138,6 +138,22 @@ vin-supply = <®_1v8>; }; + /* + * By default we enable CTRL_SLEEP_MOCI#, this is required to have + * peripherals on the carrier board powered. + * If more granularity or power saving is required this can be disabled + * in the carrier board device tree files. + */ + reg_force_sleep_moci: regulator-force-sleep-moci { + compatible = "regulator-fixed"; + enable-active-high; + /* Verdin CTRL_SLEEP_MOCI# (SODIMM 256) */ + gpio = <&main_gpio0 31 GPIO_ACTIVE_HIGH>; + regulator-always-on; + regulator-boot-on; + regulator-name = "CTRL_SLEEP_MOCI#"; + }; + /* Verdin SD_1 Power Supply */ reg_sdhc1_vmmc: regulator-sdhci1 { compatible = "regulator-fixed"; @@ -985,14 +1001,6 @@ "", "", ""; - - verdin_ctrl_sleep_moci: ctrl-sleep-moci-hog { - gpio-hog; - /* Verdin CTRL_SLEEP_MOCI# (SODIMM 256) */ - gpios = <31 GPIO_ACTIVE_HIGH>; - line-name = "CTRL_SLEEP_MOCI#"; - output-high; - }; }; &main_gpio1 { -- cgit v1.2.3 From 3935fbc87ddebea5439f3ab6a78b1e83e976bf88 Mon Sep 17 00:00:00 2001 From: Stefan Eichenberger Date: Fri, 1 Mar 2024 09:49:01 +0100 Subject: arm64: dts: ti: k3-am62-verdin-dahlia: support sleep-moci Previously, we had the sleep-moci pin set to always on. However, the Dahlia carrier board supports disabling the sleep-moci when the system is suspended to power down peripherals that support it. This reduces overall power consumption. This commit adds support for this feature by disabling the reg_force_sleep_moci regulator and adding a new regulator for the USB hub that can be turned off when the system is suspended. Signed-off-by: Stefan Eichenberger Reviewed-by: Francesco Dolcini Link: https://lore.kernel.org/r/20240301084901.16656-3-eichest@gmail.com Signed-off-by: Nishanth Menon --- arch/arm64/boot/dts/ti/k3-am62-verdin-dahlia.dtsi | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) (limited to 'arch/arm64/boot/dts') diff --git a/arch/arm64/boot/dts/ti/k3-am62-verdin-dahlia.dtsi b/arch/arm64/boot/dts/ti/k3-am62-verdin-dahlia.dtsi index 9202181fbd65..e8f4d136e5df 100644 --- a/arch/arm64/boot/dts/ti/k3-am62-verdin-dahlia.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62-verdin-dahlia.dtsi @@ -43,6 +43,15 @@ sound-dai = <&mcasp0>; }; }; + + reg_usb_hub: regulator-usb-hub { + compatible = "regulator-fixed"; + enable-active-high; + /* Verdin CTRL_SLEEP_MOCI# (SODIMM 256) */ + gpio = <&main_gpio0 31 GPIO_ACTIVE_HIGH>; + regulator-boot-on; + regulator-name = "HUB_PWR_EN"; + }; }; /* Verdin ETHs */ @@ -184,6 +193,11 @@ status = "okay"; }; +/* Do not force CTRL_SLEEP_MOCI# always enabled */ +®_force_sleep_moci { + status = "disabled"; +}; + /* Verdin SD_1 */ &sdhci1 { status = "okay"; @@ -204,7 +218,15 @@ }; &usb1 { + #address-cells = <1>; + #size-cells = <0>; status = "okay"; + + usb-hub@1 { + compatible = "usb424,2744"; + reg = <1>; + vdd-supply = <®_usb_hub>; + }; }; /* Verdin CTRL_WAKE1_MICO# */ -- cgit v1.2.3 From 62d514ff78488f1b86a537bdc6c31ab7e56906b6 Mon Sep 17 00:00:00 2001 From: Udit Kumar Date: Wed, 24 Apr 2024 13:24:22 +0530 Subject: arm64: dts: ti: k3-j721s2: Add main esm address range Main ESM address change was missing for J721S2 SOC, So adding main ESM address mapping. Signed-off-by: Udit Kumar Link: https://lore.kernel.org/r/20240424075423.1229127-2-u-kumar1@ti.com Signed-off-by: Nishanth Menon --- arch/arm64/boot/dts/ti/k3-j721s2.dtsi | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm64/boot/dts') diff --git a/arch/arm64/boot/dts/ti/k3-j721s2.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2.dtsi index be4502fe1c9d..568e6a04619d 100644 --- a/arch/arm64/boot/dts/ti/k3-j721s2.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721s2.dtsi @@ -117,6 +117,7 @@ #size-cells = <2>; ranges = <0x00 0x00100000 0x00 0x00100000 0x00 0x00020000>, /* ctrl mmr */ <0x00 0x00600000 0x00 0x00600000 0x00 0x00031100>, /* GPIO */ + <0x00 0x00700000 0x00 0x00700000 0x00 0x00001000>, /* ESM */ <0x00 0x01000000 0x00 0x01000000 0x00 0x0d000000>, /* Most peripherals */ <0x00 0x0d800000 0x00 0x0d800000 0x00 0x00800000>, /* PCIe Core*/ <0x00 0x18000000 0x00 0x18000000 0x00 0x08000000>, /* PCIe1 DAT0 */ -- cgit v1.2.3 From 1142985a62f1abd7a6e0b44df42f629c4da5c8f7 Mon Sep 17 00:00:00 2001 From: Udit Kumar Date: Wed, 24 Apr 2024 13:24:23 +0530 Subject: arm64: dts: ti: k3-j784s4: Add main esm address range Main ESM address change was missing for J784S4 SOC, So adding main ESM address mapping. Signed-off-by: Udit Kumar Link: https://lore.kernel.org/r/20240424075423.1229127-3-u-kumar1@ti.com Signed-off-by: Nishanth Menon --- arch/arm64/boot/dts/ti/k3-j784s4.dtsi | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm64/boot/dts') diff --git a/arch/arm64/boot/dts/ti/k3-j784s4.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4.dtsi index 6e2e92ffe745..da7368ed6b52 100644 --- a/arch/arm64/boot/dts/ti/k3-j784s4.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j784s4.dtsi @@ -234,6 +234,7 @@ #size-cells = <2>; ranges = <0x00 0x00100000 0x00 0x00100000 0x00 0x00020000>, /* ctrl mmr */ <0x00 0x00600000 0x00 0x00600000 0x00 0x00031100>, /* GPIO */ + <0x00 0x00700000 0x00 0x00700000 0x00 0x00001000>, /* ESM */ <0x00 0x01000000 0x00 0x01000000 0x00 0x0d000000>, /* Most peripherals */ <0x00 0x04210000 0x00 0x04210000 0x00 0x00010000>, /* VPU0 */ <0x00 0x04220000 0x00 0x04220000 0x00 0x00010000>, /* VPU1 */ -- cgit v1.2.3 From 8e558642d9ff3341be75426152e4eccc0f277b53 Mon Sep 17 00:00:00 2001 From: Garrett Giordano Date: Thu, 25 Apr 2024 08:25:58 -0700 Subject: arm64: dts: ti: k3-am625-phyboard-lyra-rdk: Add USB-C The USB-C PD manages plug orientation, power delivery, and our endpoint for the USB interface. Add this node and include its endpoint. Configure USB0 for role-switching and wire it to our USB-C PD endpoint. Signed-off-by: Garrett Giordano Reviewed-by: Wadim Egorov Link: https://lore.kernel.org/r/20240425152558.485763-1-ggiordano@phytec.com Signed-off-by: Nishanth Menon --- .../boot/dts/ti/k3-am625-phyboard-lyra-rdk.dts | 26 +++++++++++++++++++++- 1 file changed, 25 insertions(+), 1 deletion(-) (limited to 'arch/arm64/boot/dts') diff --git a/arch/arm64/boot/dts/ti/k3-am625-phyboard-lyra-rdk.dts b/arch/arm64/boot/dts/ti/k3-am625-phyboard-lyra-rdk.dts index d7b8aa607c8c..50d2573c840e 100644 --- a/arch/arm64/boot/dts/ti/k3-am625-phyboard-lyra-rdk.dts +++ b/arch/arm64/boot/dts/ti/k3-am625-phyboard-lyra-rdk.dts @@ -348,6 +348,24 @@ "GPIO6_ETH1_USER_RESET", "GPIO7_AUDIO_USER_RESET"; }; + usb-pd@22 { + compatible = "ti,tps6598x"; + reg = <0x22>; + + connector { + compatible = "usb-c-connector"; + label = "USB-C"; + self-powered; + data-role = "dual"; + power-role = "sink"; + port { + usb_con_hs: endpoint { + remote-endpoint = <&typec_hs>; + }; + }; + }; + }; + sii9022: bridge-hdmi@39 { compatible = "sil,sii9022"; reg = <0x39>; @@ -449,7 +467,13 @@ }; &usb0 { - dr_mode = "peripheral"; + usb-role-switch; + + port { + typec_hs: endpoint { + remote-endpoint = <&usb_con_hs>; + }; + }; }; &usb1 { -- cgit v1.2.3 From 0b1133ee36ecbf3b02f69cc4e8a169f1b6019e40 Mon Sep 17 00:00:00 2001 From: Roger Quadros Date: Tue, 5 Mar 2024 15:15:32 +0200 Subject: arm64: dts: ti: k3-am625-beagleplay: Fix Ethernet PHY RESET GPIOs The RESET GPIO pinmux should be part of MDIO bus node so that they can be in the right state before the PHY can be probed via MDIO bus scan. The GPIO pin should be setup with PIN_INPUT so that input circuitry is enabled in case software wants to check pin status. Without this, incorrect status is shown in /sys/kernel/debug/gpio. Add GPIO reset for the Gigabit Ethernet PHY. As per RTL8211F datasheet, reset assert width is 10ms and PHY registers can be access accessed after 50ms of reset deassert. Fixes: f5a731f0787f ("arm64: dts: ti: Add k3-am625-beagleplay") Signed-off-by: Roger Quadros Link: https://lore.kernel.org/r/20240305-b4-for-v6-9-am65-beagleplay-ethernet-reset-v2-1-2bf463a7bf13@kernel.org Signed-off-by: Nishanth Menon --- arch/arm64/boot/dts/ti/k3-am625-beagleplay.dts | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) (limited to 'arch/arm64/boot/dts') diff --git a/arch/arm64/boot/dts/ti/k3-am625-beagleplay.dts b/arch/arm64/boot/dts/ti/k3-am625-beagleplay.dts index 84977c1cc85d..18e3070a8683 100644 --- a/arch/arm64/boot/dts/ti/k3-am625-beagleplay.dts +++ b/arch/arm64/boot/dts/ti/k3-am625-beagleplay.dts @@ -289,6 +289,8 @@ pinctrl-single,pins = < AM62X_IOPAD(0x0160, PIN_OUTPUT, 0) /* (AD24) MDIO0_MDC */ AM62X_IOPAD(0x015c, PIN_INPUT, 0) /* (AB22) MDIO0_MDIO */ + AM62X_IOPAD(0x003c, PIN_INPUT, 7) /* (M25) GPMC0_AD0.GPIO0_15 */ + AM62X_IOPAD(0x018c, PIN_INPUT, 7) /* (AC21) RGMII2_RD2.GPIO1_5 */ >; }; @@ -380,7 +382,6 @@ AM62X_IOPAD(0x016c, PIN_INPUT, 1) /* (Y18) RGMII2_TD0.RMII2_TXD0 */ AM62X_IOPAD(0x0170, PIN_INPUT, 1) /* (AA18) RGMII2_TD1.RMII2_TXD1 */ AM62X_IOPAD(0x0164, PIN_INPUT, 1) /* (AA19) RGMII2_TX_CTL.RMII2_TX_EN */ - AM62X_IOPAD(0x018c, PIN_OUTPUT, 7) /* (AC21) RGMII2_RD2.GPIO1_5 */ AM62X_IOPAD(0x0190, PIN_INPUT, 7) /* (AE22) RGMII2_RD3.GPIO1_6 */ AM62X_IOPAD(0x01f0, PIN_OUTPUT, 5) /* (A18) EXT_REFCLK1.CLKOUT0 */ >; @@ -594,6 +595,9 @@ cpsw3g_phy0: ethernet-phy@0 { reg = <0>; + reset-gpios = <&main_gpio0 15 GPIO_ACTIVE_LOW>; + reset-assert-us = <10000>; + reset-deassert-us = <50000>; }; cpsw3g_phy1: ethernet-phy@1 { @@ -612,7 +616,7 @@ "USR0", "USR1", "USR2", "USR3", "", "", "USR4", /* 3-9 */ "EEPROM_WP", /* 10 */ "CSI2_CAMERA_GPIO1", "CSI2_CAMERA_GPIO2", /* 11-12 */ - "CC1352P7_BOOT", "CC1352P7_RSTN", "", "", "", /* 13-17 */ + "CC1352P7_BOOT", "CC1352P7_RSTN", "GBE_RSTN", "", "", /* 13-17 */ "USR_BUTTON", "", "", "", "", "", "", "", "", /* 18-26 */ "", "", "", "", "", "", "", "", "", "HDMI_INT", /* 27-36 */ "", "VDD_WLAN_EN", "", "", "WL_IRQ", "GBE_INTN",/* 37-42 */ -- cgit v1.2.3 From f329598c27332ff9e85e5551bed3cab280971678 Mon Sep 17 00:00:00 2001 From: Jai Luthra Date: Thu, 25 Apr 2024 16:00:59 +0530 Subject: arm64: dts: ti: Fix csi2-dual-imx219 dtb names Fix the output filenames of the combined device tree blobs generated by applying *-csi2-dual-imx219-* overlays on the base dtbs during compile test. Fixes: f767eb918096 ("arm64: dts: ti: k3-j721e-sk: Add overlay for IMX219") Signed-off-by: Jai Luthra Reviewed-by: Aradhya Bhatia Reviewed-by: Devarsh Thakkar Link: https://lore.kernel.org/r/104fbdbc-a3f6-091a-72f4-17d4fa24ad92@ti.com/ Signed-off-by: Nishanth Menon --- arch/arm64/boot/dts/ti/Makefile | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'arch/arm64/boot/dts') diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile index 8fa0ae5b138a..2c327cc320cf 100644 --- a/arch/arm64/boot/dts/ti/Makefile +++ b/arch/arm64/boot/dts/ti/Makefile @@ -164,10 +164,10 @@ dtb- += k3-am625-beagleplay-csi2-ov5640.dtb \ k3-am642-evm-icssg1-dualemac.dtb \ k3-am642-tqma64xxl-mbax4xxl-sdcard.dtb \ k3-am642-tqma64xxl-mbax4xxl-wlan.dtb \ - k3-am68-sk-base-board-csi2-dual-imx219-dtbs \ - k3-am69-sk-csi2-dual-imx219-dtbs \ + k3-am68-sk-base-board-csi2-dual-imx219.dtb \ + k3-am69-sk-csi2-dual-imx219.dtb \ k3-j721e-evm-pcie0-ep.dtb \ - k3-j721e-sk-csi2-dual-imx219-dtbs \ + k3-j721e-sk-csi2-dual-imx219.dtb \ k3-j721s2-evm-pcie1-ep.dtb # Enable support for device-tree overlays -- cgit v1.2.3