From d9f18a981bd0a724c87d04db1d61d91261a2feb4 Mon Sep 17 00:00:00 2001 From: Kukjin Kim Date: Fri, 29 Jan 2010 10:17:20 +0900 Subject: ARM: S5P6442: Add IRQ support This patch adds IRQ support for S5P6442. This patch adds interrupt register definitions, IRQ definitions for various interrupt sources and new VIC base for VIC2 in plat-s5p common irq code. Signed-off-by: Adityapratap Sharma Signed-off-by: Atul Dahiya Signed-off-by: Kukjin Kim Signed-off-by: Ben Dooks --- arch/arm/plat-s5p/include/plat/irqs.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'arch/arm/plat-s5p/include') diff --git a/arch/arm/plat-s5p/include/plat/irqs.h b/arch/arm/plat-s5p/include/plat/irqs.h index 101038d49944..9daad19ccd0d 100644 --- a/arch/arm/plat-s5p/include/plat/irqs.h +++ b/arch/arm/plat-s5p/include/plat/irqs.h @@ -28,11 +28,13 @@ #define S5P_VIC0_BASE S5P_IRQ(0) #define S5P_VIC1_BASE S5P_IRQ(32) +#define S5P_VIC2_BASE S5P_IRQ(64) #define VIC_BASE(x) (S5P_VIC0_BASE + ((x)*32)) #define IRQ_VIC0_BASE S5P_VIC0_BASE #define IRQ_VIC1_BASE S5P_VIC1_BASE +#define IRQ_VIC2_BASE S5P_VIC2_BASE /* UART interrupts, each UART has 4 intterupts per channel so * use the space between the ISA and S3C main interrupts. Note, these @@ -73,6 +75,7 @@ #define S5P_IRQ_VIC0(x) (S5P_VIC0_BASE + (x)) #define S5P_IRQ_VIC1(x) (S5P_VIC1_BASE + (x)) +#define S5P_IRQ_VIC2(x) (S5P_VIC2_BASE + (x)) #define S5P_TIMER_IRQ(x) S5P_IRQ(11 + (x)) -- cgit v1.2.3