From 2edb89cd8e915d2d826f5704b80da28bde688051 Mon Sep 17 00:00:00 2001 From: Russell King Date: Wed, 19 Mar 2014 12:16:36 +0000 Subject: ARM: l2c: shmobile: remove cache size override The cache size should already be present in the L2 cache auxiliary control register: it is part of the integration process to configure the hardware IP. Most platforms get this right, yet still many cargo-cult program, and assume that they always need specifying to the L2 cache code. Remove them so we can find out which really need this. Signed-off-by: Russell King --- arch/arm/mach-shmobile/board-kzm9g-reference.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/mach-shmobile/board-kzm9g-reference.c') diff --git a/arch/arm/mach-shmobile/board-kzm9g-reference.c b/arch/arm/mach-shmobile/board-kzm9g-reference.c index 85873f186d77..a735a1d80c28 100644 --- a/arch/arm/mach-shmobile/board-kzm9g-reference.c +++ b/arch/arm/mach-shmobile/board-kzm9g-reference.c @@ -37,7 +37,7 @@ static void __init kzm_init(void) #ifdef CONFIG_CACHE_L2X0 /* Shared attribute override enable, 64K*8way */ - l2x0_init(IOMEM(0xf0100000), 0x00460000, 0xc2000fff); + l2x0_init(IOMEM(0xf0100000), 0x00400000, 0xc20f0fff); #endif } -- cgit v1.2.3