From 7d034c5c6106b6f9ae13a67eaa98f558f430e33b Mon Sep 17 00:00:00 2001 From: Sébastien Szymanski Date: Fri, 29 Jun 2018 16:52:21 +0200 Subject: ARM: dts: imx6ull: add operating points MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit i.MX6ULL has different operating ranges than i.MX6UL so add the operating points for the i.MX6ULL and remove them from board device trees. A 25mV offset is added to the minimum allowed values like for the i.MX6UL. The valid frequencies are now selected by the cpufreq driver according to ratings stored in fuses since commit 0aa9abd4c212 ("cpufreq: imx6q: check speed grades for i.MX6ULL") Signed-off-by: Sébastien Szymanski Acked-by: Viresh Kumar Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6ull.dtsi | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) (limited to 'arch/arm/boot/dts/imx6ull.dtsi') diff --git a/arch/arm/boot/dts/imx6ull.dtsi b/arch/arm/boot/dts/imx6ull.dtsi index 70a28628e9b0..cd1776a7015a 100644 --- a/arch/arm/boot/dts/imx6ull.dtsi +++ b/arch/arm/boot/dts/imx6ull.dtsi @@ -11,6 +11,25 @@ /* Delete CAAM node in AIPS-2 (i.MX6UL specific) */ /delete-node/ &crypto; +&cpu0 { + operating-points = < + /* kHz uV */ + 900000 1275000 + 792000 1225000 + 528000 1175000 + 396000 1025000 + 198000 950000 + >; + fsl,soc-operating-points = < + /* KHz uV */ + 900000 1175000 + 792000 1175000 + 528000 1175000 + 396000 1175000 + 198000 1175000 + >; +}; + / { soc { aips3: aips-bus@2200000 { -- cgit v1.2.3