From 2bfdd113d0ee1ea40fbb49f181fea352a7e5e1a7 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Wed, 19 Aug 2020 18:04:24 -0300 Subject: ARM: dts: imx: Fix the SPI chipselect polarity The conversion of the spi-imx driver to use GPIO descriptors in commit 8cdcd8aeee28 ("spi: imx/fsl-lpspi: Convert to GPIO descriptors") helped to detect the following SPI chipselect polarity mismatch on an imx6q-sabresd: [ 4.854337] m25p80@0 enforce active low on chipselect handle Prior to the above commit, the chipselect polarity passed via cs-gpios property was ignored and considered active-low. The reason for such mismatch is clearly explained in the comments inside drivers/gpio/gpiolib-of.c: * SPI children have active low chip selects * by default. This can be specified negatively * by just omitting "spi-cs-high" in the * device node, or actively by tagging on * GPIO_ACTIVE_LOW as flag in the device * tree. If the line is simultaneously * tagged as active low in the device tree * and has the "spi-cs-high" set, we get a * conflict and the "spi-cs-high" flag will * take precedence. To properly represent the SPI chipselect polarity, change it to active-low when the "spi-cs-high" property is absent. Signed-off-by: Fabio Estevam Reviewed-by: Linus Walleij Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6q-kontron-samx6i.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'arch/arm/boot/dts/imx6q-kontron-samx6i.dtsi') diff --git a/arch/arm/boot/dts/imx6q-kontron-samx6i.dtsi b/arch/arm/boot/dts/imx6q-kontron-samx6i.dtsi index 2618eccfe50d..1a6dcf77fb13 100644 --- a/arch/arm/boot/dts/imx6q-kontron-samx6i.dtsi +++ b/arch/arm/boot/dts/imx6q-kontron-samx6i.dtsi @@ -15,9 +15,9 @@ /* Quad/Dual SoMs have 3 chip-select signals */ &ecspi4 { fsl,spi-num-chipselects = <3>; - cs-gpios = <&gpio3 24 GPIO_ACTIVE_HIGH>, - <&gpio3 29 GPIO_ACTIVE_HIGH>, - <&gpio3 25 GPIO_ACTIVE_HIGH>; + cs-gpios = <&gpio3 24 GPIO_ACTIVE_LOW>, + <&gpio3 29 GPIO_ACTIVE_LOW>, + <&gpio3 25 GPIO_ACTIVE_LOW>; }; &pinctrl_ecspi4 { -- cgit v1.2.3